2 * linux/drivers/video/omap2/dss/dss_features.h
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef __OMAP2_DSS_FEATURES_H
21 #define __OMAP2_DSS_FEATURES_H
23 #if defined(CONFIG_OMAP4_DSS_HDMI)
27 #define MAX_DSS_MANAGERS 3
28 #define MAX_DSS_OVERLAYS 4
29 #define MAX_DSS_LCD_MANAGERS 2
32 /* DSS has feature id */
34 FEAT_LCDENABLEPOL
= 1 << 3,
35 FEAT_LCDENABLESIGNAL
= 1 << 4,
36 FEAT_PCKFREEENABLE
= 1 << 5,
37 FEAT_FUNCGATED
= 1 << 6,
38 FEAT_MGR_LCD2
= 1 << 7,
39 FEAT_LINEBUFFERSPLIT
= 1 << 8,
40 FEAT_ROWREPEATENABLE
= 1 << 9,
41 FEAT_RESIZECONF
= 1 << 10,
42 /* Independent core clk divider */
43 FEAT_CORE_CLK_DIV
= 1 << 11,
44 FEAT_LCD_CLK_SRC
= 1 << 12,
45 /* DSI-PLL power command 0x3 is not working */
46 FEAT_DSI_PLL_PWR_BUG
= 1 << 13,
47 FEAT_DSI_PLL_FREQSEL
= 1 << 14,
48 FEAT_DSI_DCS_CMD_CONFIG_VC
= 1 << 15,
49 FEAT_DSI_VC_OCP_WIDTH
= 1 << 16,
50 FEAT_DSI_REVERSE_TXCLKESC
= 1 << 17,
51 FEAT_DSI_GNQ
= 1 << 18,
52 FEAT_HDMI_CTS_SWMODE
= 1 << 19,
53 FEAT_HANDLE_UV_SEPARATE
= 1 << 20,
55 FEAT_VENC_REQUIRES_TV_DAC_CLK
= 1 << 22,
57 FEAT_PRELOAD
= 1 << 24,
58 FEAT_FIR_COEF_V
= 1 << 25,
59 FEAT_ALPHA_FIXED_ZORDER
= 1 << 26,
60 FEAT_ALPHA_FREE_ZORDER
= 1 << 27,
63 /* DSS register field id */
64 enum dss_feat_reg_field
{
67 FEAT_REG_FIFOHIGHTHRESHOLD
,
68 FEAT_REG_FIFOLOWTHRESHOLD
,
70 FEAT_REG_HORIZONTALACCU
,
71 FEAT_REG_VERTICALACCU
,
72 FEAT_REG_DISPC_CLK_SWITCH
,
75 FEAT_REG_DSIPLL_REGM_DISPC
,
76 FEAT_REG_DSIPLL_REGM_DSI
,
79 enum dss_range_param
{
82 FEAT_PARAM_DSIPLL_REGN
,
83 FEAT_PARAM_DSIPLL_REGM
,
84 FEAT_PARAM_DSIPLL_REGM_DISPC
,
85 FEAT_PARAM_DSIPLL_REGM_DSI
,
86 FEAT_PARAM_DSIPLL_FINT
,
87 FEAT_PARAM_DSIPLL_LPDIV
,
92 /* DSS Feature Functions */
93 int dss_feat_get_num_mgrs(void);
94 int dss_feat_get_num_ovls(void);
95 unsigned long dss_feat_get_param_min(enum dss_range_param param
);
96 unsigned long dss_feat_get_param_max(enum dss_range_param param
);
97 enum omap_display_type
dss_feat_get_supported_displays(enum omap_channel channel
);
98 enum omap_color_mode
dss_feat_get_supported_color_modes(enum omap_plane plane
);
99 enum omap_overlay_caps
dss_feat_get_overlay_caps(enum omap_plane plane
);
100 bool dss_feat_color_mode_supported(enum omap_plane plane
,
101 enum omap_color_mode color_mode
);
102 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id
);
104 u32
dss_feat_get_buffer_size_unit(void); /* in bytes */
105 u32
dss_feat_get_burst_size_unit(void); /* in bytes */
107 bool dss_has_feature(enum dss_feat_id id
);
108 void dss_feat_get_reg_field(enum dss_feat_reg_field id
, u8
*start
, u8
*end
);
109 void dss_features_init(void);
110 #if defined(CONFIG_OMAP4_DSS_HDMI)
111 void dss_init_hdmi_ip_ops(struct hdmi_ip_data
*ip_data
);