include/asm-arm/arch-s3c2410/uncompress.h

   1 /* linux/include/asm-arm/arch-s3c2410/uncompress.h
   2  *
   3  * (c) 2003 Simtec Electronics
   4  *    Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 - uncompress code
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Changelog:
  13  *  22-May-2003 BJD  Created
  14  *  08-Sep-2003 BJD  Moved to linux v2.6
  15  *  12-Mar-2004 BJD  Updated header protection
  16  *  12-Oct-2004 BJD  Take account of debug uart configuration
  17  *  15-Nov-2004 BJD  Fixed uart configuration
  18  *  22-Feb-2005 BJD  Added watchdog to uncompress
  19  *  04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
  20 */
  21
  22 #ifndef __ASM_ARCH_UNCOMPRESS_H
  23 #define __ASM_ARCH_UNCOMPRESS_H
  24
  25 #include <linux/config.h>
  26
  27 /* defines for UART registers */
  28 #include "asm/arch/regs-serial.h"
  29 #include "asm/arch/regs-gpio.h"
  30 #include "asm/arch/regs-watchdog.h"
  31
  32 #include <asm/arch/map.h>
  33
  34 /* working in physical space... */
  35 #undef S3C2410_GPIOREG
  36 #undef S3C2410_WDOGREG
  37
  38 #define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x)))
  39 #define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x)))
  40
  41 /* how many bytes we allow into the FIFO at a time in FIFO mode */
  42 #define FIFO_MAX         (14)
  43
  44 #define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
  45
  46 static __inline__ void
  47 uart_wr(unsigned int reg, unsigned int val)
  48 {
  49         volatile unsigned int *ptr;
  50
  51         ptr = (volatile unsigned int *)(reg + uart_base);
  52         *ptr = val;
  53 }
  54
  55 static __inline__ unsigned int
  56 uart_rd(unsigned int reg)
  57 {
  58         volatile unsigned int *ptr;
  59
  60         ptr = (volatile unsigned int *)(reg + uart_base);
  61         return *ptr;
  62 }
  63
  64
  65 /* we can deal with the case the UARTs are being run
  66  * in FIFO mode, so that we don't hold up our execution
  67  * waiting for tx to happen...
  68 */
  69
  70 static void
  71 putc(char ch)
  72 {
  73         int cpuid = S3C2410_GSTATUS1_2410;
  74
  75 #ifndef CONFIG_CPU_S3C2400
  76         cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
  77         cpuid &= S3C2410_GSTATUS1_IDMASK;
  78 #endif
  79
  80         if (ch == '\n')
  81                 putc('\r');    /* expand newline to \r\n */
  82
  83         if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
  84                 int level;
  85
  86                 while (1) {
  87                         level = uart_rd(S3C2410_UFSTAT);
  88
  89                         if (cpuid == S3C2410_GSTATUS1_2440) {
  90                                 level &= S3C2440_UFSTAT_TXMASK;
  91                                 level >>= S3C2440_UFSTAT_TXSHIFT;
  92                         } else {
  93                                 level &= S3C2410_UFSTAT_TXMASK;
  94                                 level >>= S3C2410_UFSTAT_TXSHIFT;
  95                         }
  96
  97                         if (level < FIFO_MAX)
  98                                 break;
  99                 }
 100
 101         } else {
 102                 /* not using fifos */
 103
 104                 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE);
 105         }
 106
 107         /* write byte to transmission register */
 108         uart_wr(S3C2410_UTXH, ch);
 109 }
 110
 111 static void
 112 putstr(const char *ptr)
 113 {
 114         for (; *ptr != '\0'; ptr++) {
 115                 putc(*ptr);
 116         }
 117 }
 118
 119 /* CONFIG_S3C2410_BOOT_WATCHDOG
 120  *
 121  * Simple boot-time watchdog setup, to reboot the system if there is
 122  * any problem with the boot process
 123 */
 124
 125 #ifdef CONFIG_S3C2410_BOOT_WATCHDOG
 126
 127 #define WDOG_COUNT (0xff00)
 128
 129 #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
 130
 131 static inline void arch_decomp_wdog(void)
 132 {
 133         __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
 134 }
 135
 136 static void arch_decomp_wdog_start(void)
 137 {
 138         __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
 139         __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
 140         __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
 141 }
 142
 143 #else
 144 #define arch_decomp_wdog_start()
 145 #define arch_decomp_wdog()
 146 #endif
 147
 148 static void error(char *err);
 149
 150 static void
 151 arch_decomp_setup(void)
 152 {
 153         /* we may need to setup the uart(s) here if we are not running
 154          * on an BAST... the BAST will have left the uarts configured
 155          * after calling linux.
 156          */
 157
 158         arch_decomp_wdog_start();
 159 }
 160
 161
 162 #endif /* __ASM_ARCH_UNCOMPRESS_H */