include/asm-arm/arch-iop3xx/iop331-irqs.h

   1 /*
   2  * linux/include/asm-arm/arch-iop3xx/irqs.h
   3  *
   4  * Author:      Dave Jiang (dave.jiang@intel.com)
   5  * Copyright:   (C) 2003 Intel Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  */
  12 #ifndef _IOP331_IRQS_H_
  13 #define _IOP331_IRQS_H_
  14
  15 /*
  16  * IOP80331 chipset interrupts
  17  */
  18 #define IOP331_IRQ_OFS          0
  19 #define IOP331_IRQ(x)           (IOP331_IRQ_OFS + (x))
  20
  21 /*
  22  * On IRQ or FIQ register
  23  */
  24 #define IRQ_IOP331_DMA0_EOT     IOP331_IRQ(0)
  25 #define IRQ_IOP331_DMA0_EOC     IOP331_IRQ(1)
  26 #define IRQ_IOP331_DMA1_EOT     IOP331_IRQ(2)
  27 #define IRQ_IOP331_DMA1_EOC     IOP331_IRQ(3)
  28 #define IRQ_IOP331_RSVD_4       IOP331_IRQ(4)
  29 #define IRQ_IOP331_RSVD_5       IOP331_IRQ(5)
  30 #define IRQ_IOP331_AA_EOT       IOP331_IRQ(6)
  31 #define IRQ_IOP331_AA_EOC       IOP331_IRQ(7)
  32 #define IRQ_IOP331_TIMER0       IOP331_IRQ(8)
  33 #define IRQ_IOP331_TIMER1       IOP331_IRQ(9)
  34 #define IRQ_IOP331_I2C_0        IOP331_IRQ(10)
  35 #define IRQ_IOP331_I2C_1        IOP331_IRQ(11)
  36 #define IRQ_IOP331_MSG      IOP331_IRQ(12)
  37 #define IRQ_IOP331_MSGIBQ   IOP331_IRQ(13)
  38 #define IRQ_IOP331_ATU_BIST     IOP331_IRQ(14)
  39 #define IRQ_IOP331_PERFMON      IOP331_IRQ(15)
  40 #define IRQ_IOP331_CORE_PMU     IOP331_IRQ(16)
  41 #define IRQ_IOP331_RSVD_17      IOP331_IRQ(17)
  42 #define IRQ_IOP331_RSVD_18      IOP331_IRQ(18)
  43 #define IRQ_IOP331_RSVD_19      IOP331_IRQ(19)
  44 #define IRQ_IOP331_RSVD_20      IOP331_IRQ(20)
  45 #define IRQ_IOP331_RSVD_21      IOP331_IRQ(21)
  46 #define IRQ_IOP331_RSVD_22      IOP331_IRQ(22)
  47 #define IRQ_IOP331_RSVD_23      IOP331_IRQ(23)
  48 #define IRQ_IOP331_XINT0        IOP331_IRQ(24)
  49 #define IRQ_IOP331_XINT1        IOP331_IRQ(25)
  50 #define IRQ_IOP331_XINT2        IOP331_IRQ(26)
  51 #define IRQ_IOP331_XINT3        IOP331_IRQ(27)
  52 #define IRQ_IOP331_RSVD_28  IOP331_IRQ(28)
  53 #define IRQ_IOP331_RSVD_29  IOP331_IRQ(29)
  54 #define IRQ_IOP331_RSVD_30  IOP331_IRQ(30)
  55 #define IRQ_IOP331_RSVD_31  IOP331_IRQ(31)
  56 #define IRQ_IOP331_XINT8    IOP331_IRQ(32)  // 0
  57 #define IRQ_IOP331_XINT9    IOP331_IRQ(33)  // 1
  58 #define IRQ_IOP331_XINT10   IOP331_IRQ(34)  // 2
  59 #define IRQ_IOP331_XINT11   IOP331_IRQ(35)  // 3
  60 #define IRQ_IOP331_XINT12   IOP331_IRQ(36)  // 4
  61 #define IRQ_IOP331_XINT13   IOP331_IRQ(37)  // 5
  62 #define IRQ_IOP331_XINT14   IOP331_IRQ(38)  // 6
  63 #define IRQ_IOP331_XINT15   IOP331_IRQ(39)  // 7
  64 #define IRQ_IOP331_RSVD_40  IOP331_IRQ(40)  // 8
  65 #define IRQ_IOP331_RSVD_41  IOP331_IRQ(41)  // 9
  66 #define IRQ_IOP331_RSVD_42  IOP331_IRQ(42)  // 10
  67 #define IRQ_IOP331_RSVD_43  IOP331_IRQ(43)  // 11
  68 #define IRQ_IOP331_RSVD_44  IOP331_IRQ(44)  // 12
  69 #define IRQ_IOP331_RSVD_45  IOP331_IRQ(45)  // 13
  70 #define IRQ_IOP331_RSVD_46  IOP331_IRQ(46)  // 14
  71 #define IRQ_IOP331_RSVD_47  IOP331_IRQ(47)  // 15
  72 #define IRQ_IOP331_RSVD_48  IOP331_IRQ(48)  // 16
  73 #define IRQ_IOP331_RSVD_49  IOP331_IRQ(49)  // 17
  74 #define IRQ_IOP331_RSVD_50  IOP331_IRQ(50)  // 18
  75 #define IRQ_IOP331_UART0    IOP331_IRQ(51)  // 19
  76 #define IRQ_IOP331_UART1    IOP331_IRQ(52)  // 20
  77 #define IRQ_IOP331_PBIE     IOP331_IRQ(53)  // 21
  78 #define IRQ_IOP331_ATU_CRW  IOP331_IRQ(54)  // 22
  79 #define IRQ_IOP331_ATU_ERR      IOP331_IRQ(55)  // 23
  80 #define IRQ_IOP331_MCU_ERR      IOP331_IRQ(56)  // 24
  81 #define IRQ_IOP331_DMA0_ERR     IOP331_IRQ(57)  // 25
  82 #define IRQ_IOP331_DMA1_ERR     IOP331_IRQ(58)  // 26
  83 #define IRQ_IOP331_RSVD_59  IOP331_IRQ(59)  // 27
  84 #define IRQ_IOP331_AA_ERR       IOP331_IRQ(60)  // 28
  85 #define IRQ_IOP331_RSVD_61  IOP331_IRQ(61)  // 29
  86 #define IRQ_IOP331_MSG_ERR      IOP331_IRQ(62)  // 30
  87 #define IRQ_IOP331_HPI          IOP331_IRQ(63)  // 31
  88
  89 #define NR_IOP331_IRQS          (IOP331_IRQ(63) + 1)
  90
  91 #define NR_IRQS                 NR_IOP331_IRQS
  92
  93
  94 #if defined(CONFIG_ARCH_IQ80331)
  95 /*
  96  * Interrupts available on the IQ80331 board
  97  */
  98
  99 /*
 100  * On board devices
 101  */
 102 #define IRQ_IQ80331_I82544      IRQ_IOP331_XINT0
 103 #define IRQ_IQ80331_UART0       IRQ_IOP331_UART0
 104 #define IRQ_IQ80331_UART1       IRQ_IOP331_UART1
 105
 106 /*
 107  * PCI interrupts
 108  */
 109 #define IRQ_IQ80331_INTA        IRQ_IOP331_XINT0
 110 #define IRQ_IQ80331_INTB        IRQ_IOP331_XINT1
 111 #define IRQ_IQ80331_INTC        IRQ_IOP331_XINT2
 112 #define IRQ_IQ80331_INTD        IRQ_IOP331_XINT3
 113
 114 #elif defined(CONFIG_MACH_IQ80332)
 115 /*
 116  * Interrupts available on the IQ80332 board
 117  */
 118
 119 /*
 120  * On board devices
 121  */
 122 #define IRQ_IQ80332_I82544      IRQ_IOP331_XINT0
 123 #define IRQ_IQ80332_UART0       IRQ_IOP331_UART0
 124 #define IRQ_IQ80332_UART1       IRQ_IOP331_UART1
 125
 126 /*
 127  * PCI interrupts
 128  */
 129 #define IRQ_IQ80332_INTA        IRQ_IOP331_XINT0
 130 #define IRQ_IQ80332_INTB        IRQ_IOP331_XINT1
 131 #define IRQ_IQ80332_INTC        IRQ_IOP331_XINT2
 132 #define IRQ_IQ80332_INTD        IRQ_IOP331_XINT3
 133
 134 #endif
 135
 136 #endif // _IOP331_IRQ_H_