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[pohmelfs.git] / include / asm-arm / ptrace.h
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1 /*
2 * linux/include/asm-arm/ptrace.h
4 * Copyright (C) 1996-2003 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #ifndef __ASM_ARM_PTRACE_H
11 #define __ASM_ARM_PTRACE_H
13 #include <linux/config.h>
15 #define PTRACE_GETREGS 12
16 #define PTRACE_SETREGS 13
17 #define PTRACE_GETFPREGS 14
18 #define PTRACE_SETFPREGS 15
20 #define PTRACE_GETWMMXREGS 18
21 #define PTRACE_SETWMMXREGS 19
23 #define PTRACE_OLDSETOPTIONS 21
25 #define PTRACE_GET_THREAD_AREA 22
27 * PSR bits
29 #define USR26_MODE 0x00000000
30 #define FIQ26_MODE 0x00000001
31 #define IRQ26_MODE 0x00000002
32 #define SVC26_MODE 0x00000003
33 #define USR_MODE 0x00000010
34 #define FIQ_MODE 0x00000011
35 #define IRQ_MODE 0x00000012
36 #define SVC_MODE 0x00000013
37 #define ABT_MODE 0x00000017
38 #define UND_MODE 0x0000001b
39 #define SYSTEM_MODE 0x0000001f
40 #define MODE32_BIT 0x00000010
41 #define MODE_MASK 0x0000001f
42 #define PSR_T_BIT 0x00000020
43 #define PSR_F_BIT 0x00000040
44 #define PSR_I_BIT 0x00000080
45 #define PSR_J_BIT 0x01000000
46 #define PSR_Q_BIT 0x08000000
47 #define PSR_V_BIT 0x10000000
48 #define PSR_C_BIT 0x20000000
49 #define PSR_Z_BIT 0x40000000
50 #define PSR_N_BIT 0x80000000
51 #define PCMASK 0
54 * Groups of PSR bits
56 #define PSR_f 0xff000000 /* Flags */
57 #define PSR_s 0x00ff0000 /* Status */
58 #define PSR_x 0x0000ff00 /* Extension */
59 #define PSR_c 0x000000ff /* Control */
61 #ifndef __ASSEMBLY__
63 /* this struct defines the way the registers are stored on the
64 stack during a system call. */
66 struct pt_regs {
67 long uregs[18];
70 #define ARM_cpsr uregs[16]
71 #define ARM_pc uregs[15]
72 #define ARM_lr uregs[14]
73 #define ARM_sp uregs[13]
74 #define ARM_ip uregs[12]
75 #define ARM_fp uregs[11]
76 #define ARM_r10 uregs[10]
77 #define ARM_r9 uregs[9]
78 #define ARM_r8 uregs[8]
79 #define ARM_r7 uregs[7]
80 #define ARM_r6 uregs[6]
81 #define ARM_r5 uregs[5]
82 #define ARM_r4 uregs[4]
83 #define ARM_r3 uregs[3]
84 #define ARM_r2 uregs[2]
85 #define ARM_r1 uregs[1]
86 #define ARM_r0 uregs[0]
87 #define ARM_ORIG_r0 uregs[17]
89 #ifdef __KERNEL__
91 #define user_mode(regs) \
92 (((regs)->ARM_cpsr & 0xf) == 0)
94 #ifdef CONFIG_ARM_THUMB
95 #define thumb_mode(regs) \
96 (((regs)->ARM_cpsr & PSR_T_BIT))
97 #else
98 #define thumb_mode(regs) (0)
99 #endif
101 #define processor_mode(regs) \
102 ((regs)->ARM_cpsr & MODE_MASK)
104 #define interrupts_enabled(regs) \
105 (!((regs)->ARM_cpsr & PSR_I_BIT))
107 #define fast_interrupts_enabled(regs) \
108 (!((regs)->ARM_cpsr & PSR_F_BIT))
110 #define condition_codes(regs) \
111 ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
113 /* Are the current registers suitable for user mode?
114 * (used to maintain security in signal handlers)
116 static inline int valid_user_regs(struct pt_regs *regs)
118 if (user_mode(regs) &&
119 (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
120 return 1;
123 * Force CPSR to something logical...
125 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
127 return 0;
130 #endif /* __KERNEL__ */
132 #define pc_pointer(v) \
133 ((v) & ~PCMASK)
135 #define instruction_pointer(regs) \
136 (pc_pointer((regs)->ARM_pc))
138 #ifdef CONFIG_SMP
139 extern unsigned long profile_pc(struct pt_regs *regs);
140 #else
141 #define profile_pc(regs) instruction_pointer(regs)
142 #endif
144 #ifdef __KERNEL__
145 #define predicate(x) ((x) & 0xf0000000)
146 #define PREDICATE_ALWAYS 0xe0000000
147 #endif
149 #endif /* __ASSEMBLY__ */
151 #endif