include/asm-cris/arch-v32/hwregs/rt_trace_defs.h

   1 #ifndef __rt_trace_defs_h
   2 #define __rt_trace_defs_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/rt_trace/rtl/rt_regs.r
   7  *     id:           rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
   8  *     last modfied: Mon Apr 11 16:09:14 2005
   9  *
  10  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile rt_trace_defs.h ../../inst/rt_trace/rtl/rt_regs.r
  11  *      id: $Id: rt_trace_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16 /* Main access macros */
  17 #ifndef REG_RD
  18 #define REG_RD( scope, inst, reg ) \
  19   REG_READ( reg_##scope##_##reg, \
  20             (inst) + REG_RD_ADDR_##scope##_##reg )
  21 #endif
  22
  23 #ifndef REG_WR
  24 #define REG_WR( scope, inst, reg, val ) \
  25   REG_WRITE( reg_##scope##_##reg, \
  26              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  27 #endif
  28
  29 #ifndef REG_RD_VECT
  30 #define REG_RD_VECT( scope, inst, reg, index ) \
  31   REG_READ( reg_##scope##_##reg, \
  32             (inst) + REG_RD_ADDR_##scope##_##reg + \
  33             (index) * STRIDE_##scope##_##reg )
  34 #endif
  35
  36 #ifndef REG_WR_VECT
  37 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  38   REG_WRITE( reg_##scope##_##reg, \
  39              (inst) + REG_WR_ADDR_##scope##_##reg + \
  40              (index) * STRIDE_##scope##_##reg, (val) )
  41 #endif
  42
  43 #ifndef REG_RD_INT
  44 #define REG_RD_INT( scope, inst, reg ) \
  45   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  46 #endif
  47
  48 #ifndef REG_WR_INT
  49 #define REG_WR_INT( scope, inst, reg, val ) \
  50   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  51 #endif
  52
  53 #ifndef REG_RD_INT_VECT
  54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  55   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  56             (index) * STRIDE_##scope##_##reg )
  57 #endif
  58
  59 #ifndef REG_WR_INT_VECT
  60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  61   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  62              (index) * STRIDE_##scope##_##reg, (val) )
  63 #endif
  64
  65 #ifndef REG_TYPE_CONV
  66 #define REG_TYPE_CONV( type, orgtype, val ) \
  67   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  68 #endif
  69
  70 #ifndef reg_page_size
  71 #define reg_page_size 8192
  72 #endif
  73
  74 #ifndef REG_ADDR
  75 #define REG_ADDR( scope, inst, reg ) \
  76   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  77 #endif
  78
  79 #ifndef REG_ADDR_VECT
  80 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  81   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  82     (index) * STRIDE_##scope##_##reg )
  83 #endif
  84
  85 /* C-code for register scope rt_trace */
  86
  87 /* Register rw_cfg, scope rt_trace, type rw */
  88 typedef struct {
  89   unsigned int en       : 1;
  90   unsigned int mode     : 1;
  91   unsigned int owner    : 1;
  92   unsigned int wp       : 1;
  93   unsigned int stall    : 1;
  94   unsigned int dummy1   : 3;
  95   unsigned int wp_start : 7;
  96   unsigned int dummy2   : 1;
  97   unsigned int wp_stop  : 7;
  98   unsigned int dummy3   : 9;
  99 } reg_rt_trace_rw_cfg;
 100 #define REG_RD_ADDR_rt_trace_rw_cfg 0
 101 #define REG_WR_ADDR_rt_trace_rw_cfg 0
 102
 103 /* Register rw_tap_ctrl, scope rt_trace, type rw */
 104 typedef struct {
 105   unsigned int ack_data : 1;
 106   unsigned int ack_guru : 1;
 107   unsigned int dummy1   : 30;
 108 } reg_rt_trace_rw_tap_ctrl;
 109 #define REG_RD_ADDR_rt_trace_rw_tap_ctrl 4
 110 #define REG_WR_ADDR_rt_trace_rw_tap_ctrl 4
 111
 112 /* Register r_tap_stat, scope rt_trace, type r */
 113 typedef struct {
 114   unsigned int dav   : 1;
 115   unsigned int empty : 1;
 116   unsigned int dummy1 : 30;
 117 } reg_rt_trace_r_tap_stat;
 118 #define REG_RD_ADDR_rt_trace_r_tap_stat 8
 119
 120 /* Register rw_tap_data, scope rt_trace, type rw */
 121 typedef unsigned int reg_rt_trace_rw_tap_data;
 122 #define REG_RD_ADDR_rt_trace_rw_tap_data 12
 123 #define REG_WR_ADDR_rt_trace_rw_tap_data 12
 124
 125 /* Register rw_tap_hdata, scope rt_trace, type rw */
 126 typedef struct {
 127   unsigned int op     : 4;
 128   unsigned int sub_op : 4;
 129   unsigned int dummy1 : 24;
 130 } reg_rt_trace_rw_tap_hdata;
 131 #define REG_RD_ADDR_rt_trace_rw_tap_hdata 16
 132 #define REG_WR_ADDR_rt_trace_rw_tap_hdata 16
 133
 134 /* Register r_redir, scope rt_trace, type r */
 135 typedef unsigned int reg_rt_trace_r_redir;
 136 #define REG_RD_ADDR_rt_trace_r_redir 20
 137
 138
 139 /* Constants */
 140 enum {
 141   regk_rt_trace_brk                        = 0x0000000c,
 142   regk_rt_trace_dbg                        = 0x00000003,
 143   regk_rt_trace_dbgdi                      = 0x00000004,
 144   regk_rt_trace_dbgdo                      = 0x00000005,
 145   regk_rt_trace_gmode                      = 0x00000000,
 146   regk_rt_trace_no                         = 0x00000000,
 147   regk_rt_trace_nop                        = 0x00000000,
 148   regk_rt_trace_normal                     = 0x00000000,
 149   regk_rt_trace_rdmem                      = 0x00000007,
 150   regk_rt_trace_rdmemb                     = 0x00000009,
 151   regk_rt_trace_rdpreg                     = 0x00000002,
 152   regk_rt_trace_rdreg                      = 0x00000001,
 153   regk_rt_trace_rdsreg                     = 0x00000003,
 154   regk_rt_trace_redir                      = 0x00000006,
 155   regk_rt_trace_ret                        = 0x0000000b,
 156   regk_rt_trace_rw_cfg_default             = 0x00000000,
 157   regk_rt_trace_trcfg                      = 0x00000001,
 158   regk_rt_trace_wp                         = 0x00000001,
 159   regk_rt_trace_wp0                        = 0x00000001,
 160   regk_rt_trace_wp1                        = 0x00000002,
 161   regk_rt_trace_wp2                        = 0x00000004,
 162   regk_rt_trace_wp3                        = 0x00000008,
 163   regk_rt_trace_wp4                        = 0x00000010,
 164   regk_rt_trace_wp5                        = 0x00000020,
 165   regk_rt_trace_wp6                        = 0x00000040,
 166   regk_rt_trace_wrmem                      = 0x00000008,
 167   regk_rt_trace_wrmemb                     = 0x0000000a,
 168   regk_rt_trace_wrpreg                     = 0x00000005,
 169   regk_rt_trace_wrreg                      = 0x00000004,
 170   regk_rt_trace_wrsreg                     = 0x00000006,
 171   regk_rt_trace_yes                        = 0x00000001
 172 };
 173 #endif /* __rt_trace_defs_h */