2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
9 #include <linux/config.h>
15 * This file essentially defines the interface between board
16 * specific PCI code and MIPS common PCI code. Should potentially put
17 * into include/asm/pci.h file.
20 #include <linux/ioport.h>
23 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
24 * multiple PCI channels may have multiple PCI host controllers or a
25 * single controller supporting multiple channels.
27 struct pci_controller
{
28 struct pci_controller
*next
;
31 struct pci_ops
*pci_ops
;
32 struct resource
*mem_resource
;
33 unsigned long mem_offset
;
34 struct resource
*io_resource
;
35 unsigned long io_offset
;
38 /* For compatibility with current (as of July 2003) pciutils
39 and XFree86. Eventually will be removed. */
40 unsigned int need_domain_info
;
44 /* Optional access methods for reading/writing the bus number
45 of the PCI controller */
46 int (*get_busno
)(void);
47 void (*set_busno
)(int busno
);
51 * Used by boards to register their PCI busses before the actual scanning.
53 extern struct pci_controller
* alloc_pci_controller(void);
54 extern void register_pci_controller(struct pci_controller
*hose
);
57 * board supplied pci irq fixup routine
59 extern int pcibios_map_irq(struct pci_dev
*dev
, u8 slot
, u8 pin
);
62 /* Can be used to override the logic in pci_scan_bus for skipping
63 already-configured bus numbers - to be used for buggy BIOSes
64 or architectures with incomplete PCI setup by the loader */
66 extern unsigned int pcibios_assign_all_busses(void);
68 #define pcibios_scan_all_fns(a, b) 0
70 extern unsigned long PCIBIOS_MIN_IO
;
71 extern unsigned long PCIBIOS_MIN_MEM
;
73 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
75 extern void pcibios_set_master(struct pci_dev
*dev
);
77 static inline void pcibios_penalize_isa_irq(int irq
, int active
)
79 /* We don't do dynamic PCI IRQ allocation */
83 * Dynamic DMA mapping stuff.
84 * MIPS has everything mapped statically.
87 #include <linux/types.h>
88 #include <linux/slab.h>
89 #include <asm/scatterlist.h>
90 #include <linux/string.h>
96 * The PCI address space does equal the physical memory address space. The
97 * networking and block device layers use this boolean for bounce buffer
98 * decisions. This is set if any hose does not have an IOMMU.
100 extern unsigned int PCI_DMA_BUS_IS_PHYS
;
102 #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
104 /* pci_unmap_{single,page} is not a nop, thus... */
105 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
106 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
107 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
108 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
109 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
110 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
112 #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
114 /* pci_unmap_{page,single} is a nop so... */
115 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
116 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
117 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
118 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
119 #define pci_unmap_len(PTR, LEN_NAME) (0)
120 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
122 #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
124 /* This is always fine. */
125 #define pci_dac_dma_supported(pci_dev, mask) (1)
127 extern dma64_addr_t
pci_dac_page_to_dma(struct pci_dev
*pdev
,
128 struct page
*page
, unsigned long offset
, int direction
);
129 extern struct page
*pci_dac_dma_to_page(struct pci_dev
*pdev
,
130 dma64_addr_t dma_addr
);
131 extern unsigned long pci_dac_dma_to_offset(struct pci_dev
*pdev
,
132 dma64_addr_t dma_addr
);
133 extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev
*pdev
,
134 dma64_addr_t dma_addr
, size_t len
, int direction
);
135 extern void pci_dac_dma_sync_single_for_device(struct pci_dev
*pdev
,
136 dma64_addr_t dma_addr
, size_t len
, int direction
);
139 static inline void pci_dma_burst_advice(struct pci_dev
*pdev
,
140 enum pci_dma_burst_strategy
*strat
,
141 unsigned long *strategy_parameter
)
143 *strat
= PCI_DMA_BURST_INFINITY
;
144 *strategy_parameter
= ~0UL;
148 extern void pcibios_resource_to_bus(struct pci_dev
*dev
,
149 struct pci_bus_region
*region
, struct resource
*res
);
151 extern void pcibios_bus_to_resource(struct pci_dev
*dev
, struct resource
*res
,
152 struct pci_bus_region
*region
);
154 static inline struct resource
*
155 pcibios_select_root(struct pci_dev
*pdev
, struct resource
*res
)
157 struct resource
*root
= NULL
;
159 if (res
->flags
& IORESOURCE_IO
)
160 root
= &ioport_resource
;
161 if (res
->flags
& IORESOURCE_MEM
)
162 root
= &iomem_resource
;
167 #ifdef CONFIG_PCI_DOMAINS
169 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
171 static inline int pci_proc_domain(struct pci_bus
*bus
)
173 struct pci_controller
*hose
= bus
->sysdata
;
174 return hose
->need_domain_info
;
177 #endif /* CONFIG_PCI_DOMAINS */
179 #endif /* __KERNEL__ */
181 /* implement the pci_ DMA API in terms of the generic device dma_ one */
182 #include <asm-generic/pci-dma-compat.h>
184 static inline void pcibios_add_platform_entries(struct pci_dev
*dev
)
188 /* Do platform specific device initialization at pci_enable_device() time */
189 extern int pcibios_plat_dev_init(struct pci_dev
*dev
);
191 #endif /* _ASM_PCI_H */