2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
20 #include <asm/arch/board.h>
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/gpio.h>
24 #include <video/atmel_lcdc.h>
26 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
27 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
29 /* configurable parameters */
30 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
31 #define ATMEL_LCDC_DMA_BURST_LEN 8
33 #if defined(CONFIG_ARCH_AT91SAM9263)
34 #define ATMEL_LCDC_FIFO_SIZE 2048
36 #define ATMEL_LCDC_FIFO_SIZE 512
39 #if defined(CONFIG_ARCH_AT91)
40 #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
42 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
43 struct fb_var_screeninfo
*var
)
47 #elif defined(CONFIG_AVR32)
48 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
49 | FBINFO_PARTIAL_PAN_OK \
50 | FBINFO_HWACCEL_XPAN \
51 | FBINFO_HWACCEL_YPAN)
53 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
54 struct fb_var_screeninfo
*var
)
59 pixeloff
= (var
->xoffset
* var
->bits_per_pixel
) & 0x1f;
61 dma2dcfg
= ((var
->xres_virtual
- var
->xres
) * var
->bits_per_pixel
) / 8;
62 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
63 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
65 /* Update configuration */
66 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
67 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
68 | ATMEL_LCDC_DMAUPDT
);
73 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
74 .type
= FB_TYPE_PACKED_PIXELS
,
75 .visual
= FB_VISUAL_TRUECOLOR
,
79 .accel
= FB_ACCEL_NONE
,
82 static unsigned long compute_hozval(unsigned long xres
, unsigned long lcdcon2
)
86 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
90 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
92 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
95 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
96 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
97 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
98 value
= DIV_ROUND_UP(value
, 4);
100 value
= DIV_ROUND_UP(value
, 8);
106 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
107 struct fb_var_screeninfo
*var
)
109 struct atmel_lcdfb_info
*sinfo
= info
->par
;
110 struct fb_fix_screeninfo
*fix
= &info
->fix
;
111 unsigned long dma_addr
;
113 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
114 + var
->xoffset
* var
->bits_per_pixel
/ 8);
118 /* Set framebuffer DMA base address and pixel offset */
119 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
121 atmel_lcdfb_update_dma2d(sinfo
, var
);
124 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
126 struct fb_info
*info
= sinfo
->info
;
128 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
129 info
->screen_base
, info
->fix
.smem_start
);
133 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
134 * @sinfo: the frame buffer to allocate memory for
136 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
138 struct fb_info
*info
= sinfo
->info
;
139 struct fb_var_screeninfo
*var
= &info
->var
;
141 info
->fix
.smem_len
= (var
->xres_virtual
* var
->yres_virtual
142 * ((var
->bits_per_pixel
+ 7) / 8));
144 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
145 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
147 if (!info
->screen_base
) {
155 * atmel_lcdfb_check_var - Validates a var passed in.
156 * @var: frame buffer variable screen structure
157 * @info: frame buffer structure that represents a single frame buffer
159 * Checks to see if the hardware supports the state requested by
160 * var passed in. This function does not alter the hardware
161 * state!!! This means the data stored in struct fb_info and
162 * struct atmel_lcdfb_info do not change. This includes the var
163 * inside of struct fb_info. Do NOT change these. This function
164 * can be called on its own if we intent to only test a mode and
165 * not actually set it. The stuff in modedb.c is a example of
166 * this. If the var passed in is slightly off by what the
167 * hardware can support then we alter the var PASSED in to what
168 * we can do. If the hardware doesn't support mode change a
169 * -EINVAL will be returned by the upper layers. You don't need
170 * to implement this function then. If you hardware doesn't
171 * support changing the resolution then this function is not
172 * needed. In this case the driver would just provide a var that
173 * represents the static state the screen is in.
175 * Returns negative errno on error, or zero on success.
177 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
178 struct fb_info
*info
)
180 struct device
*dev
= info
->device
;
181 struct atmel_lcdfb_info
*sinfo
= info
->par
;
182 unsigned long clk_value_khz
;
184 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
186 dev_dbg(dev
, "%s:\n", __func__
);
187 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
188 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
189 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
190 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
192 if ((PICOS2KHZ(var
->pixclock
) * var
->bits_per_pixel
/ 8) > clk_value_khz
) {
193 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
197 /* Force same alignment for each line */
198 var
->xres
= (var
->xres
+ 3) & ~3UL;
199 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
201 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
202 var
->transp
.msb_right
= 0;
203 var
->transp
.offset
= var
->transp
.length
= 0;
204 var
->xoffset
= var
->yoffset
= 0;
206 switch (var
->bits_per_pixel
) {
211 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
212 var
->red
.length
= var
->green
.length
= var
->blue
.length
213 = var
->bits_per_pixel
;
218 var
->green
.offset
= 5;
219 var
->blue
.offset
= 10;
220 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 5;
223 var
->transp
.offset
= 24;
224 var
->transp
.length
= 8;
228 var
->green
.offset
= 8;
229 var
->blue
.offset
= 16;
230 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
233 dev_err(dev
, "color depth %d not supported\n",
234 var
->bits_per_pixel
);
242 * atmel_lcdfb_set_par - Alters the hardware state.
243 * @info: frame buffer structure that represents a single frame buffer
245 * Using the fb_var_screeninfo in fb_info we set the resolution
246 * of the this particular framebuffer. This function alters the
247 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
248 * not alter var in fb_info since we are using that data. This
249 * means we depend on the data in var inside fb_info to be
250 * supported by the hardware. atmel_lcdfb_check_var is always called
251 * before atmel_lcdfb_set_par to ensure this. Again if you can't
252 * change the resolution you don't need this function.
255 static int atmel_lcdfb_set_par(struct fb_info
*info
)
257 struct atmel_lcdfb_info
*sinfo
= info
->par
;
258 unsigned long hozval_linesz
;
260 unsigned long clk_value_khz
;
261 unsigned long bits_per_line
;
263 dev_dbg(info
->device
, "%s:\n", __func__
);
264 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
265 info
->var
.xres
, info
->var
.yres
,
266 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
268 /* Turn off the LCD controller and the DMA controller */
269 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
, sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
271 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
273 if (info
->var
.bits_per_pixel
== 1)
274 info
->fix
.visual
= FB_VISUAL_MONO01
;
275 else if (info
->var
.bits_per_pixel
<= 8)
276 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
278 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
280 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
281 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
283 /* Re-initialize the DMA engine... */
284 dev_dbg(info
->device
, " * update DMA engine\n");
285 atmel_lcdfb_update_dma(info
, &info
->var
);
287 /* ...set frame size and burst length = 8 words (?) */
288 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
289 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
290 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
292 /* Now, the LCDC core... */
294 /* Set pixel clock */
295 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
297 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
299 value
= (value
/ 2) - 1;
300 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n", value
);
303 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
304 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
306 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
307 info
->var
.pixclock
= KHZ2PICOS(clk_value_khz
/ (2 * (value
+ 1)));
308 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
309 PICOS2KHZ(info
->var
.pixclock
));
313 /* Initialize control register 2 */
314 value
= sinfo
->default_lcdcon2
;
316 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
317 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
318 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
319 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
321 switch (info
->var
.bits_per_pixel
) {
322 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
323 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
324 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
325 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
326 case 15: /* fall through */
327 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
328 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
329 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
330 default: BUG(); break;
332 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
333 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
335 /* Vertical timing */
336 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
337 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
338 value
|= info
->var
.lower_margin
;
339 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
340 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
342 /* Horizontal timing */
343 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
344 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
345 value
|= (info
->var
.left_margin
- 1);
346 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
347 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
349 /* Horizontal value (aka line size) */
350 hozval_linesz
= compute_hozval(info
->var
.xres
,
351 lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
));
354 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
355 value
|= info
->var
.yres
- 1;
356 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
357 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
359 /* FIFO Threshold: Use formula from data sheet */
360 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
361 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
363 /* Toggle LCD_MODE every frame */
364 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
366 /* Disable all interrupts */
367 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
370 value
= ATMEL_LCDC_PS_DIV8
| ATMEL_LCDC_POL_POSITIVE
| ATMEL_LCDC_ENA_PWMENABLE
;
371 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, value
);
372 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
373 /* ...wait for DMA engine to become idle... */
374 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
377 dev_dbg(info
->device
, " * re-enable DMA engine\n");
378 /* ...and enable it with updated configuration */
379 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, sinfo
->default_dmacon
);
381 dev_dbg(info
->device
, " * re-enable LCDC core\n");
382 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
383 (sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
) | ATMEL_LCDC_PWR
);
385 dev_dbg(info
->device
, " * DONE\n");
390 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
393 chan
>>= 16 - bf
->length
;
394 return chan
<< bf
->offset
;
398 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
399 * @regno: Which register in the CLUT we are programming
400 * @red: The red value which can be up to 16 bits wide
401 * @green: The green value which can be up to 16 bits wide
402 * @blue: The blue value which can be up to 16 bits wide.
403 * @transp: If supported the alpha value which can be up to 16 bits wide.
404 * @info: frame buffer info structure
406 * Set a single color register. The values supplied have a 16 bit
407 * magnitude which needs to be scaled in this function for the hardware.
408 * Things to take into consideration are how many color registers, if
409 * any, are supported with the current color visual. With truecolor mode
410 * no color palettes are supported. Here a psuedo palette is created
411 * which we store the value in pseudo_palette in struct fb_info. For
412 * pseudocolor mode we have a limited color palette. To deal with this
413 * we can program what color is displayed for a particular pixel value.
414 * DirectColor is similar in that we can program each color field. If
415 * we have a static colormap we don't need to implement this function.
417 * Returns negative errno on error, or zero on success. In an
418 * ideal world, this would have been the case, but as it turns
419 * out, the other drivers return 1 on failure, so that's what
422 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
423 unsigned int green
, unsigned int blue
,
424 unsigned int transp
, struct fb_info
*info
)
426 struct atmel_lcdfb_info
*sinfo
= info
->par
;
431 if (info
->var
.grayscale
)
432 red
= green
= blue
= (19595 * red
+ 38470 * green
433 + 7471 * blue
) >> 16;
435 switch (info
->fix
.visual
) {
436 case FB_VISUAL_TRUECOLOR
:
438 pal
= info
->pseudo_palette
;
440 val
= chan_to_field(red
, &info
->var
.red
);
441 val
|= chan_to_field(green
, &info
->var
.green
);
442 val
|= chan_to_field(blue
, &info
->var
.blue
);
449 case FB_VISUAL_PSEUDOCOLOR
:
451 val
= ((red
>> 11) & 0x001f);
452 val
|= ((green
>> 6) & 0x03e0);
453 val
|= ((blue
>> 1) & 0x7c00);
456 * TODO: intensity bit. Maybe something like
457 * ~(red[10] ^ green[10] ^ blue[10]) & 1
460 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
465 case FB_VISUAL_MONO01
:
467 val
= (regno
== 0) ? 0x00 : 0x1F;
468 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
478 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
479 struct fb_info
*info
)
481 dev_dbg(info
->device
, "%s\n", __func__
);
483 atmel_lcdfb_update_dma(info
, var
);
488 static struct fb_ops atmel_lcdfb_ops
= {
489 .owner
= THIS_MODULE
,
490 .fb_check_var
= atmel_lcdfb_check_var
,
491 .fb_set_par
= atmel_lcdfb_set_par
,
492 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
493 .fb_pan_display
= atmel_lcdfb_pan_display
,
494 .fb_fillrect
= cfb_fillrect
,
495 .fb_copyarea
= cfb_copyarea
,
496 .fb_imageblit
= cfb_imageblit
,
499 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
501 struct fb_info
*info
= dev_id
;
502 struct atmel_lcdfb_info
*sinfo
= info
->par
;
505 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
506 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, status
);
510 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
512 struct fb_info
*info
= sinfo
->info
;
515 memset_io(info
->screen_base
, 0, info
->fix
.smem_len
);
516 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
518 dev_info(info
->device
,
519 "%luKiB frame buffer at %08lx (mapped at %p)\n",
520 (unsigned long)info
->fix
.smem_len
/ 1024,
521 (unsigned long)info
->fix
.smem_start
,
524 /* Allocate colormap */
525 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
527 dev_err(info
->device
, "Alloc color map failed\n");
532 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
535 clk_enable(sinfo
->bus_clk
);
536 clk_enable(sinfo
->lcdc_clk
);
539 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
542 clk_disable(sinfo
->bus_clk
);
543 clk_disable(sinfo
->lcdc_clk
);
547 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
549 struct device
*dev
= &pdev
->dev
;
550 struct fb_info
*info
;
551 struct atmel_lcdfb_info
*sinfo
;
552 struct atmel_lcdfb_info
*pdata_sinfo
;
553 struct resource
*regs
= NULL
;
554 struct resource
*map
= NULL
;
557 dev_dbg(dev
, "%s BEGIN\n", __func__
);
560 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
562 dev_err(dev
, "cannot allocate memory\n");
568 if (dev
->platform_data
) {
569 pdata_sinfo
= (struct atmel_lcdfb_info
*)dev
->platform_data
;
570 sinfo
->default_bpp
= pdata_sinfo
->default_bpp
;
571 sinfo
->default_dmacon
= pdata_sinfo
->default_dmacon
;
572 sinfo
->default_lcdcon2
= pdata_sinfo
->default_lcdcon2
;
573 sinfo
->default_monspecs
= pdata_sinfo
->default_monspecs
;
574 sinfo
->atmel_lcdfb_power_control
= pdata_sinfo
->atmel_lcdfb_power_control
;
575 sinfo
->guard_time
= pdata_sinfo
->guard_time
;
577 dev_err(dev
, "cannot get default configuration\n");
583 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
584 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
585 info
->pseudo_palette
= sinfo
->pseudo_palette
;
586 info
->fbops
= &atmel_lcdfb_ops
;
588 memcpy(&info
->monspecs
, sinfo
->default_monspecs
, sizeof(info
->monspecs
));
589 info
->fix
= atmel_lcdfb_fix
;
591 /* Enable LCDC Clocks */
592 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
593 sinfo
->bus_clk
= clk_get(dev
, "hck1");
594 if (IS_ERR(sinfo
->bus_clk
)) {
595 ret
= PTR_ERR(sinfo
->bus_clk
);
599 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
600 if (IS_ERR(sinfo
->lcdc_clk
)) {
601 ret
= PTR_ERR(sinfo
->lcdc_clk
);
604 atmel_lcdfb_start_clock(sinfo
);
606 ret
= fb_find_mode(&info
->var
, info
, NULL
, info
->monspecs
.modedb
,
607 info
->monspecs
.modedb_len
, info
->monspecs
.modedb
,
610 dev_err(dev
, "no suitable video mode found\n");
615 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
617 dev_err(dev
, "resources unusable\n");
622 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
623 if (sinfo
->irq_base
< 0) {
624 dev_err(dev
, "unable to get irq\n");
625 ret
= sinfo
->irq_base
;
629 /* Initialize video memory */
630 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
632 /* use a pre-allocated memory buffer */
633 info
->fix
.smem_start
= map
->start
;
634 info
->fix
.smem_len
= map
->end
- map
->start
+ 1;
635 if (!request_mem_region(info
->fix
.smem_start
,
636 info
->fix
.smem_len
, pdev
->name
)) {
641 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
642 if (!info
->screen_base
)
645 /* alocate memory buffer */
646 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
648 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
654 info
->fix
.mmio_start
= regs
->start
;
655 info
->fix
.mmio_len
= regs
->end
- regs
->start
+ 1;
657 if (!request_mem_region(info
->fix
.mmio_start
,
658 info
->fix
.mmio_len
, pdev
->name
)) {
663 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
665 dev_err(dev
, "cannot map LCDC registers\n");
670 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
672 dev_err(dev
, "request_irq failed: %d\n", ret
);
676 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
678 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
679 goto unregister_irqs
;
683 * This makes sure that our colour bitfield
684 * descriptors are correctly initialised.
686 atmel_lcdfb_check_var(&info
->var
, info
);
688 ret
= fb_set_var(info
, &info
->var
);
690 dev_warn(dev
, "unable to set display parameters\n");
694 dev_set_drvdata(dev
, info
);
697 * Tell the world that we're ready to go
699 ret
= register_framebuffer(info
);
701 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
705 /* Power up the LCDC screen */
706 if (sinfo
->atmel_lcdfb_power_control
)
707 sinfo
->atmel_lcdfb_power_control(1);
709 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
710 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
716 fb_dealloc_cmap(&info
->cmap
);
718 free_irq(sinfo
->irq_base
, info
);
720 iounmap(sinfo
->mmio
);
722 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
725 iounmap(info
->screen_base
);
727 atmel_lcdfb_free_video_memory(sinfo
);
731 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
733 atmel_lcdfb_stop_clock(sinfo
);
734 clk_put(sinfo
->lcdc_clk
);
737 clk_put(sinfo
->bus_clk
);
739 framebuffer_release(info
);
741 dev_dbg(dev
, "%s FAILED\n", __func__
);
745 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
747 struct device
*dev
= &pdev
->dev
;
748 struct fb_info
*info
= dev_get_drvdata(dev
);
749 struct atmel_lcdfb_info
*sinfo
= info
->par
;
754 if (sinfo
->atmel_lcdfb_power_control
)
755 sinfo
->atmel_lcdfb_power_control(0);
756 unregister_framebuffer(info
);
757 atmel_lcdfb_stop_clock(sinfo
);
758 clk_put(sinfo
->lcdc_clk
);
760 clk_put(sinfo
->bus_clk
);
761 fb_dealloc_cmap(&info
->cmap
);
762 free_irq(sinfo
->irq_base
, info
);
763 iounmap(sinfo
->mmio
);
764 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
765 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
766 iounmap(info
->screen_base
);
767 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
769 atmel_lcdfb_free_video_memory(sinfo
);
772 dev_set_drvdata(dev
, NULL
);
773 framebuffer_release(info
);
778 static struct platform_driver atmel_lcdfb_driver
= {
779 .remove
= __exit_p(atmel_lcdfb_remove
),
781 .name
= "atmel_lcdfb",
782 .owner
= THIS_MODULE
,
786 static int __init
atmel_lcdfb_init(void)
788 return platform_driver_probe(&atmel_lcdfb_driver
, atmel_lcdfb_probe
);
791 static void __exit
atmel_lcdfb_exit(void)
793 platform_driver_unregister(&atmel_lcdfb_driver
);
796 module_init(atmel_lcdfb_init
);
797 module_exit(atmel_lcdfb_exit
);
799 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
800 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>");
801 MODULE_LICENSE("GPL");