ia64/pv_ops/xen: implement xen pv_time_ops.
[pv_ops_mirror.git] / include / asm-mips / asmmacro.h
blob7a881755800f94a4be165b989a9f2f54fb6ffaa1
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2003 Ralf Baechle
7 */
8 #ifndef _ASM_ASMMACRO_H
9 #define _ASM_ASMMACRO_H
11 #include <asm/hazards.h>
13 #ifdef CONFIG_32BIT
14 #include <asm/asmmacro-32.h>
15 #endif
16 #ifdef CONFIG_64BIT
17 #include <asm/asmmacro-64.h>
18 #endif
19 #ifdef CONFIG_MIPS_MT_SMTC
20 #include <asm/mipsmtregs.h>
21 #endif
23 #ifdef CONFIG_MIPS_MT_SMTC
24 .macro local_irq_enable reg=t0
25 mfc0 \reg, CP0_TCSTATUS
26 ori \reg, \reg, TCSTATUS_IXMT
27 xori \reg, \reg, TCSTATUS_IXMT
28 mtc0 \reg, CP0_TCSTATUS
29 _ehb
30 .endm
32 .macro local_irq_disable reg=t0
33 mfc0 \reg, CP0_TCSTATUS
34 ori \reg, \reg, TCSTATUS_IXMT
35 mtc0 \reg, CP0_TCSTATUS
36 _ehb
37 .endm
38 #else
39 .macro local_irq_enable reg=t0
40 mfc0 \reg, CP0_STATUS
41 ori \reg, \reg, 1
42 mtc0 \reg, CP0_STATUS
43 irq_enable_hazard
44 .endm
46 .macro local_irq_disable reg=t0
47 mfc0 \reg, CP0_STATUS
48 ori \reg, \reg, 1
49 xori \reg, \reg, 1
50 mtc0 \reg, CP0_STATUS
51 irq_disable_hazard
52 .endm
53 #endif /* CONFIG_MIPS_MT_SMTC */
56 * Temporary until all gas have MT ASE support
58 .macro DMT reg=0
59 .word 0x41600bc1 | (\reg << 16)
60 .endm
62 .macro EMT reg=0
63 .word 0x41600be1 | (\reg << 16)
64 .endm
66 .macro DVPE reg=0
67 .word 0x41600001 | (\reg << 16)
68 .endm
70 .macro EVPE reg=0
71 .word 0x41600021 | (\reg << 16)
72 .endm
74 .macro MFTR rt=0, rd=0, u=0, sel=0
75 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
76 .endm
78 .macro MTTR rt=0, rd=0, u=0, sel=0
79 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
80 .endm
82 #endif /* _ASM_ASMMACRO_H */