?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
FUTEX: new PRIVATE futexes
[pv_ops_mirror.git] / drivers / ata / pata_ali.c
blobd40edebb510a59ba41b6fbbd1600a8d9530a19a8
1 /*
2 * pata_ali.c - ALI 15x3 PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * based in part upon
7 * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
8 *
9 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
10 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
11 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
12 *
13 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
14 * May be copied or modified under the terms of the GNU General Public License
15 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
16 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
17 *
18 * Documentation
19 * Chipset documentation available under NDA only
20 *
21 * TODO/CHECK
22 * Cannot have ATAPI on both master & slave for rev < c2 (???) but
23 * otherwise should do atapi DMA.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/dmi.h>
35
36 #define DRV_NAME "pata_ali"
37 #define DRV_VERSION "0.7.4"
38
39 /*
40 * Cable special cases
41 */
42
43 static struct dmi_system_id cable_dmi_table[] = {
44 {
45 .ident = "HP Pavilion N5430",
46 .matches = {
47 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
48 DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
49 },
50 },
51 { }
52 };
53
54 static int ali_cable_override(struct pci_dev *pdev)
55 {
56 /* Fujitsu P2000 */
57 if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
58 return 1;
59 /* Systems by DMI */
60 if (dmi_check_system(cable_dmi_table))
61 return 1;
62 return 0;
63 }
64
65 /**
66 * ali_c2_cable_detect - cable detection
67 * @ap: ATA port
68 *
69 * Perform cable detection for C2 and later revisions
70 */
71
72 static int ali_c2_cable_detect(struct ata_port *ap)
73 {
74 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
75 u8 ata66;
76
77 /* Certain laptops use short but suitable cables and don't
78 implement the detect logic */
79
80 if (ali_cable_override(pdev))
81 return ATA_CBL_PATA40_SHORT;
82
83 /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
84 Bit set for 40 pin */
85 pci_read_config_byte(pdev, 0x4A, &ata66);
86 if (ata66 & (1 << ap->port_no))
87 return ATA_CBL_PATA40;
88 else
89 return ATA_CBL_PATA80;
90 }
91
92 /**
93 * ali_20_filter - filter for earlier ALI DMA
94 * @ap: ALi ATA port
95 * @adev: attached device
96 *
97 * Ensure that we do not do DMA on CD devices. We may be able to
98 * fix that later on. Also ensure we do not do UDMA on WDC drives
99 */
100
101 static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
102 {
103 char model_num[ATA_ID_PROD_LEN + 1];
104 /* No DMA on anything but a disk for now */
105 if (adev->class != ATA_DEV_ATA)
106 mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
107 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
108 if (strstr(model_num, "WDC"))
109 return mask &= ~ATA_MASK_UDMA;
110 return ata_pci_default_filter(adev, mask);
111 }
112
113 /**
114 * ali_fifo_control - FIFO manager
115 * @ap: ALi channel to control
116 * @adev: device for FIFO control
117 * @on: 0 for off 1 for on
118 *
119 * Enable or disable the FIFO on a given device. Because of the way the
120 * ALi FIFO works it provides a boost on ATA disk but can be confused by
121 * ATAPI and we must therefore manage it.
122 */
123
124 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
125 {
126 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
127 int pio_fifo = 0x54 + ap->port_no;
128 u8 fifo;
129 int shift = 4 * adev->devno;
130
131 /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
132 0x00. Not all the docs agree but the behaviour we now use is the
133 one stated in the BIOS Programming Guide */
134
135 pci_read_config_byte(pdev, pio_fifo, &fifo);
136 fifo &= ~(0x0F << shift);
137 if (on)
138 fifo |= (on << shift);
139 pci_write_config_byte(pdev, pio_fifo, fifo);
140 }
141
142 /**
143 * ali_program_modes - load mode registers
144 * @ap: ALi channel to load
145 * @adev: Device the timing is for
146 * @cmd: Command timing
147 * @data: Data timing
148 * @ultra: UDMA timing or zero for off
149 *
150 * Loads the timing registers for cmd/data and disable UDMA if
151 * ultra is zero. If ultra is set then load and enable the UDMA
152 * timing but do not touch the command/data timing.
153 */
154
155 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
156 {
157 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
158 int cas = 0x58 + 4 * ap->port_no; /* Command timing */
159 int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
160 int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
161 int udmat = 0x56 + ap->port_no; /* UDMA timing */
162 int shift = 4 * adev->devno;
163 u8 udma;
164
165 if (t != NULL) {
166 t->setup = FIT(t->setup, 1, 8) & 7;
167 t->act8b = FIT(t->act8b, 1, 8) & 7;
168 t->rec8b = FIT(t->rec8b, 1, 16) & 15;
169 t->active = FIT(t->active, 1, 8) & 7;
170 t->recover = FIT(t->recover, 1, 16) & 15;
171
172 pci_write_config_byte(pdev, cas, t->setup);
173 pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
174 pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
175 }
176
177 /* Set up the UDMA enable */
178 pci_read_config_byte(pdev, udmat, &udma);
179 udma &= ~(0x0F << shift);
180 udma |= ultra << shift;
181 pci_write_config_byte(pdev, udmat, udma);
182 }
183
184 /**
185 * ali_set_piomode - set initial PIO mode data
186 * @ap: ATA interface
187 * @adev: ATA device
188 *
189 * Program the ALi registers for PIO mode. FIXME: add timings for
190 * PIO5.
191 */
192
193 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
194 {
195 struct ata_device *pair = ata_dev_pair(adev);
196 struct ata_timing t;
197 unsigned long T = 1000000000 / 33333; /* PCI clock based */
198
199 ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
200 if (pair) {
201 struct ata_timing p;
202 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
203 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
204 if (pair->dma_mode) {
205 ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
206 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
207 }
208 }
209
210 /* PIO FIFO is only permitted on ATA disk */
211 if (adev->class != ATA_DEV_ATA)
212 ali_fifo_control(ap, adev, 0x00);
213 ali_program_modes(ap, adev, &t, 0);
214 if (adev->class == ATA_DEV_ATA)
215 ali_fifo_control(ap, adev, 0x05);
216
217 }
218
219 /**
220 * ali_set_dmamode - set initial DMA mode data
221 * @ap: ATA interface
222 * @adev: ATA device
223 *
224 * FIXME: MWDMA timings
225 */
226
227 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
228 {
229 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
230 struct ata_device *pair = ata_dev_pair(adev);
231 struct ata_timing t;
232 unsigned long T = 1000000000 / 33333; /* PCI clock based */
233 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
234
235
236 if (adev->class == ATA_DEV_ATA)
237 ali_fifo_control(ap, adev, 0x08);
238
239 if (adev->dma_mode >= XFER_UDMA_0) {
240 ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
241 if (adev->dma_mode >= XFER_UDMA_3) {
242 u8 reg4b;
243 pci_read_config_byte(pdev, 0x4B, &reg4b);
244 reg4b |= 1;
245 pci_write_config_byte(pdev, 0x4B, reg4b);
246 }
247 } else {
248 ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
249 if (pair) {
250 struct ata_timing p;
251 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
252 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
253 if (pair->dma_mode) {
254 ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
255 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
256 }
257 }
258 ali_program_modes(ap, adev, &t, 0);
259 }
260 }
261
262 /**
263 * ali_lock_sectors - Keep older devices to 255 sector mode
264 * @adev: Device
265 *
266 * Called during the bus probe for each device that is found. We use
267 * this call to lock the sector count of the device to 255 or less on
268 * older ALi controllers. If we didn't do this then large I/O's would
269 * require LBA48 commands which the older ALi requires are issued by
270 * slower PIO methods
271 */
272
273 static void ali_lock_sectors(struct ata_device *adev)
274 {
275 adev->max_sectors = 255;
276 }
277
278 static struct scsi_host_template ali_sht = {
279 .module = THIS_MODULE,
280 .name = DRV_NAME,
281 .ioctl = ata_scsi_ioctl,
282 .queuecommand = ata_scsi_queuecmd,
283 .can_queue = ATA_DEF_QUEUE,
284 .this_id = ATA_SHT_THIS_ID,
285 .sg_tablesize = LIBATA_MAX_PRD,
286 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
287 .emulated = ATA_SHT_EMULATED,
288 .use_clustering = ATA_SHT_USE_CLUSTERING,
289 .proc_name = DRV_NAME,
290 .dma_boundary = ATA_DMA_BOUNDARY,
291 .slave_configure = ata_scsi_slave_config,
292 .slave_destroy = ata_scsi_slave_destroy,
293 .bios_param = ata_std_bios_param,
294 #ifdef CONFIG_PM
295 .resume = ata_scsi_device_resume,
296 .suspend = ata_scsi_device_suspend,
297 #endif
298 };
299
300 /*
301 * Port operations for PIO only ALi
302 */
303
304 static struct ata_port_operations ali_early_port_ops = {
305 .port_disable = ata_port_disable,
306 .set_piomode = ali_set_piomode,
307 .tf_load = ata_tf_load,
308 .tf_read = ata_tf_read,
309 .check_status = ata_check_status,
310 .exec_command = ata_exec_command,
311 .dev_select = ata_std_dev_select,
312
313 .freeze = ata_bmdma_freeze,
314 .thaw = ata_bmdma_thaw,
315 .error_handler = ata_bmdma_error_handler,
316 .post_internal_cmd = ata_bmdma_post_internal_cmd,
317 .cable_detect = ata_cable_40wire,
318
319 .qc_prep = ata_qc_prep,
320 .qc_issue = ata_qc_issue_prot,
321
322 .data_xfer = ata_data_xfer,
323
324 .irq_handler = ata_interrupt,
325 .irq_clear = ata_bmdma_irq_clear,
326 .irq_on = ata_irq_on,
327 .irq_ack = ata_irq_ack,
328
329 .port_start = ata_port_start,
330 };
331
332 /*
333 * Port operations for DMA capable ALi without cable
334 * detect
335 */
336 static struct ata_port_operations ali_20_port_ops = {
337 .port_disable = ata_port_disable,
338
339 .set_piomode = ali_set_piomode,
340 .set_dmamode = ali_set_dmamode,
341 .mode_filter = ali_20_filter,
342
343 .tf_load = ata_tf_load,
344 .tf_read = ata_tf_read,
345 .check_status = ata_check_status,
346 .exec_command = ata_exec_command,
347 .dev_select = ata_std_dev_select,
348 .dev_config = ali_lock_sectors,
349
350 .freeze = ata_bmdma_freeze,
351 .thaw = ata_bmdma_thaw,
352 .error_handler = ata_bmdma_error_handler,
353 .post_internal_cmd = ata_bmdma_post_internal_cmd,
354 .cable_detect = ata_cable_40wire,
355
356 .bmdma_setup = ata_bmdma_setup,
357 .bmdma_start = ata_bmdma_start,
358 .bmdma_stop = ata_bmdma_stop,
359 .bmdma_status = ata_bmdma_status,
360
361 .qc_prep = ata_qc_prep,
362 .qc_issue = ata_qc_issue_prot,
363
364 .data_xfer = ata_data_xfer,
365
366 .irq_handler = ata_interrupt,
367 .irq_clear = ata_bmdma_irq_clear,
368 .irq_on = ata_irq_on,
369 .irq_ack = ata_irq_ack,
370
371 .port_start = ata_port_start,
372 };
373
374 /*
375 * Port operations for DMA capable ALi with cable detect
376 */
377 static struct ata_port_operations ali_c2_port_ops = {
378 .port_disable = ata_port_disable,
379 .set_piomode = ali_set_piomode,
380 .set_dmamode = ali_set_dmamode,
381 .mode_filter = ata_pci_default_filter,
382 .tf_load = ata_tf_load,
383 .tf_read = ata_tf_read,
384 .check_status = ata_check_status,
385 .exec_command = ata_exec_command,
386 .dev_select = ata_std_dev_select,
387 .dev_config = ali_lock_sectors,
388
389 .freeze = ata_bmdma_freeze,
390 .thaw = ata_bmdma_thaw,
391 .error_handler = ata_bmdma_error_handler,
392 .post_internal_cmd = ata_bmdma_post_internal_cmd,
393 .cable_detect = ali_c2_cable_detect,
394
395 .bmdma_setup = ata_bmdma_setup,
396 .bmdma_start = ata_bmdma_start,
397 .bmdma_stop = ata_bmdma_stop,
398 .bmdma_status = ata_bmdma_status,
399
400 .qc_prep = ata_qc_prep,
401 .qc_issue = ata_qc_issue_prot,
402
403 .data_xfer = ata_data_xfer,
404
405 .irq_handler = ata_interrupt,
406 .irq_clear = ata_bmdma_irq_clear,
407 .irq_on = ata_irq_on,
408 .irq_ack = ata_irq_ack,
409
410 .port_start = ata_port_start,
411 };
412
413 /*
414 * Port operations for DMA capable ALi with cable detect and LBA48
415 */
416 static struct ata_port_operations ali_c5_port_ops = {
417 .port_disable = ata_port_disable,
418 .set_piomode = ali_set_piomode,
419 .set_dmamode = ali_set_dmamode,
420 .mode_filter = ata_pci_default_filter,
421 .tf_load = ata_tf_load,
422 .tf_read = ata_tf_read,
423 .check_status = ata_check_status,
424 .exec_command = ata_exec_command,
425 .dev_select = ata_std_dev_select,
426
427 .freeze = ata_bmdma_freeze,
428 .thaw = ata_bmdma_thaw,
429 .error_handler = ata_bmdma_error_handler,
430 .post_internal_cmd = ata_bmdma_post_internal_cmd,
431 .cable_detect = ali_c2_cable_detect,
432
433 .bmdma_setup = ata_bmdma_setup,
434 .bmdma_start = ata_bmdma_start,
435 .bmdma_stop = ata_bmdma_stop,
436 .bmdma_status = ata_bmdma_status,
437
438 .qc_prep = ata_qc_prep,
439 .qc_issue = ata_qc_issue_prot,
440
441 .data_xfer = ata_data_xfer,
442
443 .irq_handler = ata_interrupt,
444 .irq_clear = ata_bmdma_irq_clear,
445 .irq_on = ata_irq_on,
446 .irq_ack = ata_irq_ack,
447
448 .port_start = ata_port_start,
449 };
450
451
452 /**
453 * ali_init_chipset - chip setup function
454 * @pdev: PCI device of ATA controller
455 *
456 * Perform the setup on the device that must be done both at boot
457 * and at resume time.
458 */
459
460 static void ali_init_chipset(struct pci_dev *pdev)
461 {
462 u8 rev, tmp;
463 struct pci_dev *north, *isa_bridge;
464
465 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
466
467 /*
468 * The chipset revision selects the driver operations and
469 * mode data.
470 */
471
472 if (rev >= 0x20 && rev < 0xC2) {
473 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
474 pci_read_config_byte(pdev, 0x4B, &tmp);
475 /* Clear CD-ROM DMA write bit */
476 tmp &= 0x7F;
477 pci_write_config_byte(pdev, 0x4B, tmp);
478 } else if (rev >= 0xC2) {
479 /* Enable cable detection logic */
480 pci_read_config_byte(pdev, 0x4B, &tmp);
481 pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
482 }
483 north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
484 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
485
486 if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
487 /* Configure the ALi bridge logic. For non ALi rely on BIOS.
488 Set the south bridge enable bit */
489 pci_read_config_byte(isa_bridge, 0x79, &tmp);
490 if (rev == 0xC2)
491 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
492 else if (rev > 0xC2 && rev < 0xC5)
493 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
494 }
495 if (rev >= 0x20) {
496 /*
497 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
498 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
499 * via 0x54/55.
500 */
501 pci_read_config_byte(pdev, 0x53, &tmp);
502 if (rev <= 0x20)
503 tmp &= ~0x02;
504 if (rev >= 0xc7)
505 tmp |= 0x03;
506 else
507 tmp |= 0x01; /* CD_ROM enable for DMA */
508 pci_write_config_byte(pdev, 0x53, tmp);
509 }
510 pci_dev_put(isa_bridge);
511 pci_dev_put(north);
512 ata_pci_clear_simplex(pdev);
513 }
514 /**
515 * ali_init_one - discovery callback
516 * @pdev: PCI device ID
517 * @id: PCI table info
518 *
519 * An ALi IDE interface has been discovered. Figure out what revision
520 * and perform configuration work before handing it to the ATA layer
521 */
522
523 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
524 {
525 static struct ata_port_info info_early = {
526 .sht = &ali_sht,
527 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
528 .pio_mask = 0x1f,
529 .port_ops = &ali_early_port_ops
530 };
531 /* Revision 0x20 added DMA */
532 static struct ata_port_info info_20 = {
533 .sht = &ali_sht,
534 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
535 .pio_mask = 0x1f,
536 .mwdma_mask = 0x07,
537 .port_ops = &ali_20_port_ops
538 };
539 /* Revision 0x20 with support logic added UDMA */
540 static struct ata_port_info info_20_udma = {
541 .sht = &ali_sht,
542 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
543 .pio_mask = 0x1f,
544 .mwdma_mask = 0x07,
545 .udma_mask = 0x07, /* UDMA33 */
546 .port_ops = &ali_20_port_ops
547 };
548 /* Revision 0xC2 adds UDMA66 */
549 static struct ata_port_info info_c2 = {
550 .sht = &ali_sht,
551 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
552 .pio_mask = 0x1f,
553 .mwdma_mask = 0x07,
554 .udma_mask = 0x1f,
555 .port_ops = &ali_c2_port_ops
556 };
557 /* Revision 0xC3 is UDMA100 */
558 static struct ata_port_info info_c3 = {
559 .sht = &ali_sht,
560 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
561 .pio_mask = 0x1f,
562 .mwdma_mask = 0x07,
563 .udma_mask = 0x3f,
564 .port_ops = &ali_c2_port_ops
565 };
566 /* Revision 0xC4 is UDMA133 */
567 static struct ata_port_info info_c4 = {
568 .sht = &ali_sht,
569 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
570 .pio_mask = 0x1f,
571 .mwdma_mask = 0x07,
572 .udma_mask = 0x7f,
573 .port_ops = &ali_c2_port_ops
574 };
575 /* Revision 0xC5 is UDMA133 with LBA48 DMA */
576 static struct ata_port_info info_c5 = {
577 .sht = &ali_sht,
578 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
579 .pio_mask = 0x1f,
580 .mwdma_mask = 0x07,
581 .udma_mask = 0x7f,
582 .port_ops = &ali_c5_port_ops
583 };
584
585 static struct ata_port_info *port_info[2];
586 u8 rev, tmp;
587 struct pci_dev *isa_bridge;
588
589 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
590
591 /*
592 * The chipset revision selects the driver operations and
593 * mode data.
594 */
595
596 if (rev < 0x20) {
597 port_info[0] = port_info[1] = &info_early;
598 } else if (rev < 0xC2) {
599 port_info[0] = port_info[1] = &info_20;
600 } else if (rev == 0xC2) {
601 port_info[0] = port_info[1] = &info_c2;
602 } else if (rev == 0xC3) {
603 port_info[0] = port_info[1] = &info_c3;
604 } else if (rev == 0xC4) {
605 port_info[0] = port_info[1] = &info_c4;
606 } else
607 port_info[0] = port_info[1] = &info_c5;
608
609 ali_init_chipset(pdev);
610
611 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
612 if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
613 /* Are we paired with a UDMA capable chip */
614 pci_read_config_byte(isa_bridge, 0x5E, &tmp);
615 if ((tmp & 0x1E) == 0x12)
616 port_info[0] = port_info[1] = &info_20_udma;
617 pci_dev_put(isa_bridge);
618 }
619 return ata_pci_init_one(pdev, port_info, 2);
620 }
621
622 #ifdef CONFIG_PM
623 static int ali_reinit_one(struct pci_dev *pdev)
624 {
625 ali_init_chipset(pdev);
626 return ata_pci_device_resume(pdev);
627 }
628 #endif
629
630 static const struct pci_device_id ali[] = {
631 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
632 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
633
634 { },
635 };
636
637 static struct pci_driver ali_pci_driver = {
638 .name = DRV_NAME,
639 .id_table = ali,
640 .probe = ali_init_one,
641 .remove = ata_pci_remove_one,
642 #ifdef CONFIG_PM
643 .suspend = ata_pci_device_suspend,
644 .resume = ali_reinit_one,
645 #endif
646 };
647
648 static int __init ali_init(void)
649 {
650 return pci_register_driver(&ali_pci_driver);
651 }
652
653
654 static void __exit ali_exit(void)
655 {
656 pci_unregister_driver(&ali_pci_driver);
657 }
658
659
660 MODULE_AUTHOR("Alan Cox");
661 MODULE_DESCRIPTION("low-level driver for ALi PATA");
662 MODULE_LICENSE("GPL");
663 MODULE_DEVICE_TABLE(pci, ali);
664 MODULE_VERSION(DRV_VERSION);
665
666 module_init(ali_init);
667 module_exit(ali_exit);
Mirror for ia64_pv_ops.git