drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/libata.h>
  32 #include <linux/list.h>
  33 #include <linux/kref.h>
  34 #include <scsi/scsi.h>
  35 #include <scsi/scsi_cmnd.h>
  36
  37 /*
  38  * Literals
  39  */
  40 #define IPR_DRIVER_VERSION "2.4.1"
  41 #define IPR_DRIVER_DATE "(April 24, 2007)"
  42
  43 /*
  44  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  45  *      ops per device for devices not running tagged command queuing.
  46  *      This can be adjusted at runtime through sysfs device attributes.
  47  */
  48 #define IPR_MAX_CMD_PER_LUN                             6
  49 #define IPR_MAX_CMD_PER_ATA_LUN                 1
  50
  51 /*
  52  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  53  *      ops the mid-layer can send to the adapter.
  54  */
  55 #define IPR_NUM_BASE_CMD_BLKS                           100
  56
  57 #define PCI_DEVICE_ID_IBM_OBSIDIAN_E    0x0339
  58 #define PCI_DEVICE_ID_IBM_SCAMP_E               0x034A
  59
  60 #define IPR_SUBS_DEV_ID_2780    0x0264
  61 #define IPR_SUBS_DEV_ID_5702    0x0266
  62 #define IPR_SUBS_DEV_ID_5703    0x0278
  63 #define IPR_SUBS_DEV_ID_572E  0x028D
  64 #define IPR_SUBS_DEV_ID_573E  0x02D3
  65 #define IPR_SUBS_DEV_ID_573D  0x02D4
  66 #define IPR_SUBS_DEV_ID_571A    0x02C0
  67 #define IPR_SUBS_DEV_ID_571B    0x02BE
  68 #define IPR_SUBS_DEV_ID_571E  0x02BF
  69 #define IPR_SUBS_DEV_ID_571F    0x02D5
  70 #define IPR_SUBS_DEV_ID_572A    0x02C1
  71 #define IPR_SUBS_DEV_ID_572B    0x02C2
  72 #define IPR_SUBS_DEV_ID_572F    0x02C3
  73 #define IPR_SUBS_DEV_ID_574D    0x030B
  74 #define IPR_SUBS_DEV_ID_574E    0x030A
  75 #define IPR_SUBS_DEV_ID_575B    0x030D
  76 #define IPR_SUBS_DEV_ID_575C    0x0338
  77 #define IPR_SUBS_DEV_ID_575D    0x033E
  78 #define IPR_SUBS_DEV_ID_57B3    0x033A
  79 #define IPR_SUBS_DEV_ID_57B7    0x0360
  80 #define IPR_SUBS_DEV_ID_57B8    0x02C2
  81
  82 #define IPR_NAME                                "ipr"
  83
  84 /*
  85  * Return codes
  86  */
  87 #define IPR_RC_JOB_CONTINUE             1
  88 #define IPR_RC_JOB_RETURN               2
  89
  90 /*
  91  * IOASCs
  92  */
  93 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  94 #define IPR_IOASC_NR_IOA_RESET_REQUIRED         0x02048000
  95 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  96 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  97 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  98 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  99 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
 100 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
 101 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT    0x05240000
 102 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
 103 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
 104 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
 105 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
 106 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
 107 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
 108
 109 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
 110 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
 111 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
 112
 113 /* Driver data flags */
 114 #define IPR_USE_LONG_TRANSOP_TIMEOUT            0x00000001
 115 #define IPR_USE_PCI_WARM_RESET                  0x00000002
 116
 117 #define IPR_DEFAULT_MAX_ERROR_DUMP                      984
 118 #define IPR_NUM_LOG_HCAMS                               2
 119 #define IPR_NUM_CFG_CHG_HCAMS                           2
 120 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 121 #define IPR_MAX_NUM_TARGETS_PER_BUS                     256
 122 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 123 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 124 #define IPR_VSET_BUS                                    0xff
 125 #define IPR_IOA_BUS                                             0xff
 126 #define IPR_IOA_TARGET                                  0xff
 127 #define IPR_IOA_LUN                                             0xff
 128 #define IPR_MAX_NUM_BUSES                               16
 129 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 130
 131 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 132
 133 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 134 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 135                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 136
 137 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 138 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 139                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 140
 141 #define IPR_MAX_PHYSICAL_DEVS                           192
 142
 143 #define IPR_MAX_SGLIST                                  64
 144 #define IPR_IOA_MAX_SECTORS                             32767
 145 #define IPR_VSET_MAX_SECTORS                            512
 146 #define IPR_MAX_CDB_LEN                                 16
 147
 148 #define IPR_DEFAULT_BUS_WIDTH                           16
 149 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 150 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 151 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 152 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 153
 154 #define IPR_IOA_RES_HANDLE                              0xffffffff
 155 #define IPR_INVALID_RES_HANDLE                  0
 156 #define IPR_IOA_RES_ADDR                                0x00ffffff
 157
 158 /*
 159  * Adapter Commands
 160  */
 161 #define IPR_QUERY_RSRC_STATE                            0xC2
 162 #define IPR_RESET_DEVICE                                0xC3
 163 #define IPR_RESET_TYPE_SELECT                           0x80
 164 #define IPR_LUN_RESET                                   0x40
 165 #define IPR_TARGET_RESET                                        0x20
 166 #define IPR_BUS_RESET                                   0x10
 167 #define IPR_ATA_PHY_RESET                                       0x80
 168 #define IPR_ID_HOST_RR_Q                                0xC4
 169 #define IPR_QUERY_IOA_CONFIG                            0xC5
 170 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 171 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 172 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 173 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 174 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 175 #define IPR_IOA_SHUTDOWN                                0xF7
 176 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 177
 178 /*
 179  * Timeouts
 180  */
 181 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 182 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 183 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 184 #define IPR_DUAL_IOA_ABBR_SHUTDOWN_TO   (2 * 60 * HZ)
 185 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 186 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 187 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 188 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 189 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 190 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 191 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 192 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 193 #define IPR_LONG_OPERATIONAL_TIMEOUT    (12 * 60)
 194 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 195 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 196 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 197 #define IPR_PCI_RESET_TIMEOUT                   (HZ / 2)
 198 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 199
 200 /*
 201  * SCSI Literals
 202  */
 203 #define IPR_VENDOR_ID_LEN                       8
 204 #define IPR_PROD_ID_LEN                         16
 205 #define IPR_SERIAL_NUM_LEN                      8
 206
 207 /*
 208  * Hardware literals
 209  */
 210 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 211 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 212 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 213 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 214 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 215 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 216 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 217 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 218 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 219 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 220 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 221 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 222 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 223 #define IPR_DOORBELL                                    0x82800000
 224 #define IPR_RUNTIME_RESET                               0x40000000
 225
 226 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 227 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 228 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 229 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 230 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 231 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 232 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 233 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 234 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 235 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 236 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 237
 238 #define IPR_PCII_ERROR_INTERRUPTS \
 239 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 240 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 241
 242 #define IPR_PCII_OPER_INTERRUPTS \
 243 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 244
 245 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 246 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 247
 248 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 249 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 250
 251 /*
 252  * Dump literals
 253  */
 254 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 255 #define IPR_NUM_SDT_ENTRIES                             511
 256 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 257
 258 /*
 259  * Misc literals
 260  */
 261 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 262
 263 /*
 264  * Adapter interface types
 265  */
 266
 267 struct ipr_res_addr {
 268         u8 reserved;
 269         u8 bus;
 270         u8 target;
 271         u8 lun;
 272 #define IPR_GET_PHYS_LOC(res_addr) \
 273         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 274 }__attribute__((packed, aligned (4)));
 275
 276 struct ipr_std_inq_vpids {
 277         u8 vendor_id[IPR_VENDOR_ID_LEN];
 278         u8 product_id[IPR_PROD_ID_LEN];
 279 }__attribute__((packed));
 280
 281 struct ipr_vpd {
 282         struct ipr_std_inq_vpids vpids;
 283         u8 sn[IPR_SERIAL_NUM_LEN];
 284 }__attribute__((packed));
 285
 286 struct ipr_ext_vpd {
 287         struct ipr_vpd vpd;
 288         __be32 wwid[2];
 289 }__attribute__((packed));
 290
 291 struct ipr_std_inq_data {
 292         u8 peri_qual_dev_type;
 293 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 294 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 295
 296         u8 removeable_medium_rsvd;
 297 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 298
 299 #define IPR_IS_DASD_DEVICE(std_inq) \
 300 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 301 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 302
 303 #define IPR_IS_SES_DEVICE(std_inq) \
 304 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 305
 306         u8 version;
 307         u8 aen_naca_fmt;
 308         u8 additional_len;
 309         u8 sccs_rsvd;
 310         u8 bq_enc_multi;
 311         u8 sync_cmdq_flags;
 312
 313         struct ipr_std_inq_vpids vpids;
 314
 315         u8 ros_rsvd_ram_rsvd[4];
 316
 317         u8 serial_num[IPR_SERIAL_NUM_LEN];
 318 }__attribute__ ((packed));
 319
 320 struct ipr_config_table_entry {
 321         u8 proto;
 322 #define IPR_PROTO_SATA                  0x02
 323 #define IPR_PROTO_SATA_ATAPI            0x03
 324 #define IPR_PROTO_SAS_STP               0x06
 325 #define IPR_PROTO_SAS_STP_ATAPI 0x07
 326         u8 array_id;
 327         u8 flags;
 328 #define IPR_IS_IOA_RESOURCE     0x80
 329 #define IPR_IS_ARRAY_MEMBER 0x20
 330 #define IPR_IS_HOT_SPARE        0x10
 331
 332         u8 rsvd_subtype;
 333 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 334 #define IPR_SUBTYPE_AF_DASD                     0
 335 #define IPR_SUBTYPE_GENERIC_SCSI        1
 336 #define IPR_SUBTYPE_VOLUME_SET          2
 337 #define IPR_SUBTYPE_GENERIC_ATA 4
 338
 339 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 340 #define IPR_QUEUE_FROZEN_MODEL  0
 341 #define IPR_QUEUE_NACA_MODEL            1
 342
 343         struct ipr_res_addr res_addr;
 344         __be32 res_handle;
 345         __be32 reserved4[2];
 346         struct ipr_std_inq_data std_inq_data;
 347 }__attribute__ ((packed, aligned (4)));
 348
 349 struct ipr_config_table_hdr {
 350         u8 num_entries;
 351         u8 flags;
 352 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 353         __be16 reserved;
 354 }__attribute__((packed, aligned (4)));
 355
 356 struct ipr_config_table {
 357         struct ipr_config_table_hdr hdr;
 358         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 359 }__attribute__((packed, aligned (4)));
 360
 361 struct ipr_hostrcb_cfg_ch_not {
 362         struct ipr_config_table_entry cfgte;
 363         u8 reserved[936];
 364 }__attribute__((packed, aligned (4)));
 365
 366 struct ipr_supported_device {
 367         __be16 data_length;
 368         u8 reserved;
 369         u8 num_records;
 370         struct ipr_std_inq_vpids vpids;
 371         u8 reserved2[16];
 372 }__attribute__((packed, aligned (4)));
 373
 374 /* Command packet structure */
 375 struct ipr_cmd_pkt {
 376         __be16 reserved;                /* Reserved by IOA */
 377         u8 request_type;
 378 #define IPR_RQTYPE_SCSICDB              0x00
 379 #define IPR_RQTYPE_IOACMD               0x01
 380 #define IPR_RQTYPE_HCAM                 0x02
 381 #define IPR_RQTYPE_ATA_PASSTHRU 0x04
 382
 383         u8 luntar_luntrn;
 384
 385         u8 flags_hi;
 386 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 387 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 388 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 389 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 390 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 391
 392         u8 flags_lo;
 393 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 394 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 395 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 396 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 397 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 398 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 399 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 400
 401         u8 cdb[16];
 402         __be16 timeout;
 403 }__attribute__ ((packed, aligned(4)));
 404
 405 struct ipr_ioarcb_ata_regs {
 406         u8 flags;
 407 #define IPR_ATA_FLAG_PACKET_CMD                 0x80
 408 #define IPR_ATA_FLAG_XFER_TYPE_DMA                      0x40
 409 #define IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION  0x20
 410         u8 reserved[3];
 411
 412         __be16 data;
 413         u8 feature;
 414         u8 nsect;
 415         u8 lbal;
 416         u8 lbam;
 417         u8 lbah;
 418         u8 device;
 419         u8 command;
 420         u8 reserved2[3];
 421         u8 hob_feature;
 422         u8 hob_nsect;
 423         u8 hob_lbal;
 424         u8 hob_lbam;
 425         u8 hob_lbah;
 426         u8 ctl;
 427 }__attribute__ ((packed, aligned(4)));
 428
 429 struct ipr_ioadl_desc {
 430         __be32 flags_and_data_len;
 431 #define IPR_IOADL_FLAGS_MASK            0xff000000
 432 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 433 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 434 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 435 #define IPR_IOADL_FLAGS_READ            0x48000000
 436 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 437 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 438 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 439 #define IPR_IOADL_FLAGS_LAST            0x01000000
 440
 441         __be32 address;
 442 }__attribute__((packed, aligned (8)));
 443
 444 struct ipr_ioarcb_add_data {
 445         union {
 446                 struct ipr_ioarcb_ata_regs regs;
 447                 struct ipr_ioadl_desc ioadl[5];
 448                 __be32 add_cmd_parms[10];
 449         }u;
 450 }__attribute__ ((packed, aligned(4)));
 451
 452 /* IOA Request Control Block    128 bytes  */
 453 struct ipr_ioarcb {
 454         __be32 ioarcb_host_pci_addr;
 455         __be32 reserved;
 456         __be32 res_handle;
 457         __be32 host_response_handle;
 458         __be32 reserved1;
 459         __be32 reserved2;
 460         __be32 reserved3;
 461
 462         __be32 write_data_transfer_length;
 463         __be32 read_data_transfer_length;
 464         __be32 write_ioadl_addr;
 465         __be32 write_ioadl_len;
 466         __be32 read_ioadl_addr;
 467         __be32 read_ioadl_len;
 468
 469         __be32 ioasa_host_pci_addr;
 470         __be16 ioasa_len;
 471         __be16 reserved4;
 472
 473         struct ipr_cmd_pkt cmd_pkt;
 474
 475         __be32 add_cmd_parms_len;
 476         struct ipr_ioarcb_add_data add_data;
 477 }__attribute__((packed, aligned (4)));
 478
 479 struct ipr_ioasa_vset {
 480         __be32 failing_lba_hi;
 481         __be32 failing_lba_lo;
 482         __be32 reserved;
 483 }__attribute__((packed, aligned (4)));
 484
 485 struct ipr_ioasa_af_dasd {
 486         __be32 failing_lba;
 487         __be32 reserved[2];
 488 }__attribute__((packed, aligned (4)));
 489
 490 struct ipr_ioasa_gpdd {
 491         u8 end_state;
 492         u8 bus_phase;
 493         __be16 reserved;
 494         __be32 ioa_data[2];
 495 }__attribute__((packed, aligned (4)));
 496
 497 struct ipr_ioasa_gata {
 498         u8 error;
 499         u8 nsect;               /* Interrupt reason */
 500         u8 lbal;
 501         u8 lbam;
 502         u8 lbah;
 503         u8 device;
 504         u8 status;
 505         u8 alt_status;  /* ATA CTL */
 506         u8 hob_nsect;
 507         u8 hob_lbal;
 508         u8 hob_lbam;
 509         u8 hob_lbah;
 510 }__attribute__((packed, aligned (4)));
 511
 512 struct ipr_auto_sense {
 513         __be16 auto_sense_len;
 514         __be16 ioa_data_len;
 515         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 516 };
 517
 518 struct ipr_ioasa {
 519         __be32 ioasc;
 520 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 521 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 522 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 523 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 524
 525         __be16 ret_stat_len;    /* Length of the returned IOASA */
 526
 527         __be16 avail_stat_len;  /* Total Length of status available. */
 528
 529         __be32 residual_data_len;       /* number of bytes in the host data */
 530         /* buffers that were not used by the IOARCB command. */
 531
 532         __be32 ilid;
 533 #define IPR_NO_ILID                     0
 534 #define IPR_DRIVER_ILID         0xffffffff
 535
 536         __be32 fd_ioasc;
 537
 538         __be32 fd_phys_locator;
 539
 540         __be32 fd_res_handle;
 541
 542         __be32 ioasc_specific;  /* status code specific field */
 543 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 544 #define IPR_AUTOSENSE_VALID                     0x40000000
 545 #define IPR_ATA_DEVICE_WAS_RESET                0x20000000
 546 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 547 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 548 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 549
 550         union {
 551                 struct ipr_ioasa_vset vset;
 552                 struct ipr_ioasa_af_dasd dasd;
 553                 struct ipr_ioasa_gpdd gpdd;
 554                 struct ipr_ioasa_gata gata;
 555         } u;
 556
 557         struct ipr_auto_sense auto_sense;
 558 }__attribute__((packed, aligned (4)));
 559
 560 struct ipr_mode_parm_hdr {
 561         u8 length;
 562         u8 medium_type;
 563         u8 device_spec_parms;
 564         u8 block_desc_len;
 565 }__attribute__((packed));
 566
 567 struct ipr_mode_pages {
 568         struct ipr_mode_parm_hdr hdr;
 569         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 570 }__attribute__((packed));
 571
 572 struct ipr_mode_page_hdr {
 573         u8 ps_page_code;
 574 #define IPR_MODE_PAGE_PS        0x80
 575 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 576         u8 page_length;
 577 }__attribute__ ((packed));
 578
 579 struct ipr_dev_bus_entry {
 580         struct ipr_res_addr res_addr;
 581         u8 flags;
 582 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 583 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 584 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 585 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 586 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 587 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 588 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 589
 590         u8 scsi_id;
 591         u8 bus_width;
 592         u8 extended_reset_delay;
 593 #define IPR_EXTENDED_RESET_DELAY        7
 594
 595         __be32 max_xfer_rate;
 596
 597         u8 spinup_delay;
 598         u8 reserved3;
 599         __be16 reserved4;
 600 }__attribute__((packed, aligned (4)));
 601
 602 struct ipr_mode_page28 {
 603         struct ipr_mode_page_hdr hdr;
 604         u8 num_entries;
 605         u8 entry_length;
 606         struct ipr_dev_bus_entry bus[0];
 607 }__attribute__((packed));
 608
 609 struct ipr_mode_page24 {
 610         struct ipr_mode_page_hdr hdr;
 611         u8 flags;
 612 #define IPR_ENABLE_DUAL_IOA_AF 0x80
 613 }__attribute__((packed));
 614
 615 struct ipr_ioa_vpd {
 616         struct ipr_std_inq_data std_inq_data;
 617         u8 ascii_part_num[12];
 618         u8 reserved[40];
 619         u8 ascii_plant_code[4];
 620 }__attribute__((packed));
 621
 622 struct ipr_inquiry_page3 {
 623         u8 peri_qual_dev_type;
 624         u8 page_code;
 625         u8 reserved1;
 626         u8 page_length;
 627         u8 ascii_len;
 628         u8 reserved2[3];
 629         u8 load_id[4];
 630         u8 major_release;
 631         u8 card_type;
 632         u8 minor_release[2];
 633         u8 ptf_number[4];
 634         u8 patch_number[4];
 635 }__attribute__((packed));
 636
 637 struct ipr_inquiry_cap {
 638         u8 peri_qual_dev_type;
 639         u8 page_code;
 640         u8 reserved1;
 641         u8 page_length;
 642         u8 ascii_len;
 643         u8 reserved2;
 644         u8 sis_version[2];
 645         u8 cap;
 646 #define IPR_CAP_DUAL_IOA_RAID           0x80
 647         u8 reserved3[15];
 648 }__attribute__((packed));
 649
 650 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 651 struct ipr_inquiry_page0 {
 652         u8 peri_qual_dev_type;
 653         u8 page_code;
 654         u8 reserved1;
 655         u8 len;
 656         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 657 }__attribute__((packed));
 658
 659 struct ipr_hostrcb_device_data_entry {
 660         struct ipr_vpd vpd;
 661         struct ipr_res_addr dev_res_addr;
 662         struct ipr_vpd new_vpd;
 663         struct ipr_vpd ioa_last_with_dev_vpd;
 664         struct ipr_vpd cfc_last_with_dev_vpd;
 665         __be32 ioa_data[5];
 666 }__attribute__((packed, aligned (4)));
 667
 668 struct ipr_hostrcb_device_data_entry_enhanced {
 669         struct ipr_ext_vpd vpd;
 670         u8 ccin[4];
 671         struct ipr_res_addr dev_res_addr;
 672         struct ipr_ext_vpd new_vpd;
 673         u8 new_ccin[4];
 674         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 675         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 676 }__attribute__((packed, aligned (4)));
 677
 678 struct ipr_hostrcb_array_data_entry {
 679         struct ipr_vpd vpd;
 680         struct ipr_res_addr expected_dev_res_addr;
 681         struct ipr_res_addr dev_res_addr;
 682 }__attribute__((packed, aligned (4)));
 683
 684 struct ipr_hostrcb_array_data_entry_enhanced {
 685         struct ipr_ext_vpd vpd;
 686         u8 ccin[4];
 687         struct ipr_res_addr expected_dev_res_addr;
 688         struct ipr_res_addr dev_res_addr;
 689 }__attribute__((packed, aligned (4)));
 690
 691 struct ipr_hostrcb_type_ff_error {
 692         __be32 ioa_data[502];
 693 }__attribute__((packed, aligned (4)));
 694
 695 struct ipr_hostrcb_type_01_error {
 696         __be32 seek_counter;
 697         __be32 read_counter;
 698         u8 sense_data[32];
 699         __be32 ioa_data[236];
 700 }__attribute__((packed, aligned (4)));
 701
 702 struct ipr_hostrcb_type_02_error {
 703         struct ipr_vpd ioa_vpd;
 704         struct ipr_vpd cfc_vpd;
 705         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 706         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 707         __be32 ioa_data[3];
 708 }__attribute__((packed, aligned (4)));
 709
 710 struct ipr_hostrcb_type_12_error {
 711         struct ipr_ext_vpd ioa_vpd;
 712         struct ipr_ext_vpd cfc_vpd;
 713         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 714         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 715         __be32 ioa_data[3];
 716 }__attribute__((packed, aligned (4)));
 717
 718 struct ipr_hostrcb_type_03_error {
 719         struct ipr_vpd ioa_vpd;
 720         struct ipr_vpd cfc_vpd;
 721         __be32 errors_detected;
 722         __be32 errors_logged;
 723         u8 ioa_data[12];
 724         struct ipr_hostrcb_device_data_entry dev[3];
 725 }__attribute__((packed, aligned (4)));
 726
 727 struct ipr_hostrcb_type_13_error {
 728         struct ipr_ext_vpd ioa_vpd;
 729         struct ipr_ext_vpd cfc_vpd;
 730         __be32 errors_detected;
 731         __be32 errors_logged;
 732         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 733 }__attribute__((packed, aligned (4)));
 734
 735 struct ipr_hostrcb_type_04_error {
 736         struct ipr_vpd ioa_vpd;
 737         struct ipr_vpd cfc_vpd;
 738         u8 ioa_data[12];
 739         struct ipr_hostrcb_array_data_entry array_member[10];
 740         __be32 exposed_mode_adn;
 741         __be32 array_id;
 742         struct ipr_vpd incomp_dev_vpd;
 743         __be32 ioa_data2;
 744         struct ipr_hostrcb_array_data_entry array_member2[8];
 745         struct ipr_res_addr last_func_vset_res_addr;
 746         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 747         u8 protection_level[8];
 748 }__attribute__((packed, aligned (4)));
 749
 750 struct ipr_hostrcb_type_14_error {
 751         struct ipr_ext_vpd ioa_vpd;
 752         struct ipr_ext_vpd cfc_vpd;
 753         __be32 exposed_mode_adn;
 754         __be32 array_id;
 755         struct ipr_res_addr last_func_vset_res_addr;
 756         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 757         u8 protection_level[8];
 758         __be32 num_entries;
 759         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 760 }__attribute__((packed, aligned (4)));
 761
 762 struct ipr_hostrcb_type_07_error {
 763         u8 failure_reason[64];
 764         struct ipr_vpd vpd;
 765         u32 data[222];
 766 }__attribute__((packed, aligned (4)));
 767
 768 struct ipr_hostrcb_type_17_error {
 769         u8 failure_reason[64];
 770         struct ipr_ext_vpd vpd;
 771         u32 data[476];
 772 }__attribute__((packed, aligned (4)));
 773
 774 struct ipr_hostrcb_config_element {
 775         u8 type_status;
 776 #define IPR_PATH_CFG_TYPE_MASK  0xF0
 777 #define IPR_PATH_CFG_NOT_EXIST  0x00
 778 #define IPR_PATH_CFG_IOA_PORT           0x10
 779 #define IPR_PATH_CFG_EXP_PORT           0x20
 780 #define IPR_PATH_CFG_DEVICE_PORT        0x30
 781 #define IPR_PATH_CFG_DEVICE_LUN 0x40
 782
 783 #define IPR_PATH_CFG_STATUS_MASK        0x0F
 784 #define IPR_PATH_CFG_NO_PROB            0x00
 785 #define IPR_PATH_CFG_DEGRADED           0x01
 786 #define IPR_PATH_CFG_FAILED             0x02
 787 #define IPR_PATH_CFG_SUSPECT            0x03
 788 #define IPR_PATH_NOT_DETECTED           0x04
 789 #define IPR_PATH_INCORRECT_CONN 0x05
 790
 791         u8 cascaded_expander;
 792         u8 phy;
 793         u8 link_rate;
 794 #define IPR_PHY_LINK_RATE_MASK  0x0F
 795
 796         __be32 wwid[2];
 797 }__attribute__((packed, aligned (4)));
 798
 799 struct ipr_hostrcb_fabric_desc {
 800         __be16 length;
 801         u8 ioa_port;
 802         u8 cascaded_expander;
 803         u8 phy;
 804         u8 path_state;
 805 #define IPR_PATH_ACTIVE_MASK            0xC0
 806 #define IPR_PATH_NO_INFO                0x00
 807 #define IPR_PATH_ACTIVE                 0x40
 808 #define IPR_PATH_NOT_ACTIVE             0x80
 809
 810 #define IPR_PATH_STATE_MASK             0x0F
 811 #define IPR_PATH_STATE_NO_INFO  0x00
 812 #define IPR_PATH_HEALTHY                0x01
 813 #define IPR_PATH_DEGRADED               0x02
 814 #define IPR_PATH_FAILED                 0x03
 815
 816         __be16 num_entries;
 817         struct ipr_hostrcb_config_element elem[1];
 818 }__attribute__((packed, aligned (4)));
 819
 820 #define for_each_fabric_cfg(fabric, cfg) \
 821                 for (cfg = (fabric)->elem; \
 822                         cfg < ((fabric)->elem + be16_to_cpu((fabric)->num_entries)); \
 823                         cfg++)
 824
 825 struct ipr_hostrcb_type_20_error {
 826         u8 failure_reason[64];
 827         u8 reserved[3];
 828         u8 num_entries;
 829         struct ipr_hostrcb_fabric_desc desc[1];
 830 }__attribute__((packed, aligned (4)));
 831
 832 struct ipr_hostrcb_error {
 833         __be32 failing_dev_ioasc;
 834         struct ipr_res_addr failing_dev_res_addr;
 835         __be32 failing_dev_res_handle;
 836         __be32 prc;
 837         union {
 838                 struct ipr_hostrcb_type_ff_error type_ff_error;
 839                 struct ipr_hostrcb_type_01_error type_01_error;
 840                 struct ipr_hostrcb_type_02_error type_02_error;
 841                 struct ipr_hostrcb_type_03_error type_03_error;
 842                 struct ipr_hostrcb_type_04_error type_04_error;
 843                 struct ipr_hostrcb_type_07_error type_07_error;
 844                 struct ipr_hostrcb_type_12_error type_12_error;
 845                 struct ipr_hostrcb_type_13_error type_13_error;
 846                 struct ipr_hostrcb_type_14_error type_14_error;
 847                 struct ipr_hostrcb_type_17_error type_17_error;
 848                 struct ipr_hostrcb_type_20_error type_20_error;
 849         } u;
 850 }__attribute__((packed, aligned (4)));
 851
 852 struct ipr_hostrcb_raw {
 853         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 854 }__attribute__((packed, aligned (4)));
 855
 856 struct ipr_hcam {
 857         u8 op_code;
 858 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 859 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 860
 861         u8 notify_type;
 862 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 863 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 864 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 865 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 866 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 867
 868         u8 notifications_lost;
 869 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 870 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 871
 872         u8 flags;
 873 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 874 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 875
 876         u8 overlay_id;
 877 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 878 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 879 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 880 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 881 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 882 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 883 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 884 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 885 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 886 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 887 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 888 #define IPR_HOST_RCB_OVERLAY_ID_20                              0x20
 889 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 890
 891         u8 reserved1[3];
 892         __be32 ilid;
 893         __be32 time_since_last_ioa_reset;
 894         __be32 reserved2;
 895         __be32 length;
 896
 897         union {
 898                 struct ipr_hostrcb_error error;
 899                 struct ipr_hostrcb_cfg_ch_not ccn;
 900                 struct ipr_hostrcb_raw raw;
 901         } u;
 902 }__attribute__((packed, aligned (4)));
 903
 904 struct ipr_hostrcb {
 905         struct ipr_hcam hcam;
 906         dma_addr_t hostrcb_dma;
 907         struct list_head queue;
 908         struct ipr_ioa_cfg *ioa_cfg;
 909 };
 910
 911 /* IPR smart dump table structures */
 912 struct ipr_sdt_entry {
 913         __be32 bar_str_offset;
 914         __be32 end_offset;
 915         u8 entry_byte;
 916         u8 reserved[3];
 917
 918         u8 flags;
 919 #define IPR_SDT_ENDIAN          0x80
 920 #define IPR_SDT_VALID_ENTRY     0x20
 921
 922         u8 resv;
 923         __be16 priority;
 924 }__attribute__((packed, aligned (4)));
 925
 926 struct ipr_sdt_header {
 927         __be32 state;
 928         __be32 num_entries;
 929         __be32 num_entries_used;
 930         __be32 dump_size;
 931 }__attribute__((packed, aligned (4)));
 932
 933 struct ipr_sdt {
 934         struct ipr_sdt_header hdr;
 935         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 936 }__attribute__((packed, aligned (4)));
 937
 938 struct ipr_uc_sdt {
 939         struct ipr_sdt_header hdr;
 940         struct ipr_sdt_entry entry[1];
 941 }__attribute__((packed, aligned (4)));
 942
 943 /*
 944  * Driver types
 945  */
 946 struct ipr_bus_attributes {
 947         u8 bus;
 948         u8 qas_enabled;
 949         u8 bus_width;
 950         u8 reserved;
 951         u32 max_xfer_rate;
 952 };
 953
 954 struct ipr_sata_port {
 955         struct ipr_ioa_cfg *ioa_cfg;
 956         struct ata_port *ap;
 957         struct ipr_resource_entry *res;
 958         struct ipr_ioasa_gata ioasa;
 959 };
 960
 961 struct ipr_resource_entry {
 962         struct ipr_config_table_entry cfgte;
 963         u8 needs_sync_complete:1;
 964         u8 in_erp:1;
 965         u8 add_to_ml:1;
 966         u8 del_from_ml:1;
 967         u8 resetting_device:1;
 968
 969         struct scsi_device *sdev;
 970         struct ipr_sata_port *sata_port;
 971         struct list_head queue;
 972 };
 973
 974 struct ipr_resource_hdr {
 975         u16 num_entries;
 976         u16 reserved;
 977 };
 978
 979 struct ipr_resource_table {
 980         struct ipr_resource_hdr hdr;
 981         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 982 };
 983
 984 struct ipr_misc_cbs {
 985         struct ipr_ioa_vpd ioa_vpd;
 986         struct ipr_inquiry_page0 page0_data;
 987         struct ipr_inquiry_page3 page3_data;
 988         struct ipr_inquiry_cap cap;
 989         struct ipr_mode_pages mode_pages;
 990         struct ipr_supported_device supp_dev;
 991 };
 992
 993 struct ipr_interrupt_offsets {
 994         unsigned long set_interrupt_mask_reg;
 995         unsigned long clr_interrupt_mask_reg;
 996         unsigned long sense_interrupt_mask_reg;
 997         unsigned long clr_interrupt_reg;
 998
 999         unsigned long sense_interrupt_reg;
1000         unsigned long ioarrin_reg;
1001         unsigned long sense_uproc_interrupt_reg;
1002         unsigned long set_uproc_interrupt_reg;
1003         unsigned long clr_uproc_interrupt_reg;
1004 };
1005
1006 struct ipr_interrupts {
1007         void __iomem *set_interrupt_mask_reg;
1008         void __iomem *clr_interrupt_mask_reg;
1009         void __iomem *sense_interrupt_mask_reg;
1010         void __iomem *clr_interrupt_reg;
1011
1012         void __iomem *sense_interrupt_reg;
1013         void __iomem *ioarrin_reg;
1014         void __iomem *sense_uproc_interrupt_reg;
1015         void __iomem *set_uproc_interrupt_reg;
1016         void __iomem *clr_uproc_interrupt_reg;
1017 };
1018
1019 struct ipr_chip_cfg_t {
1020         u32 mailbox;
1021         u8 cache_line_size;
1022         struct ipr_interrupt_offsets regs;
1023 };
1024
1025 struct ipr_chip_t {
1026         u16 vendor;
1027         u16 device;
1028         const struct ipr_chip_cfg_t *cfg;
1029 };
1030
1031 enum ipr_shutdown_type {
1032         IPR_SHUTDOWN_NORMAL = 0x00,
1033         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
1034         IPR_SHUTDOWN_ABBREV = 0x80,
1035         IPR_SHUTDOWN_NONE = 0x100
1036 };
1037
1038 struct ipr_trace_entry {
1039         u32 time;
1040
1041         u8 op_code;
1042         u8 ata_op_code;
1043         u8 type;
1044 #define IPR_TRACE_START                 0x00
1045 #define IPR_TRACE_FINISH                0xff
1046         u8 cmd_index;
1047
1048         __be32 res_handle;
1049         union {
1050                 u32 ioasc;
1051                 u32 add_data;
1052                 u32 res_addr;
1053         } u;
1054 };
1055
1056 struct ipr_sglist {
1057         u32 order;
1058         u32 num_sg;
1059         u32 num_dma_sg;
1060         u32 buffer_len;
1061         struct scatterlist scatterlist[1];
1062 };
1063
1064 enum ipr_sdt_state {
1065         INACTIVE,
1066         WAIT_FOR_DUMP,
1067         GET_DUMP,
1068         ABORT_DUMP,
1069         DUMP_OBTAINED
1070 };
1071
1072 enum ipr_cache_state {
1073         CACHE_NONE,
1074         CACHE_DISABLED,
1075         CACHE_ENABLED,
1076         CACHE_INVALID
1077 };
1078
1079 /* Per-controller data */
1080 struct ipr_ioa_cfg {
1081         char eye_catcher[8];
1082 #define IPR_EYECATCHER                  "iprcfg"
1083
1084         struct list_head queue;
1085
1086         u8 allow_interrupts:1;
1087         u8 in_reset_reload:1;
1088         u8 in_ioa_bringdown:1;
1089         u8 ioa_unit_checked:1;
1090         u8 ioa_is_dead:1;
1091         u8 dump_taken:1;
1092         u8 allow_cmds:1;
1093         u8 allow_ml_add_del:1;
1094         u8 needs_hard_reset:1;
1095         u8 dual_raid:1;
1096         u8 needs_warm_reset:1;
1097
1098         u8 revid;
1099
1100         enum ipr_cache_state cache_state;
1101         u16 type; /* CCIN of the card */
1102
1103         u8 log_level;
1104 #define IPR_MAX_LOG_LEVEL                       4
1105 #define IPR_DEFAULT_LOG_LEVEL           2
1106
1107 #define IPR_NUM_TRACE_INDEX_BITS        8
1108 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
1109 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1110         char trace_start[8];
1111 #define IPR_TRACE_START_LABEL                   "trace"
1112         struct ipr_trace_entry *trace;
1113         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
1114
1115         /*
1116          * Queue for free command blocks
1117          */
1118         char ipr_free_label[8];
1119 #define IPR_FREEQ_LABEL                 "free-q"
1120         struct list_head free_q;
1121
1122         /*
1123          * Queue for command blocks outstanding to the adapter
1124          */
1125         char ipr_pending_label[8];
1126 #define IPR_PENDQ_LABEL                 "pend-q"
1127         struct list_head pending_q;
1128
1129         char cfg_table_start[8];
1130 #define IPR_CFG_TBL_START               "cfg"
1131         struct ipr_config_table *cfg_table;
1132         dma_addr_t cfg_table_dma;
1133
1134         char resource_table_label[8];
1135 #define IPR_RES_TABLE_LABEL             "res_tbl"
1136         struct ipr_resource_entry *res_entries;
1137         struct list_head free_res_q;
1138         struct list_head used_res_q;
1139
1140         char ipr_hcam_label[8];
1141 #define IPR_HCAM_LABEL                  "hcams"
1142         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
1143         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
1144         struct list_head hostrcb_free_q;
1145         struct list_head hostrcb_pending_q;
1146
1147         __be32 *host_rrq;
1148         dma_addr_t host_rrq_dma;
1149 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
1150 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
1151 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
1152 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
1153         volatile __be32 *hrrq_start;
1154         volatile __be32 *hrrq_end;
1155         volatile __be32 *hrrq_curr;
1156         volatile u32 toggle_bit;
1157
1158         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
1159
1160         unsigned int transop_timeout;
1161         const struct ipr_chip_cfg_t *chip_cfg;
1162
1163         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
1164         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
1165         void __iomem *ioa_mailbox;
1166         struct ipr_interrupts regs;
1167
1168         u16 saved_pcix_cmd_reg;
1169         u16 reset_retries;
1170
1171         u32 errors_logged;
1172         u32 doorbell;
1173
1174         struct Scsi_Host *host;
1175         struct pci_dev *pdev;
1176         struct ipr_sglist *ucode_sglist;
1177         u8 saved_mode_page_len;
1178
1179         struct work_struct work_q;
1180
1181         wait_queue_head_t reset_wait_q;
1182
1183         struct ipr_dump *dump;
1184         enum ipr_sdt_state sdt_state;
1185
1186         struct ipr_misc_cbs *vpd_cbs;
1187         dma_addr_t vpd_cbs_dma;
1188
1189         struct pci_pool *ipr_cmd_pool;
1190
1191         struct ipr_cmnd *reset_cmd;
1192         int (*reset) (struct ipr_cmnd *);
1193
1194         struct ata_host ata_host;
1195         char ipr_cmd_label[8];
1196 #define IPR_CMD_LABEL           "ipr_cmnd"
1197         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1198         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1199 };
1200
1201 struct ipr_cmnd {
1202         struct ipr_ioarcb ioarcb;
1203         struct ipr_ioasa ioasa;
1204         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1205         struct list_head queue;
1206         struct scsi_cmnd *scsi_cmd;
1207         struct ata_queued_cmd *qc;
1208         struct completion completion;
1209         struct timer_list timer;
1210         void (*done) (struct ipr_cmnd *);
1211         int (*job_step) (struct ipr_cmnd *);
1212         int (*job_step_failed) (struct ipr_cmnd *);
1213         u16 cmd_index;
1214         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1215         dma_addr_t sense_buffer_dma;
1216         unsigned short dma_use_sg;
1217         dma_addr_t dma_handle;
1218         struct ipr_cmnd *sibling;
1219         union {
1220                 enum ipr_shutdown_type shutdown_type;
1221                 struct ipr_hostrcb *hostrcb;
1222                 unsigned long time_left;
1223                 unsigned long scratch;
1224                 struct ipr_resource_entry *res;
1225                 struct scsi_device *sdev;
1226         } u;
1227
1228         struct ipr_ioa_cfg *ioa_cfg;
1229 };
1230
1231 struct ipr_ses_table_entry {
1232         char product_id[17];
1233         char compare_product_id_byte[17];
1234         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1235 };
1236
1237 struct ipr_dump_header {
1238         u32 eye_catcher;
1239 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1240         u32 len;
1241         u32 num_entries;
1242         u32 first_entry_offset;
1243         u32 status;
1244 #define IPR_DUMP_STATUS_SUCCESS                 0
1245 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1246 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1247         u32 os;
1248 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1249         u32 driver_name;
1250 #define IPR_DUMP_DRIVER_NAME    0x49505232
1251 }__attribute__((packed, aligned (4)));
1252
1253 struct ipr_dump_entry_header {
1254         u32 eye_catcher;
1255 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1256         u32 len;
1257         u32 num_elems;
1258         u32 offset;
1259         u32 data_type;
1260 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1261 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1262         u32 id;
1263 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1264 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1265 #define IPR_DUMP_TRACE_ID               0x54524143
1266 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1267 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1268 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1269 #define IPR_DUMP_PEND_OPS               0x414F5053
1270         u32 status;
1271 }__attribute__((packed, aligned (4)));
1272
1273 struct ipr_dump_location_entry {
1274         struct ipr_dump_entry_header hdr;
1275         u8 location[BUS_ID_SIZE];
1276 }__attribute__((packed));
1277
1278 struct ipr_dump_trace_entry {
1279         struct ipr_dump_entry_header hdr;
1280         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1281 }__attribute__((packed, aligned (4)));
1282
1283 struct ipr_dump_version_entry {
1284         struct ipr_dump_entry_header hdr;
1285         u8 version[sizeof(IPR_DRIVER_VERSION)];
1286 };
1287
1288 struct ipr_dump_ioa_type_entry {
1289         struct ipr_dump_entry_header hdr;
1290         u32 type;
1291         u32 fw_version;
1292 };
1293
1294 struct ipr_driver_dump {
1295         struct ipr_dump_header hdr;
1296         struct ipr_dump_version_entry version_entry;
1297         struct ipr_dump_location_entry location_entry;
1298         struct ipr_dump_ioa_type_entry ioa_type_entry;
1299         struct ipr_dump_trace_entry trace_entry;
1300 }__attribute__((packed));
1301
1302 struct ipr_ioa_dump {
1303         struct ipr_dump_entry_header hdr;
1304         struct ipr_sdt sdt;
1305         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1306         u32 reserved;
1307         u32 next_page_index;
1308         u32 page_offset;
1309         u32 format;
1310 #define IPR_SDT_FMT2            2
1311 #define IPR_SDT_UNKNOWN         3
1312 }__attribute__((packed, aligned (4)));
1313
1314 struct ipr_dump {
1315         struct kref kref;
1316         struct ipr_ioa_cfg *ioa_cfg;
1317         struct ipr_driver_dump driver_dump;
1318         struct ipr_ioa_dump ioa_dump;
1319 };
1320
1321 struct ipr_error_table_t {
1322         u32 ioasc;
1323         int log_ioasa;
1324         int log_hcam;
1325         char *error;
1326 };
1327
1328 struct ipr_software_inq_lid_info {
1329         __be32 load_id;
1330         __be32 timestamp[3];
1331 }__attribute__((packed, aligned (4)));
1332
1333 struct ipr_ucode_image_header {
1334         __be32 header_length;
1335         __be32 lid_table_offset;
1336         u8 major_release;
1337         u8 card_type;
1338         u8 minor_release[2];
1339         u8 reserved[20];
1340         char eyecatcher[16];
1341         __be32 num_lids;
1342         struct ipr_software_inq_lid_info lid[1];
1343 }__attribute__((packed, aligned (4)));
1344
1345 /*
1346  * Macros
1347  */
1348 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1349
1350 #ifdef CONFIG_SCSI_IPR_TRACE
1351 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1352 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1353 #else
1354 #define ipr_create_trace_file(kobj, attr) 0
1355 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1356 #endif
1357
1358 #ifdef CONFIG_SCSI_IPR_DUMP
1359 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1360 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1361 #else
1362 #define ipr_create_dump_file(kobj, attr) 0
1363 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1364 #endif
1365
1366 /*
1367  * Error logging macros
1368  */
1369 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1370 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1371 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1372
1373 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1374         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1375                 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1376
1377 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1378         ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1379
1380 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1381         ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1382
1383 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1384 {                                                                       \
1385         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1386                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1387         } else {                                                        \
1388                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1389                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1390                         (res).bus, (res).target, (res).lun);            \
1391         }                                                               \
1392 }
1393
1394 #define ipr_hcam_err(hostrcb, fmt, ...)                                 \
1395 {                                                                                                       \
1396         if (ipr_is_device(&(hostrcb)->hcam.u.error.failing_dev_res_addr)) {             \
1397                 ipr_ra_err((hostrcb)->ioa_cfg,                                                  \
1398                                 (hostrcb)->hcam.u.error.failing_dev_res_addr,                   \
1399                                 fmt, ##__VA_ARGS__);                                                    \
1400         } else {                                                                                        \
1401                 dev_err(&(hostrcb)->ioa_cfg->pdev->dev, fmt, ##__VA_ARGS__);            \
1402         }                                                                                               \
1403 }
1404
1405 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1406         __FILE__, __FUNCTION__, __LINE__)
1407
1408 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1409 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1410
1411 #define ipr_err_separator \
1412 ipr_err("----------------------------------------------------------\n")
1413
1414
1415 /*
1416  * Inlines
1417  */
1418
1419 /**
1420  * ipr_is_ioa_resource - Determine if a resource is the IOA
1421  * @res:        resource entry struct
1422  *
1423  * Return value:
1424  *      1 if IOA / 0 if not IOA
1425  **/
1426 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1427 {
1428         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1429 }
1430
1431 /**
1432  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1433  * @res:        resource entry struct
1434  *
1435  * Return value:
1436  *      1 if AF DASD / 0 if not AF DASD
1437  **/
1438 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1439 {
1440         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1441             !ipr_is_ioa_resource(res) &&
1442             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1443                 return 1;
1444         else
1445                 return 0;
1446 }
1447
1448 /**
1449  * ipr_is_vset_device - Determine if a resource is a VSET
1450  * @res:        resource entry struct
1451  *
1452  * Return value:
1453  *      1 if VSET / 0 if not VSET
1454  **/
1455 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1456 {
1457         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1458             !ipr_is_ioa_resource(res) &&
1459             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1460                 return 1;
1461         else
1462                 return 0;
1463 }
1464
1465 /**
1466  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1467  * @res:        resource entry struct
1468  *
1469  * Return value:
1470  *      1 if GSCSI / 0 if not GSCSI
1471  **/
1472 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1473 {
1474         if (!ipr_is_ioa_resource(res) &&
1475             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1476                 return 1;
1477         else
1478                 return 0;
1479 }
1480
1481 /**
1482  * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1483  * @res:        resource entry struct
1484  *
1485  * Return value:
1486  *      1 if SCSI disk / 0 if not SCSI disk
1487  **/
1488 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1489 {
1490         if (ipr_is_af_dasd_device(res) ||
1491             (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1492                 return 1;
1493         else
1494                 return 0;
1495 }
1496
1497 /**
1498  * ipr_is_gata - Determine if a resource is a generic ATA resource
1499  * @res:        resource entry struct
1500  *
1501  * Return value:
1502  *      1 if GATA / 0 if not GATA
1503  **/
1504 static inline int ipr_is_gata(struct ipr_resource_entry *res)
1505 {
1506         if (!ipr_is_ioa_resource(res) &&
1507             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA)
1508                 return 1;
1509         else
1510                 return 0;
1511 }
1512
1513 /**
1514  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1515  * @res:        resource entry struct
1516  *
1517  * Return value:
1518  *      1 if NACA queueing model / 0 if not NACA queueing model
1519  **/
1520 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1521 {
1522         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1523                 return 1;
1524         return 0;
1525 }
1526
1527 /**
1528  * ipr_is_device - Determine if resource address is that of a device
1529  * @res_addr:   resource address struct
1530  *
1531  * Return value:
1532  *      1 if AF / 0 if not AF
1533  **/
1534 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1535 {
1536         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1537             (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1538                 return 1;
1539
1540         return 0;
1541 }
1542
1543 /**
1544  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1545  * @sdt_word:   SDT address
1546  *
1547  * Return value:
1548  *      1 if format 2 / 0 if not
1549  **/
1550 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1551 {
1552         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1553
1554         switch (bar_sel) {
1555         case IPR_SDT_FMT2_BAR0_SEL:
1556         case IPR_SDT_FMT2_BAR1_SEL:
1557         case IPR_SDT_FMT2_BAR2_SEL:
1558         case IPR_SDT_FMT2_BAR3_SEL:
1559         case IPR_SDT_FMT2_BAR4_SEL:
1560         case IPR_SDT_FMT2_BAR5_SEL:
1561         case IPR_SDT_FMT2_EXP_ROM_SEL:
1562                 return 1;
1563         };
1564
1565         return 0;
1566 }
1567
1568 #endif