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fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / drivers / usb / gadget / s3c2410_udc.c
blobe3e90f8a75e7ffca404685058654e3d90df70336
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/smp_lock.h>
32 #include <linux/errno.h>
33 #include <linux/init.h>
34 #include <linux/timer.h>
35 #include <linux/list.h>
36 #include <linux/interrupt.h>
37 #include <linux/platform_device.h>
38 #include <linux/version.h>
39 #include <linux/clk.h>
40
41 #include <linux/debugfs.h>
42 #include <linux/seq_file.h>
43
44 #include <linux/usb.h>
45 #include <linux/usb/gadget.h>
46
47 #include <asm/byteorder.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
52 #include <asm/arch/irqs.h>
53
54 #include <asm/arch/hardware.h>
55 #include <asm/arch/regs-clock.h>
56 #include <asm/arch/regs-gpio.h>
57 #include <asm/arch/regs-udc.h>
58 #include <asm/arch/udc.h>
59
60 #include <asm/mach-types.h>
61
62 #include "s3c2410_udc.h"
63
64 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
65 #define DRIVER_VERSION "29 Apr 2007"
66 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
67 "Arnaud Patard <arnaud.patard@rtp-net.org>"
68
69 static const char gadget_name[] = "s3c2410_udc";
70 static const char driver_desc[] = DRIVER_DESC;
71
72 static struct s3c2410_udc *the_controller;
73 static struct clk *udc_clock;
74 static struct clk *usb_bus_clock;
75 static void __iomem *base_addr;
76 static u64 rsrc_start;
77 static u64 rsrc_len;
78 static struct dentry *s3c2410_udc_debugfs_root;
79
80 static inline u32 udc_read(u32 reg)
81 {
82 return readb(base_addr + reg);
83 }
84
85 static inline void udc_write(u32 value, u32 reg)
86 {
87 writeb(value, base_addr + reg);
88 }
89
90 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
91 {
92 writeb(value, base + reg);
93 }
94
95 static struct s3c2410_udc_mach_info *udc_info;
96
97 /*************************** DEBUG FUNCTION ***************************/
98 #define DEBUG_NORMAL 1
99 #define DEBUG_VERBOSE 2
100
101 #ifdef CONFIG_USB_S3C2410_DEBUG
102 #define USB_S3C2410_DEBUG_LEVEL 0
103
104 static uint32_t s3c2410_ticks = 0;
105
106 static int dprintk(int level, const char *fmt, ...)
107 {
108 static char printk_buf[1024];
109 static long prevticks;
110 static int invocation;
111 va_list args;
112 int len;
113
114 if (level > USB_S3C2410_DEBUG_LEVEL)
115 return 0;
116
117 if (s3c2410_ticks != prevticks) {
118 prevticks = s3c2410_ticks;
119 invocation = 0;
120 }
121
122 len = scnprintf(printk_buf,
123 sizeof(printk_buf), "%1lu.%02d USB: ",
124 prevticks, invocation++);
125
126 va_start(args, fmt);
127 len = vscnprintf(printk_buf+len,
128 sizeof(printk_buf)-len, fmt, args);
129 va_end(args);
130
131 return printk(KERN_DEBUG "%s", printk_buf);
132 }
133 #else
134 static int dprintk(int level, const char *fmt, ...)
135 {
136 return 0;
137 }
138 #endif
139 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
140 {
141 u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
142 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
143 u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
144 u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
145
146 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
147 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
148 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
149 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
150 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
151 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
152 udc_write(0, S3C2410_UDC_INDEX_REG);
153 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
154 udc_write(1, S3C2410_UDC_INDEX_REG);
155 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
156 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
157 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
158 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
159 udc_write(2, S3C2410_UDC_INDEX_REG);
160 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
161 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
162 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
163 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
164
165 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
166 "PWR_REG : 0x%04X\n"
167 "EP_INT_REG : 0x%04X\n"
168 "USB_INT_REG : 0x%04X\n"
169 "EP_INT_EN_REG : 0x%04X\n"
170 "USB_INT_EN_REG : 0x%04X\n"
171 "EP0_CSR : 0x%04X\n"
172 "EP1_I_CSR1 : 0x%04X\n"
173 "EP1_I_CSR2 : 0x%04X\n"
174 "EP1_O_CSR1 : 0x%04X\n"
175 "EP1_O_CSR2 : 0x%04X\n"
176 "EP2_I_CSR1 : 0x%04X\n"
177 "EP2_I_CSR2 : 0x%04X\n"
178 "EP2_O_CSR1 : 0x%04X\n"
179 "EP2_O_CSR2 : 0x%04X\n",
180 addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
181 ep_int_en_reg, usb_int_en_reg, ep0_csr,
182 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
183 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
184 );
185
186 return 0;
187 }
188
189 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
190 struct file *file)
191 {
192 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
193 }
194
195 static const struct file_operations s3c2410_udc_debugfs_fops = {
196 .open = s3c2410_udc_debugfs_fops_open,
197 .read = seq_read,
198 .llseek = seq_lseek,
199 .release = single_release,
200 .owner = THIS_MODULE,
201 };
202
203 /* io macros */
204
205 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
206 {
207 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
208 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
209 S3C2410_UDC_EP0_CSR_REG);
210 }
211
212 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
213 {
214 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
215 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
216 }
217
218 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
219 {
220 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
221 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
222 }
223
224 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
225 {
226 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
227 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
228 }
229
230 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
231 {
232 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
233 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
234 }
235
236 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
237 {
238 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
239 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
240 }
241
242 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
243 {
244 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
245
246 udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
247 | S3C2410_UDC_EP0_CSR_DE),
248 S3C2410_UDC_EP0_CSR_REG);
249 }
250
251 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
252 {
253 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
254 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
255 | S3C2410_UDC_EP0_CSR_SSE),
256 S3C2410_UDC_EP0_CSR_REG);
257 }
258
259 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
260 {
261 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
262 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
263 | S3C2410_UDC_EP0_CSR_DE),
264 S3C2410_UDC_EP0_CSR_REG);
265 }
266
267 /*------------------------- I/O ----------------------------------*/
268
269 /*
270 * s3c2410_udc_done
271 */
272 static void s3c2410_udc_done(struct s3c2410_ep *ep,
273 struct s3c2410_request *req, int status)
274 {
275 unsigned halted = ep->halted;
276
277 list_del_init(&req->queue);
278
279 if (likely (req->req.status == -EINPROGRESS))
280 req->req.status = status;
281 else
282 status = req->req.status;
283
284 ep->halted = 1;
285 req->req.complete(&ep->ep, &req->req);
286 ep->halted = halted;
287 }
288
289 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
290 struct s3c2410_ep *ep, int status)
291 {
292 /* Sanity check */
293 if (&ep->queue == NULL)
294 return;
295
296 while (!list_empty (&ep->queue)) {
297 struct s3c2410_request *req;
298 req = list_entry (ep->queue.next, struct s3c2410_request,
299 queue);
300 s3c2410_udc_done(ep, req, status);
301 }
302 }
303
304 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
305 {
306 unsigned i;
307
308 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
309 * fifos, and pending transactions mustn't be continued in any case.
310 */
311
312 for (i = 1; i < S3C2410_ENDPOINTS; i++)
313 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
314 }
315
316 static inline int s3c2410_udc_fifo_count_out(void)
317 {
318 int tmp;
319
320 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
321 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
322 return tmp;
323 }
324
325 /*
326 * s3c2410_udc_write_packet
327 */
328 static inline int s3c2410_udc_write_packet(int fifo,
329 struct s3c2410_request *req,
330 unsigned max)
331 {
332 unsigned len = min(req->req.length - req->req.actual, max);
333 u8 *buf = req->req.buf + req->req.actual;
334
335 prefetch(buf);
336
337 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
338 req->req.actual, req->req.length, len, req->req.actual + len);
339
340 req->req.actual += len;
341
342 udelay(5);
343 writesb(base_addr + fifo, buf, len);
344 return len;
345 }
346
347 /*
348 * s3c2410_udc_write_fifo
349 *
350 * return: 0 = still running, 1 = completed, negative = errno
351 */
352 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
353 struct s3c2410_request *req)
354 {
355 unsigned count;
356 int is_last;
357 u32 idx;
358 int fifo_reg;
359 u32 ep_csr;
360
361 idx = ep->bEndpointAddress & 0x7F;
362 switch (idx) {
363 default:
364 idx = 0;
365 case 0:
366 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
367 break;
368 case 1:
369 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
370 break;
371 case 2:
372 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
373 break;
374 case 3:
375 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
376 break;
377 case 4:
378 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
379 break;
380 }
381
382 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
383
384 /* last packet is often short (sometimes a zlp) */
385 if (count != ep->ep.maxpacket)
386 is_last = 1;
387 else if (req->req.length != req->req.actual || req->req.zero)
388 is_last = 0;
389 else
390 is_last = 2;
391
392 /* Only ep0 debug messages are interesting */
393 if (idx == 0)
394 dprintk(DEBUG_NORMAL,
395 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
396 idx, count, req->req.actual, req->req.length,
397 is_last, req->req.zero);
398
399 if (is_last) {
400 /* The order is important. It prevents sending 2 packets
401 * at the same time */
402
403 if (idx == 0) {
404 /* Reset signal => no need to say 'data sent' */
405 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
406 & S3C2410_UDC_USBINT_RESET))
407 s3c2410_udc_set_ep0_de_in(base_addr);
408 ep->dev->ep0state=EP0_IDLE;
409 } else {
410 udc_write(idx, S3C2410_UDC_INDEX_REG);
411 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
412 udc_write(idx, S3C2410_UDC_INDEX_REG);
413 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
414 S3C2410_UDC_IN_CSR1_REG);
415 }
416
417 s3c2410_udc_done(ep, req, 0);
418 is_last = 1;
419 } else {
420 if (idx == 0) {
421 /* Reset signal => no need to say 'data sent' */
422 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
423 & S3C2410_UDC_USBINT_RESET))
424 s3c2410_udc_set_ep0_ipr(base_addr);
425 } else {
426 udc_write(idx, S3C2410_UDC_INDEX_REG);
427 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
428 udc_write(idx, S3C2410_UDC_INDEX_REG);
429 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
430 S3C2410_UDC_IN_CSR1_REG);
431 }
432 }
433
434 return is_last;
435 }
436
437 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
438 struct s3c2410_request *req, unsigned avail)
439 {
440 unsigned len;
441
442 len = min(req->req.length - req->req.actual, avail);
443 req->req.actual += len;
444
445 readsb(fifo + base_addr, buf, len);
446 return len;
447 }
448
449 /*
450 * return: 0 = still running, 1 = queue empty, negative = errno
451 */
452 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
453 struct s3c2410_request *req)
454 {
455 u8 *buf;
456 u32 ep_csr;
457 unsigned bufferspace;
458 int is_last=1;
459 unsigned avail;
460 int fifo_count = 0;
461 u32 idx;
462 int fifo_reg;
463
464 idx = ep->bEndpointAddress & 0x7F;
465
466 switch (idx) {
467 default:
468 idx = 0;
469 case 0:
470 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
471 break;
472 case 1:
473 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
474 break;
475 case 2:
476 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
477 break;
478 case 3:
479 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
480 break;
481 case 4:
482 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
483 break;
484 }
485
486 if (!req->req.length)
487 return 1;
488
489 buf = req->req.buf + req->req.actual;
490 bufferspace = req->req.length - req->req.actual;
491 if (!bufferspace) {
492 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
493 return -1;
494 }
495
496 udc_write(idx, S3C2410_UDC_INDEX_REG);
497
498 fifo_count = s3c2410_udc_fifo_count_out();
499 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
500
501 if (fifo_count > ep->ep.maxpacket)
502 avail = ep->ep.maxpacket;
503 else
504 avail = fifo_count;
505
506 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
507
508 /* checking this with ep0 is not accurate as we already
509 * read a control request
510 **/
511 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
512 is_last = 1;
513 /* overflowed this request? flush extra data */
514 if (fifo_count != avail)
515 req->req.status = -EOVERFLOW;
516 } else {
517 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
518 }
519
520 udc_write(idx, S3C2410_UDC_INDEX_REG);
521 fifo_count = s3c2410_udc_fifo_count_out();
522
523 /* Only ep0 debug messages are interesting */
524 if (idx == 0)
525 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
526 __func__, fifo_count,is_last);
527
528 if (is_last) {
529 if (idx == 0) {
530 s3c2410_udc_set_ep0_de_out(base_addr);
531 ep->dev->ep0state = EP0_IDLE;
532 } else {
533 udc_write(idx, S3C2410_UDC_INDEX_REG);
534 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
535 udc_write(idx, S3C2410_UDC_INDEX_REG);
536 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
537 S3C2410_UDC_OUT_CSR1_REG);
538 }
539
540 s3c2410_udc_done(ep, req, 0);
541 } else {
542 if (idx == 0) {
543 s3c2410_udc_clear_ep0_opr(base_addr);
544 } else {
545 udc_write(idx, S3C2410_UDC_INDEX_REG);
546 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
547 udc_write(idx, S3C2410_UDC_INDEX_REG);
548 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
549 S3C2410_UDC_OUT_CSR1_REG);
550 }
551 }
552
553 return is_last;
554 }
555
556 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
557 {
558 unsigned char *outbuf = (unsigned char*)crq;
559 int bytes_read = 0;
560
561 udc_write(0, S3C2410_UDC_INDEX_REG);
562
563 bytes_read = s3c2410_udc_fifo_count_out();
564
565 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
566
567 if (bytes_read > sizeof(struct usb_ctrlrequest))
568 bytes_read = sizeof(struct usb_ctrlrequest);
569
570 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
571
572 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
573 bytes_read, crq->bRequest, crq->bRequestType,
574 crq->wValue, crq->wIndex, crq->wLength);
575
576 return bytes_read;
577 }
578
579 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
580 struct usb_ctrlrequest *crq)
581 {
582 u16 status = 0;
583 u8 ep_num = crq->wIndex & 0x7F;
584 u8 is_in = crq->wIndex & USB_DIR_IN;
585
586 switch (crq->bRequestType & USB_RECIP_MASK) {
587 case USB_RECIP_INTERFACE:
588 break;
589
590 case USB_RECIP_DEVICE:
591 status = dev->devstatus;
592 break;
593
594 case USB_RECIP_ENDPOINT:
595 if (ep_num > 4 || crq->wLength > 2)
596 return 1;
597
598 if (ep_num == 0) {
599 udc_write(0, S3C2410_UDC_INDEX_REG);
600 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
601 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
602 } else {
603 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
604 if (is_in) {
605 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
606 status = status & S3C2410_UDC_ICSR1_SENDSTL;
607 } else {
608 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
609 status = status & S3C2410_UDC_OCSR1_SENDSTL;
610 }
611 }
612
613 status = status ? 1 : 0;
614 break;
615
616 default:
617 return 1;
618 }
619
620 /* Seems to be needed to get it working. ouch :( */
621 udelay(5);
622 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
623 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
624 s3c2410_udc_set_ep0_de_in(base_addr);
625
626 return 0;
627 }
628 /*------------------------- usb state machine -------------------------------*/
629 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
630
631 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
632 struct s3c2410_ep *ep,
633 struct usb_ctrlrequest *crq,
634 u32 ep0csr)
635 {
636 int len, ret, tmp;
637
638 /* start control request? */
639 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
640 return;
641
642 s3c2410_udc_nuke(dev, ep, -EPROTO);
643
644 len = s3c2410_udc_read_fifo_crq(crq);
645 if (len != sizeof(*crq)) {
646 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
647 " wanted %d bytes got %d. Stalling out...\n",
648 sizeof(*crq), len);
649 s3c2410_udc_set_ep0_ss(base_addr);
650 return;
651 }
652
653 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
654 crq->bRequest, crq->bRequestType, crq->wLength);
655
656 /* cope with automagic for some standard requests. */
657 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
658 == USB_TYPE_STANDARD;
659 dev->req_config = 0;
660 dev->req_pending = 1;
661
662 switch (crq->bRequest) {
663 case USB_REQ_SET_CONFIGURATION:
664 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
665
666 if (crq->bRequestType == USB_RECIP_DEVICE) {
667 dev->req_config = 1;
668 s3c2410_udc_set_ep0_de_out(base_addr);
669 }
670 break;
671
672 case USB_REQ_SET_INTERFACE:
673 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
674
675 if (crq->bRequestType == USB_RECIP_INTERFACE) {
676 dev->req_config = 1;
677 s3c2410_udc_set_ep0_de_out(base_addr);
678 }
679 break;
680
681 case USB_REQ_SET_ADDRESS:
682 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
683
684 if (crq->bRequestType == USB_RECIP_DEVICE) {
685 tmp = crq->wValue & 0x7F;
686 dev->address = tmp;
687 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
688 S3C2410_UDC_FUNC_ADDR_REG);
689 s3c2410_udc_set_ep0_de_out(base_addr);
690 return;
691 }
692 break;
693
694 case USB_REQ_GET_STATUS:
695 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
696 s3c2410_udc_clear_ep0_opr(base_addr);
697
698 if (dev->req_std) {
699 if (!s3c2410_udc_get_status(dev, crq)) {
700 return;
701 }
702 }
703 break;
704
705 case USB_REQ_CLEAR_FEATURE:
706 s3c2410_udc_clear_ep0_opr(base_addr);
707
708 if (crq->bRequestType != USB_RECIP_ENDPOINT)
709 break;
710
711 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
712 break;
713
714 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
715 s3c2410_udc_set_ep0_de_out(base_addr);
716 return;
717
718 case USB_REQ_SET_FEATURE:
719 s3c2410_udc_clear_ep0_opr(base_addr);
720
721 if (crq->bRequestType != USB_RECIP_ENDPOINT)
722 break;
723
724 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
725 break;
726
727 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
728 s3c2410_udc_set_ep0_de_out(base_addr);
729 return;
730
731 default:
732 s3c2410_udc_clear_ep0_opr(base_addr);
733 break;
734 }
735
736 if (crq->bRequestType & USB_DIR_IN)
737 dev->ep0state = EP0_IN_DATA_PHASE;
738 else
739 dev->ep0state = EP0_OUT_DATA_PHASE;
740
741 ret = dev->driver->setup(&dev->gadget, crq);
742 if (ret < 0) {
743 if (dev->req_config) {
744 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
745 crq->bRequest, ret);
746 return;
747 }
748
749 if (ret == -EOPNOTSUPP)
750 dprintk(DEBUG_NORMAL, "Operation not supported\n");
751 else
752 dprintk(DEBUG_NORMAL,
753 "dev->driver->setup failed. (%d)\n", ret);
754
755 udelay(5);
756 s3c2410_udc_set_ep0_ss(base_addr);
757 s3c2410_udc_set_ep0_de_out(base_addr);
758 dev->ep0state = EP0_IDLE;
759 /* deferred i/o == no response yet */
760 } else if (dev->req_pending) {
761 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
762 dev->req_pending=0;
763 }
764
765 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
766 }
767
768 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
769 {
770 u32 ep0csr;
771 struct s3c2410_ep *ep = &dev->ep[0];
772 struct s3c2410_request *req;
773 struct usb_ctrlrequest crq;
774
775 if (list_empty(&ep->queue))
776 req = NULL;
777 else
778 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
779
780 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
781 * S3C2410_UDC_EP0_CSR_REG when index is zero */
782
783 udc_write(0, S3C2410_UDC_INDEX_REG);
784 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
785
786 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
787 ep0csr, ep0states[dev->ep0state]);
788
789 /* clear stall status */
790 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
791 s3c2410_udc_nuke(dev, ep, -EPIPE);
792 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
793 s3c2410_udc_clear_ep0_sst(base_addr);
794 dev->ep0state = EP0_IDLE;
795 return;
796 }
797
798 /* clear setup end */
799 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
800 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
801 s3c2410_udc_nuke(dev, ep, 0);
802 s3c2410_udc_clear_ep0_se(base_addr);
803 dev->ep0state = EP0_IDLE;
804 }
805
806 switch (dev->ep0state) {
807 case EP0_IDLE:
808 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
809 break;
810
811 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
812 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
813 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
814 s3c2410_udc_write_fifo(ep, req);
815 }
816 break;
817
818 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
819 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
820 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
821 s3c2410_udc_read_fifo(ep,req);
822 }
823 break;
824
825 case EP0_END_XFER:
826 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
827 dev->ep0state = EP0_IDLE;
828 break;
829
830 case EP0_STALL:
831 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
832 dev->ep0state = EP0_IDLE;
833 break;
834 }
835 }
836
837 /*
838 * handle_ep - Manage I/O endpoints
839 */
840
841 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
842 {
843 struct s3c2410_request *req;
844 int is_in = ep->bEndpointAddress & USB_DIR_IN;
845 u32 ep_csr1;
846 u32 idx;
847
848 if (likely (!list_empty(&ep->queue)))
849 req = list_entry(ep->queue.next,
850 struct s3c2410_request, queue);
851 else
852 req = NULL;
853
854 idx = ep->bEndpointAddress & 0x7F;
855
856 if (is_in) {
857 udc_write(idx, S3C2410_UDC_INDEX_REG);
858 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
859 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
860 idx, ep_csr1, req ? 1 : 0);
861
862 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
863 dprintk(DEBUG_VERBOSE, "st\n");
864 udc_write(idx, S3C2410_UDC_INDEX_REG);
865 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
866 S3C2410_UDC_IN_CSR1_REG);
867 return;
868 }
869
870 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
871 s3c2410_udc_write_fifo(ep,req);
872 }
873 } else {
874 udc_write(idx, S3C2410_UDC_INDEX_REG);
875 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
876 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
877
878 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
879 udc_write(idx, S3C2410_UDC_INDEX_REG);
880 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
881 S3C2410_UDC_OUT_CSR1_REG);
882 return;
883 }
884
885 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
886 s3c2410_udc_read_fifo(ep,req);
887 }
888 }
889 }
890
891 #include <asm/arch/regs-irq.h>
892
893 /*
894 * s3c2410_udc_irq - interrupt handler
895 */
896 static irqreturn_t s3c2410_udc_irq(int irq, void *_dev)
897 {
898 struct s3c2410_udc *dev = _dev;
899 int usb_status;
900 int usbd_status;
901 int pwr_reg;
902 int ep0csr;
903 int i;
904 u32 idx;
905 unsigned long flags;
906
907 spin_lock_irqsave(&dev->lock, flags);
908
909 /* Driver connected ? */
910 if (!dev->driver) {
911 /* Clear interrupts */
912 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
913 S3C2410_UDC_USB_INT_REG);
914 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
915 S3C2410_UDC_EP_INT_REG);
916 }
917
918 /* Save index */
919 idx = udc_read(S3C2410_UDC_INDEX_REG);
920
921 /* Read status registers */
922 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
923 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
924 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
925
926 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
927 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
928
929 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
930 usb_status, usbd_status, pwr_reg, ep0csr);
931
932 /*
933 * Now, handle interrupts. There's two types :
934 * - Reset, Resume, Suspend coming -> usb_int_reg
935 * - EP -> ep_int_reg
936 */
937
938 /* RESET */
939 if (usb_status & S3C2410_UDC_USBINT_RESET) {
940 /* two kind of reset :
941 * - reset start -> pwr reg = 8
942 * - reset end -> pwr reg = 0
943 **/
944 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
945 ep0csr, pwr_reg);
946
947 dev->gadget.speed = USB_SPEED_UNKNOWN;
948 udc_write(0x00, S3C2410_UDC_INDEX_REG);
949 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
950 S3C2410_UDC_MAXP_REG);
951 dev->address = 0;
952
953 dev->ep0state = EP0_IDLE;
954 dev->gadget.speed = USB_SPEED_FULL;
955
956 /* clear interrupt */
957 udc_write(S3C2410_UDC_USBINT_RESET,
958 S3C2410_UDC_USB_INT_REG);
959
960 udc_write(idx, S3C2410_UDC_INDEX_REG);
961 spin_unlock_irqrestore(&dev->lock, flags);
962 return IRQ_HANDLED;
963 }
964
965 /* RESUME */
966 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
967 dprintk(DEBUG_NORMAL, "USB resume\n");
968
969 /* clear interrupt */
970 udc_write(S3C2410_UDC_USBINT_RESUME,
971 S3C2410_UDC_USB_INT_REG);
972
973 if (dev->gadget.speed != USB_SPEED_UNKNOWN
974 && dev->driver
975 && dev->driver->resume)
976 dev->driver->resume(&dev->gadget);
977 }
978
979 /* SUSPEND */
980 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
981 dprintk(DEBUG_NORMAL, "USB suspend\n");
982
983 /* clear interrupt */
984 udc_write(S3C2410_UDC_USBINT_SUSPEND,
985 S3C2410_UDC_USB_INT_REG);
986
987 if (dev->gadget.speed != USB_SPEED_UNKNOWN
988 && dev->driver
989 && dev->driver->suspend)
990 dev->driver->suspend(&dev->gadget);
991
992 dev->ep0state = EP0_IDLE;
993 }
994
995 /* EP */
996 /* control traffic */
997 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
998 * generate an interrupt
999 */
1000 if (usbd_status & S3C2410_UDC_INT_EP0) {
1001 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1002 /* Clear the interrupt bit by setting it to 1 */
1003 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1004 s3c2410_udc_handle_ep0(dev);
1005 }
1006
1007 /* endpoint data transfers */
1008 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1009 u32 tmp = 1 << i;
1010 if (usbd_status & tmp) {
1011 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1012
1013 /* Clear the interrupt bit by setting it to 1 */
1014 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1015 s3c2410_udc_handle_ep(&dev->ep[i]);
1016 }
1017 }
1018
1019 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq);
1020
1021 /* Restore old index */
1022 udc_write(idx, S3C2410_UDC_INDEX_REG);
1023
1024 spin_unlock_irqrestore(&dev->lock, flags);
1025
1026 return IRQ_HANDLED;
1027 }
1028 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1029
1030 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1031 {
1032 return container_of(ep, struct s3c2410_ep, ep);
1033 }
1034
1035 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1036 {
1037 return container_of(gadget, struct s3c2410_udc, gadget);
1038 }
1039
1040 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1041 {
1042 return container_of(req, struct s3c2410_request, req);
1043 }
1044
1045 /*
1046 * s3c2410_udc_ep_enable
1047 */
1048 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1049 const struct usb_endpoint_descriptor *desc)
1050 {
1051 struct s3c2410_udc *dev;
1052 struct s3c2410_ep *ep;
1053 u32 max, tmp;
1054 unsigned long flags;
1055 u32 csr1,csr2;
1056 u32 int_en_reg;
1057
1058 ep = to_s3c2410_ep(_ep);
1059
1060 if (!_ep || !desc || ep->desc
1061 || _ep->name == ep0name
1062 || desc->bDescriptorType != USB_DT_ENDPOINT)
1063 return -EINVAL;
1064
1065 dev = ep->dev;
1066 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1067 return -ESHUTDOWN;
1068
1069 max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1070
1071 local_irq_save (flags);
1072 _ep->maxpacket = max & 0x7ff;
1073 ep->desc = desc;
1074 ep->halted = 0;
1075 ep->bEndpointAddress = desc->bEndpointAddress;
1076
1077 /* set max packet */
1078 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1079 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1080
1081 /* set type, direction, address; reset fifo counters */
1082 if (desc->bEndpointAddress & USB_DIR_IN) {
1083 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1084 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1085
1086 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1087 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1088 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1089 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1090 } else {
1091 /* don't flush in fifo or it will cause endpoint interrupt */
1092 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1093 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1094
1095 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1096 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1097 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1098 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1099
1100 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1101 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1102
1103 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1104 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1105 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1106 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1107 }
1108
1109 /* enable irqs */
1110 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1111 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1112
1113 /* print some debug message */
1114 tmp = desc->bEndpointAddress;
1115 dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1116 _ep->name,ep->num, tmp,
1117 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1118
1119 local_irq_restore (flags);
1120 s3c2410_udc_set_halt(_ep, 0);
1121
1122 return 0;
1123 }
1124
1125 /*
1126 * s3c2410_udc_ep_disable
1127 */
1128 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1129 {
1130 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1131 unsigned long flags;
1132 u32 int_en_reg;
1133
1134 if (!_ep || !ep->desc) {
1135 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1136 _ep ? ep->ep.name : NULL);
1137 return -EINVAL;
1138 }
1139
1140 local_irq_save(flags);
1141
1142 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1143
1144 ep->desc = NULL;
1145 ep->halted = 1;
1146
1147 s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1148
1149 /* disable irqs */
1150 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1151 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1152
1153 local_irq_restore(flags);
1154
1155 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1156
1157 return 0;
1158 }
1159
1160 /*
1161 * s3c2410_udc_alloc_request
1162 */
1163 static struct usb_request *
1164 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1165 {
1166 struct s3c2410_request *req;
1167
1168 dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1169
1170 if (!_ep)
1171 return NULL;
1172
1173 req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1174 if (!req)
1175 return NULL;
1176
1177 INIT_LIST_HEAD (&req->queue);
1178 return &req->req;
1179 }
1180
1181 /*
1182 * s3c2410_udc_free_request
1183 */
1184 static void
1185 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1186 {
1187 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1188 struct s3c2410_request *req = to_s3c2410_req(_req);
1189
1190 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1191
1192 if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1193 return;
1194
1195 WARN_ON (!list_empty (&req->queue));
1196 kfree(req);
1197 }
1198
1199 /*
1200 * s3c2410_udc_queue
1201 */
1202 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1203 gfp_t gfp_flags)
1204 {
1205 struct s3c2410_request *req = to_s3c2410_req(_req);
1206 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1207 struct s3c2410_udc *dev;
1208 u32 ep_csr = 0;
1209 int fifo_count = 0;
1210 unsigned long flags;
1211
1212 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1213 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1214 return -EINVAL;
1215 }
1216
1217 dev = ep->dev;
1218 if (unlikely (!dev->driver
1219 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1220 return -ESHUTDOWN;
1221 }
1222
1223 local_irq_save (flags);
1224
1225 if (unlikely(!_req || !_req->complete
1226 || !_req->buf || !list_empty(&req->queue))) {
1227 if (!_req)
1228 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1229 else {
1230 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1231 __func__, !_req->complete,!_req->buf,
1232 !list_empty(&req->queue));
1233 }
1234
1235 local_irq_restore(flags);
1236 return -EINVAL;
1237 }
1238
1239 _req->status = -EINPROGRESS;
1240 _req->actual = 0;
1241
1242 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1243 __func__, ep->bEndpointAddress, _req->length);
1244
1245 if (ep->bEndpointAddress) {
1246 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1247
1248 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1249 ? S3C2410_UDC_IN_CSR1_REG
1250 : S3C2410_UDC_OUT_CSR1_REG);
1251 fifo_count = s3c2410_udc_fifo_count_out();
1252 } else {
1253 udc_write(0, S3C2410_UDC_INDEX_REG);
1254 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1255 fifo_count = s3c2410_udc_fifo_count_out();
1256 }
1257
1258 /* kickstart this i/o queue? */
1259 if (list_empty(&ep->queue) && !ep->halted) {
1260 if (ep->bEndpointAddress == 0 /* ep0 */) {
1261 switch (dev->ep0state) {
1262 case EP0_IN_DATA_PHASE:
1263 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1264 && s3c2410_udc_write_fifo(ep,
1265 req)) {
1266 dev->ep0state = EP0_IDLE;
1267 req = NULL;
1268 }
1269 break;
1270
1271 case EP0_OUT_DATA_PHASE:
1272 if ((!_req->length)
1273 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1274 && s3c2410_udc_read_fifo(ep,
1275 req))) {
1276 dev->ep0state = EP0_IDLE;
1277 req = NULL;
1278 }
1279 break;
1280
1281 default:
1282 local_irq_restore(flags);
1283 return -EL2HLT;
1284 }
1285 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1286 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1287 && s3c2410_udc_write_fifo(ep, req)) {
1288 req = NULL;
1289 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1290 && fifo_count
1291 && s3c2410_udc_read_fifo(ep, req)) {
1292 req = NULL;
1293 }
1294 }
1295
1296 /* pio or dma irq handler advances the queue. */
1297 if (likely (req != 0))
1298 list_add_tail(&req->queue, &ep->queue);
1299
1300 local_irq_restore(flags);
1301
1302 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1303 return 0;
1304 }
1305
1306 /*
1307 * s3c2410_udc_dequeue
1308 */
1309 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1310 {
1311 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1312 struct s3c2410_udc *udc;
1313 int retval = -EINVAL;
1314 unsigned long flags;
1315 struct s3c2410_request *req = NULL;
1316
1317 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1318
1319 if (!the_controller->driver)
1320 return -ESHUTDOWN;
1321
1322 if (!_ep || !_req)
1323 return retval;
1324
1325 udc = to_s3c2410_udc(ep->gadget);
1326
1327 local_irq_save (flags);
1328
1329 list_for_each_entry (req, &ep->queue, queue) {
1330 if (&req->req == _req) {
1331 list_del_init (&req->queue);
1332 _req->status = -ECONNRESET;
1333 retval = 0;
1334 break;
1335 }
1336 }
1337
1338 if (retval == 0) {
1339 dprintk(DEBUG_VERBOSE,
1340 "dequeued req %p from %s, len %d buf %p\n",
1341 req, _ep->name, _req->length, _req->buf);
1342
1343 s3c2410_udc_done(ep, req, -ECONNRESET);
1344 }
1345
1346 local_irq_restore (flags);
1347 return retval;
1348 }
1349
1350 /*
1351 * s3c2410_udc_set_halt
1352 */
1353 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1354 {
1355 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1356 u32 ep_csr = 0;
1357 unsigned long flags;
1358 u32 idx;
1359
1360 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1361 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1362 return -EINVAL;
1363 }
1364
1365 local_irq_save (flags);
1366
1367 idx = ep->bEndpointAddress & 0x7F;
1368
1369 if (idx == 0) {
1370 s3c2410_udc_set_ep0_ss(base_addr);
1371 s3c2410_udc_set_ep0_de_out(base_addr);
1372 } else {
1373 udc_write(idx, S3C2410_UDC_INDEX_REG);
1374 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1375 ? S3C2410_UDC_IN_CSR1_REG
1376 : S3C2410_UDC_OUT_CSR1_REG);
1377
1378 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1379 if (value)
1380 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1381 S3C2410_UDC_IN_CSR1_REG);
1382 else {
1383 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1384 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1385 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1386 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1387 }
1388 } else {
1389 if (value)
1390 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1391 S3C2410_UDC_OUT_CSR1_REG);
1392 else {
1393 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1394 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1395 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1396 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1397 }
1398 }
1399 }
1400
1401 ep->halted = value ? 1 : 0;
1402 local_irq_restore (flags);
1403
1404 return 0;
1405 }
1406
1407 static const struct usb_ep_ops s3c2410_ep_ops = {
1408 .enable = s3c2410_udc_ep_enable,
1409 .disable = s3c2410_udc_ep_disable,
1410
1411 .alloc_request = s3c2410_udc_alloc_request,
1412 .free_request = s3c2410_udc_free_request,
1413
1414 .queue = s3c2410_udc_queue,
1415 .dequeue = s3c2410_udc_dequeue,
1416
1417 .set_halt = s3c2410_udc_set_halt,
1418 };
1419
1420 /*------------------------- usb_gadget_ops ----------------------------------*/
1421
1422 /*
1423 * s3c2410_udc_get_frame
1424 */
1425 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1426 {
1427 int tmp;
1428
1429 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1430
1431 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1432 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1433 return tmp;
1434 }
1435
1436 /*
1437 * s3c2410_udc_wakeup
1438 */
1439 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1440 {
1441 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1442 return 0;
1443 }
1444
1445 /*
1446 * s3c2410_udc_set_selfpowered
1447 */
1448 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1449 {
1450 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1451
1452 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1453
1454 if (value)
1455 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1456 else
1457 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1458
1459 return 0;
1460 }
1461
1462 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1463 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1464
1465 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1466 {
1467 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1468
1469 if (udc_info && udc_info->udc_command) {
1470 if (is_on)
1471 s3c2410_udc_enable(udc);
1472 else {
1473 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1474 if (udc->driver && udc->driver->disconnect)
1475 udc->driver->disconnect(&udc->gadget);
1476
1477 }
1478 s3c2410_udc_disable(udc);
1479 }
1480 }
1481 else
1482 return -EOPNOTSUPP;
1483
1484 return 0;
1485 }
1486
1487 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1488 {
1489 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1490
1491 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1492
1493 udc->vbus = (is_active != 0);
1494 s3c2410_udc_set_pullup(udc, is_active);
1495 return 0;
1496 }
1497
1498 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1499 {
1500 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1501
1502 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1503
1504 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1505 return 0;
1506 }
1507
1508 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1509 {
1510 struct s3c2410_udc *dev = _dev;
1511 unsigned int value;
1512
1513 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1514 value = s3c2410_gpio_getpin(udc_info->vbus_pin);
1515
1516 if (udc_info->vbus_pin_inverted)
1517 value = !value;
1518
1519 if (value != dev->vbus)
1520 s3c2410_udc_vbus_session(&dev->gadget, value);
1521
1522 return IRQ_HANDLED;
1523 }
1524
1525 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1526 {
1527 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1528
1529 if (udc_info && udc_info->vbus_draw) {
1530 udc_info->vbus_draw(ma);
1531 return 0;
1532 }
1533
1534 return -ENOTSUPP;
1535 }
1536
1537 static const struct usb_gadget_ops s3c2410_ops = {
1538 .get_frame = s3c2410_udc_get_frame,
1539 .wakeup = s3c2410_udc_wakeup,
1540 .set_selfpowered = s3c2410_udc_set_selfpowered,
1541 .pullup = s3c2410_udc_pullup,
1542 .vbus_session = s3c2410_udc_vbus_session,
1543 .vbus_draw = s3c2410_vbus_draw,
1544 };
1545
1546 /*------------------------- gadget driver handling---------------------------*/
1547 /*
1548 * s3c2410_udc_disable
1549 */
1550 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1551 {
1552 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1553
1554 /* Disable all interrupts */
1555 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1556 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1557
1558 /* Clear the interrupt registers */
1559 udc_write(S3C2410_UDC_USBINT_RESET
1560 | S3C2410_UDC_USBINT_RESUME
1561 | S3C2410_UDC_USBINT_SUSPEND,
1562 S3C2410_UDC_USB_INT_REG);
1563
1564 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1565
1566 /* Good bye, cruel world */
1567 if (udc_info && udc_info->udc_command)
1568 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1569
1570 /* Set speed to unknown */
1571 dev->gadget.speed = USB_SPEED_UNKNOWN;
1572 }
1573
1574 /*
1575 * s3c2410_udc_reinit
1576 */
1577 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1578 {
1579 u32 i;
1580
1581 /* device/ep0 records init */
1582 INIT_LIST_HEAD (&dev->gadget.ep_list);
1583 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1584 dev->ep0state = EP0_IDLE;
1585
1586 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1587 struct s3c2410_ep *ep = &dev->ep[i];
1588
1589 if (i != 0)
1590 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1591
1592 ep->dev = dev;
1593 ep->desc = NULL;
1594 ep->halted = 0;
1595 INIT_LIST_HEAD (&ep->queue);
1596 }
1597 }
1598
1599 /*
1600 * s3c2410_udc_enable
1601 */
1602 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1603 {
1604 int i;
1605
1606 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1607
1608 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1609 dev->gadget.speed = USB_SPEED_FULL;
1610
1611 /* Set MAXP for all endpoints */
1612 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1613 udc_write(i, S3C2410_UDC_INDEX_REG);
1614 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1615 S3C2410_UDC_MAXP_REG);
1616 }
1617
1618 /* Set default power state */
1619 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1620
1621 /* Enable reset and suspend interrupt interrupts */
1622 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1623 S3C2410_UDC_USB_INT_EN_REG);
1624
1625 /* Enable ep0 interrupt */
1626 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1627
1628 /* time to say "hello, world" */
1629 if (udc_info && udc_info->udc_command)
1630 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1631 }
1632
1633 /*
1634 * usb_gadget_register_driver
1635 */
1636 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1637 {
1638 struct s3c2410_udc *udc = the_controller;
1639 int retval;
1640
1641 dprintk(DEBUG_NORMAL, "usb_gadget_register_driver() '%s'\n",
1642 driver->driver.name);
1643
1644 /* Sanity checks */
1645 if (!udc)
1646 return -ENODEV;
1647
1648 if (udc->driver)
1649 return -EBUSY;
1650
1651 if (!driver->bind || !driver->setup
1652 || driver->speed != USB_SPEED_FULL) {
1653 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1654 driver->bind, driver->setup, driver->speed);
1655 return -EINVAL;
1656 }
1657 #if defined(MODULE)
1658 if (!driver->unbind) {
1659 printk(KERN_ERR "Invalid driver: no unbind method\n");
1660 return -EINVAL;
1661 }
1662 #endif
1663
1664 /* Hook the driver */
1665 udc->driver = driver;
1666 udc->gadget.dev.driver = &driver->driver;
1667
1668 /* Bind the driver */
1669 if ((retval = device_add(&udc->gadget.dev)) != 0) {
1670 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1671 goto register_error;
1672 }
1673
1674 dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1675 driver->driver.name);
1676
1677 if ((retval = driver->bind (&udc->gadget)) != 0) {
1678 device_del(&udc->gadget.dev);
1679 goto register_error;
1680 }
1681
1682 /* Enable udc */
1683 s3c2410_udc_enable(udc);
1684
1685 return 0;
1686
1687 register_error:
1688 udc->driver = NULL;
1689 udc->gadget.dev.driver = NULL;
1690 return retval;
1691 }
1692
1693 /*
1694 * usb_gadget_unregister_driver
1695 */
1696 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1697 {
1698 struct s3c2410_udc *udc = the_controller;
1699
1700 if (!udc)
1701 return -ENODEV;
1702
1703 if (!driver || driver != udc->driver || !driver->unbind)
1704 return -EINVAL;
1705
1706 dprintk(DEBUG_NORMAL,"usb_gadget_register_driver() '%s'\n",
1707 driver->driver.name);
1708
1709 if (driver->disconnect)
1710 driver->disconnect(&udc->gadget);
1711
1712 device_del(&udc->gadget.dev);
1713 udc->driver = NULL;
1714
1715 /* Disable udc */
1716 s3c2410_udc_disable(udc);
1717
1718 return 0;
1719 }
1720
1721 /*---------------------------------------------------------------------------*/
1722 static struct s3c2410_udc memory = {
1723 .gadget = {
1724 .ops = &s3c2410_ops,
1725 .ep0 = &memory.ep[0].ep,
1726 .name = gadget_name,
1727 .dev = {
1728 .bus_id = "gadget",
1729 },
1730 },
1731
1732 /* control endpoint */
1733 .ep[0] = {
1734 .num = 0,
1735 .ep = {
1736 .name = ep0name,
1737 .ops = &s3c2410_ep_ops,
1738 .maxpacket = EP0_FIFO_SIZE,
1739 },
1740 .dev = &memory,
1741 },
1742
1743 /* first group of endpoints */
1744 .ep[1] = {
1745 .num = 1,
1746 .ep = {
1747 .name = "ep1-bulk",
1748 .ops = &s3c2410_ep_ops,
1749 .maxpacket = EP_FIFO_SIZE,
1750 },
1751 .dev = &memory,
1752 .fifo_size = EP_FIFO_SIZE,
1753 .bEndpointAddress = 1,
1754 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1755 },
1756 .ep[2] = {
1757 .num = 2,
1758 .ep = {
1759 .name = "ep2-bulk",
1760 .ops = &s3c2410_ep_ops,
1761 .maxpacket = EP_FIFO_SIZE,
1762 },
1763 .dev = &memory,
1764 .fifo_size = EP_FIFO_SIZE,
1765 .bEndpointAddress = 2,
1766 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1767 },
1768 .ep[3] = {
1769 .num = 3,
1770 .ep = {
1771 .name = "ep3-bulk",
1772 .ops = &s3c2410_ep_ops,
1773 .maxpacket = EP_FIFO_SIZE,
1774 },
1775 .dev = &memory,
1776 .fifo_size = EP_FIFO_SIZE,
1777 .bEndpointAddress = 3,
1778 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1779 },
1780 .ep[4] = {
1781 .num = 4,
1782 .ep = {
1783 .name = "ep4-bulk",
1784 .ops = &s3c2410_ep_ops,
1785 .maxpacket = EP_FIFO_SIZE,
1786 },
1787 .dev = &memory,
1788 .fifo_size = EP_FIFO_SIZE,
1789 .bEndpointAddress = 4,
1790 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1791 }
1792
1793 };
1794
1795 /*
1796 * probe - binds to the platform device
1797 */
1798 static int s3c2410_udc_probe(struct platform_device *pdev)
1799 {
1800 struct s3c2410_udc *udc = &memory;
1801 struct device *dev = &pdev->dev;
1802 int retval;
1803 unsigned int irq;
1804
1805 dev_dbg(dev, "%s()\n", __func__);
1806
1807 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1808 if (IS_ERR(usb_bus_clock)) {
1809 dev_err(dev, "failed to get usb bus clock source\n");
1810 return PTR_ERR(usb_bus_clock);
1811 }
1812
1813 clk_enable(usb_bus_clock);
1814
1815 udc_clock = clk_get(NULL, "usb-device");
1816 if (IS_ERR(udc_clock)) {
1817 dev_err(dev, "failed to get udc clock source\n");
1818 return PTR_ERR(udc_clock);
1819 }
1820
1821 clk_enable(udc_clock);
1822
1823 mdelay(10);
1824
1825 dev_dbg(dev, "got and enabled clocks\n");
1826
1827 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1828 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1829 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1830 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1831 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1832 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1833 }
1834
1835 spin_lock_init (&udc->lock);
1836 udc_info = pdev->dev.platform_data;
1837
1838 rsrc_start = S3C2410_PA_USBDEV;
1839 rsrc_len = S3C24XX_SZ_USBDEV;
1840
1841 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1842 return -EBUSY;
1843
1844 base_addr = ioremap(rsrc_start, rsrc_len);
1845 if (!base_addr) {
1846 retval = -ENOMEM;
1847 goto err_mem;
1848 }
1849
1850 device_initialize(&udc->gadget.dev);
1851 udc->gadget.dev.parent = &pdev->dev;
1852 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1853
1854 the_controller = udc;
1855 platform_set_drvdata(pdev, udc);
1856
1857 s3c2410_udc_disable(udc);
1858 s3c2410_udc_reinit(udc);
1859
1860 /* irq setup after old hardware state is cleaned up */
1861 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1862 IRQF_DISABLED, gadget_name, udc);
1863
1864 if (retval != 0) {
1865 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1866 retval = -EBUSY;
1867 goto err_map;
1868 }
1869
1870 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1871
1872 if (udc_info && udc_info->vbus_pin > 0) {
1873 irq = s3c2410_gpio_getirq(udc_info->vbus_pin);
1874 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1875 IRQF_DISABLED | IRQF_TRIGGER_RISING
1876 | IRQF_TRIGGER_FALLING,
1877 gadget_name, udc);
1878
1879 if (retval != 0) {
1880 dev_err(dev, "can't get vbus irq %i, err %d\n",
1881 irq, retval);
1882 retval = -EBUSY;
1883 goto err_int;
1884 }
1885
1886 dev_dbg(dev, "got irq %i\n", irq);
1887 } else {
1888 udc->vbus = 1;
1889 }
1890
1891 if (s3c2410_udc_debugfs_root) {
1892 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1893 s3c2410_udc_debugfs_root,
1894 udc, &s3c2410_udc_debugfs_fops);
1895 if (IS_ERR(udc->regs_info)) {
1896 dev_warn(dev, "debugfs file creation failed %ld\n",
1897 PTR_ERR(udc->regs_info));
1898 udc->regs_info = NULL;
1899 }
1900 }
1901
1902 dev_dbg(dev, "probe ok\n");
1903
1904 return 0;
1905
1906 err_int:
1907 free_irq(IRQ_USBD, udc);
1908 err_map:
1909 iounmap(base_addr);
1910 err_mem:
1911 release_mem_region(rsrc_start, rsrc_len);
1912
1913 return retval;
1914 }
1915
1916 /*
1917 * s3c2410_udc_remove
1918 */
1919 static int s3c2410_udc_remove(struct platform_device *pdev)
1920 {
1921 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1922 unsigned int irq;
1923
1924 dev_dbg(&pdev->dev, "%s()\n", __func__);
1925 if (udc->driver)
1926 return -EBUSY;
1927
1928 debugfs_remove(udc->regs_info);
1929
1930 if (udc_info && udc_info->vbus_pin > 0) {
1931 irq = s3c2410_gpio_getirq(udc_info->vbus_pin);
1932 free_irq(irq, udc);
1933 }
1934
1935 free_irq(IRQ_USBD, udc);
1936
1937 iounmap(base_addr);
1938 release_mem_region(rsrc_start, rsrc_len);
1939
1940 platform_set_drvdata(pdev, NULL);
1941
1942 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1943 clk_disable(udc_clock);
1944 clk_put(udc_clock);
1945 udc_clock = NULL;
1946 }
1947
1948 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1949 clk_disable(usb_bus_clock);
1950 clk_put(usb_bus_clock);
1951 usb_bus_clock = NULL;
1952 }
1953
1954 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1955 return 0;
1956 }
1957
1958 #ifdef CONFIG_PM
1959 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1960 {
1961 if (udc_info && udc_info->udc_command)
1962 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1963
1964 return 0;
1965 }
1966
1967 static int s3c2410_udc_resume(struct platform_device *pdev)
1968 {
1969 if (udc_info && udc_info->udc_command)
1970 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1971
1972 return 0;
1973 }
1974 #else
1975 #define s3c2410_udc_suspend NULL
1976 #define s3c2410_udc_resume NULL
1977 #endif
1978
1979 static struct platform_driver udc_driver_2410 = {
1980 .driver = {
1981 .name = "s3c2410-usbgadget",
1982 .owner = THIS_MODULE,
1983 },
1984 .probe = s3c2410_udc_probe,
1985 .remove = s3c2410_udc_remove,
1986 .suspend = s3c2410_udc_suspend,
1987 .resume = s3c2410_udc_resume,
1988 };
1989
1990 static struct platform_driver udc_driver_2440 = {
1991 .driver = {
1992 .name = "s3c2440-usbgadget",
1993 .owner = THIS_MODULE,
1994 },
1995 .probe = s3c2410_udc_probe,
1996 .remove = s3c2410_udc_remove,
1997 .suspend = s3c2410_udc_suspend,
1998 .resume = s3c2410_udc_resume,
1999 };
2000
2001 static int __init udc_init(void)
2002 {
2003 int retval;
2004
2005 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2006
2007 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2008 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2009 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2010 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2011 s3c2410_udc_debugfs_root = NULL;
2012 }
2013
2014 retval = platform_driver_register(&udc_driver_2410);
2015 if (retval)
2016 goto err;
2017
2018 retval = platform_driver_register(&udc_driver_2440);
2019 if (retval)
2020 goto err;
2021
2022 return 0;
2023
2024 err:
2025 debugfs_remove(s3c2410_udc_debugfs_root);
2026 return retval;
2027 }
2028
2029 static void __exit udc_exit(void)
2030 {
2031 platform_driver_unregister(&udc_driver_2410);
2032 platform_driver_unregister(&udc_driver_2440);
2033 debugfs_remove(s3c2410_udc_debugfs_root);
2034 }
2035
2036 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2037 EXPORT_SYMBOL(usb_gadget_register_driver);
2038
2039 module_init(udc_init);
2040 module_exit(udc_exit);
2041
2042 MODULE_AUTHOR(DRIVER_AUTHOR);
2043 MODULE_DESCRIPTION(DRIVER_DESC);
2044 MODULE_VERSION(DRIVER_VERSION);
2045 MODULE_LICENSE("GPL");
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