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update checkpatch.pl to version 0.05
[pv_ops_mirror.git] / drivers / s390 / cio / qdio.c
blobe70aeb7a378109ef1fa1f6a31d72ae6fe7009828
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51
52 #include "cio.h"
53 #include "css.h"
54 #include "device.h"
55 #include "airq.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84
85 static debug_info_t *qdio_dbf_setup;
86 static debug_info_t *qdio_dbf_sbal;
87 static debug_info_t *qdio_dbf_trace;
88 static debug_info_t *qdio_dbf_sense;
89 #ifdef CONFIG_QDIO_DEBUG
90 static debug_info_t *qdio_dbf_slsb_out;
91 static debug_info_t *qdio_dbf_slsb_in;
92 #endif /* CONFIG_QDIO_DEBUG */
93
94 /* iQDIO stuff: */
95 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
96 during a while loop */
97 static DEFINE_SPINLOCK(ttiq_list_lock);
98 static int register_thinint_result;
99 static void tiqdio_tl(unsigned long);
100 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
101
102 /* not a macro, as one of the arguments is atomic_read */
103 static inline int
104 qdio_min(int a,int b)
105 {
106 if (a<b)
107 return a;
108 else
109 return b;
110 }
111
112 /***************** SCRUBBER HELPER ROUTINES **********************/
113 #ifdef CONFIG_64BIT
114 static inline void qdio_perf_stat_inc(atomic64_t *count)
115 {
116 if (qdio_performance_stats)
117 atomic64_inc(count);
118 }
119
120 static inline void qdio_perf_stat_dec(atomic64_t *count)
121 {
122 if (qdio_performance_stats)
123 atomic64_dec(count);
124 }
125 #else /* CONFIG_64BIT */
126 static inline void qdio_perf_stat_inc(atomic_t *count)
127 {
128 if (qdio_performance_stats)
129 atomic_inc(count);
130 }
131
132 static inline void qdio_perf_stat_dec(atomic_t *count)
133 {
134 if (qdio_performance_stats)
135 atomic_dec(count);
136 }
137 #endif /* CONFIG_64BIT */
138
139 static inline __u64
140 qdio_get_micros(void)
141 {
142 return (get_clock() >> 12); /* time>>12 is microseconds */
143 }
144
145 /*
146 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
147 * the q in any case, so that we'll not be interrupted when we are in
148 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
149 * ever works (last famous words)
150 */
151 static inline int
152 qdio_reserve_q(struct qdio_q *q)
153 {
154 return atomic_add_return(1,&q->use_count) - 1;
155 }
156
157 static inline void
158 qdio_release_q(struct qdio_q *q)
159 {
160 atomic_dec(&q->use_count);
161 }
162
163 /*check ccq */
164 static int
165 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
166 {
167 char dbf_text[15];
168
169 if (ccq == 0 || ccq == 32 || ccq == 96)
170 return 0;
171 if (ccq == 97)
172 return 1;
173 /*notify devices immediately*/
174 sprintf(dbf_text,"%d", ccq);
175 QDIO_DBF_TEXT2(1,trace,dbf_text);
176 return -EIO;
177 }
178 /* EQBS: extract buffer states */
179 static int
180 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
181 unsigned int *start, unsigned int *cnt)
182 {
183 struct qdio_irq *irq;
184 unsigned int tmp_cnt, q_no, ccq;
185 int rc ;
186 char dbf_text[15];
187
188 ccq = 0;
189 tmp_cnt = *cnt;
190 irq = (struct qdio_irq*)q->irq_ptr;
191 q_no = q->q_no;
192 if(!q->is_input_q)
193 q_no += irq->no_input_qs;
194 again:
195 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
196 rc = qdio_check_ccq(q, ccq);
197 if (rc == 1) {
198 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
199 goto again;
200 }
201 if (rc < 0) {
202 QDIO_DBF_TEXT2(1,trace,"eqberr");
203 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
204 QDIO_DBF_TEXT2(1,trace,dbf_text);
205 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
206 QDIO_STATUS_LOOK_FOR_ERROR,
207 0, 0, 0, -1, -1, q->int_parm);
208 return 0;
209 }
210 return (tmp_cnt - *cnt);
211 }
212
213 /* SQBS: set buffer states */
214 static int
215 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
216 unsigned int *start, unsigned int *cnt)
217 {
218 struct qdio_irq *irq;
219 unsigned int tmp_cnt, q_no, ccq;
220 int rc;
221 char dbf_text[15];
222
223 ccq = 0;
224 tmp_cnt = *cnt;
225 irq = (struct qdio_irq*)q->irq_ptr;
226 q_no = q->q_no;
227 if(!q->is_input_q)
228 q_no += irq->no_input_qs;
229 again:
230 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
231 rc = qdio_check_ccq(q, ccq);
232 if (rc == 1) {
233 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
234 goto again;
235 }
236 if (rc < 0) {
237 QDIO_DBF_TEXT3(1,trace,"sqberr");
238 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
239 QDIO_DBF_TEXT3(1,trace,dbf_text);
240 sprintf(dbf_text,"%d,%d",ccq,q_no);
241 QDIO_DBF_TEXT3(1,trace,dbf_text);
242 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
243 QDIO_STATUS_LOOK_FOR_ERROR,
244 0, 0, 0, -1, -1, q->int_parm);
245 return 0;
246 }
247 return (tmp_cnt - *cnt);
248 }
249
250 static inline int
251 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
252 unsigned char state, unsigned int *count)
253 {
254 volatile char *slsb;
255 struct qdio_irq *irq;
256
257 irq = (struct qdio_irq*)q->irq_ptr;
258 if (!irq->is_qebsm) {
259 slsb = (char *)&q->slsb.acc.val[(*bufno)];
260 xchg(slsb, state);
261 return 1;
262 }
263 return qdio_do_sqbs(q, state, bufno, count);
264 }
265
266 #ifdef CONFIG_QDIO_DEBUG
267 static inline void
268 qdio_trace_slsb(struct qdio_q *q)
269 {
270 if (q->queue_type==QDIO_TRACE_QTYPE) {
271 if (q->is_input_q)
272 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
273 QDIO_MAX_BUFFERS_PER_Q);
274 else
275 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 }
278 }
279 #endif
280
281 static inline int
282 set_slsb(struct qdio_q *q, unsigned int *bufno,
283 unsigned char state, unsigned int *count)
284 {
285 int rc;
286 #ifdef CONFIG_QDIO_DEBUG
287 qdio_trace_slsb(q);
288 #endif
289 rc = qdio_set_slsb(q, bufno, state, count);
290 #ifdef CONFIG_QDIO_DEBUG
291 qdio_trace_slsb(q);
292 #endif
293 return rc;
294 }
295 static inline int
296 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
297 unsigned int gpr3)
298 {
299 int cc;
300
301 QDIO_DBF_TEXT4(0,trace,"sigasync");
302 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
303
304 qdio_perf_stat_inc(&perf_stats.siga_syncs);
305
306 cc = do_siga_sync(q->schid, gpr2, gpr3);
307 if (cc)
308 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
309
310 return cc;
311 }
312
313 static inline int
314 qdio_siga_sync_q(struct qdio_q *q)
315 {
316 if (q->is_input_q)
317 return qdio_siga_sync(q, 0, q->mask);
318 return qdio_siga_sync(q, q->mask, 0);
319 }
320
321 static int
322 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
323 {
324 struct qdio_irq *irq;
325 unsigned int fc = 0;
326 unsigned long schid;
327
328 irq = (struct qdio_irq *) q->irq_ptr;
329 if (!irq->is_qebsm)
330 schid = *((u32 *)&q->schid);
331 else {
332 schid = irq->sch_token;
333 fc |= 0x80;
334 }
335 return do_siga_output(schid, q->mask, busy_bit, fc);
336 }
337
338 /*
339 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
340 * an access exception
341 */
342 static int
343 qdio_siga_output(struct qdio_q *q)
344 {
345 int cc;
346 __u32 busy_bit;
347 __u64 start_time=0;
348
349 qdio_perf_stat_inc(&perf_stats.siga_outs);
350
351 QDIO_DBF_TEXT4(0,trace,"sigaout");
352 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
353
354 for (;;) {
355 cc = __do_siga_output(q, &busy_bit);
356 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
357 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
358 if (!start_time)
359 start_time=NOW;
360 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
361 break;
362 } else
363 break;
364 }
365
366 if ((cc==2) && (busy_bit))
367 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
368
369 if (cc)
370 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
371
372 return cc;
373 }
374
375 static int
376 qdio_siga_input(struct qdio_q *q)
377 {
378 int cc;
379
380 QDIO_DBF_TEXT4(0,trace,"sigain");
381 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
382
383 qdio_perf_stat_inc(&perf_stats.siga_ins);
384
385 cc = do_siga_input(q->schid, q->mask);
386
387 if (cc)
388 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
389
390 return cc;
391 }
392
393 /* locked by the locks in qdio_activate and qdio_cleanup */
394 static __u32 *
395 qdio_get_indicator(void)
396 {
397 int i;
398
399 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
400 if (!indicator_used[i]) {
401 indicator_used[i]=1;
402 return indicators+i;
403 }
404 atomic_inc(&spare_indicator_usecount);
405 return (__u32 * volatile) &spare_indicator;
406 }
407
408 /* locked by the locks in qdio_activate and qdio_cleanup */
409 static void
410 qdio_put_indicator(__u32 *addr)
411 {
412 int i;
413
414 if ( (addr) && (addr!=&spare_indicator) ) {
415 i=addr-indicators;
416 indicator_used[i]=0;
417 }
418 if (addr == &spare_indicator)
419 atomic_dec(&spare_indicator_usecount);
420 }
421
422 static inline void
423 tiqdio_clear_summary_bit(__u32 *location)
424 {
425 QDIO_DBF_TEXT5(0,trace,"clrsummb");
426 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
427
428 xchg(location,0);
429 }
430
431 static inline void
432 tiqdio_set_summary_bit(__u32 *location)
433 {
434 QDIO_DBF_TEXT5(0,trace,"setsummb");
435 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
436
437 xchg(location,-1);
438 }
439
440 static inline void
441 tiqdio_sched_tl(void)
442 {
443 tasklet_hi_schedule(&tiqdio_tasklet);
444 }
445
446 static void
447 qdio_mark_tiq(struct qdio_q *q)
448 {
449 unsigned long flags;
450
451 QDIO_DBF_TEXT4(0,trace,"mark iq");
452 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
453
454 spin_lock_irqsave(&ttiq_list_lock,flags);
455 if (unlikely(atomic_read(&q->is_in_shutdown)))
456 goto out_unlock;
457
458 if (!q->is_input_q)
459 goto out_unlock;
460
461 if ((q->list_prev) || (q->list_next))
462 goto out_unlock;
463
464 if (!tiq_list) {
465 tiq_list=q;
466 q->list_prev=q;
467 q->list_next=q;
468 } else {
469 q->list_next=tiq_list;
470 q->list_prev=tiq_list->list_prev;
471 tiq_list->list_prev->list_next=q;
472 tiq_list->list_prev=q;
473 }
474 spin_unlock_irqrestore(&ttiq_list_lock,flags);
475
476 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
477 tiqdio_sched_tl();
478 return;
479 out_unlock:
480 spin_unlock_irqrestore(&ttiq_list_lock,flags);
481 return;
482 }
483
484 static inline void
485 qdio_mark_q(struct qdio_q *q)
486 {
487 QDIO_DBF_TEXT4(0,trace,"mark q");
488 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
489
490 if (unlikely(atomic_read(&q->is_in_shutdown)))
491 return;
492
493 tasklet_schedule(&q->tasklet);
494 }
495
496 static int
497 qdio_stop_polling(struct qdio_q *q)
498 {
499 #ifdef QDIO_USE_PROCESSING_STATE
500 unsigned int tmp, gsf, count = 1;
501 unsigned char state = 0;
502 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
503
504 if (!atomic_xchg(&q->polling,0))
505 return 1;
506
507 QDIO_DBF_TEXT4(0,trace,"stoppoll");
508 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
509
510 /* show the card that we are not polling anymore */
511 if (!q->is_input_q)
512 return 1;
513
514 tmp = gsf = GET_SAVED_FRONTIER(q);
515 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
516 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
517
518 /*
519 * we don't issue this SYNC_MEMORY, as we trust Rick T and
520 * moreover will not use the PROCESSING state under VM, so
521 * q->polling was 0 anyway
522 */
523 /*SYNC_MEMORY;*/
524 if (irq->is_qebsm) {
525 count = 1;
526 qdio_do_eqbs(q, &state, &gsf, &count);
527 } else
528 state = q->slsb.acc.val[gsf];
529 if (state != SLSB_P_INPUT_PRIMED)
530 return 1;
531 /*
532 * set our summary bit again, as otherwise there is a
533 * small window we can miss between resetting it and
534 * checking for PRIMED state
535 */
536 if (q->is_thinint_q)
537 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
538 return 0;
539
540 #else /* QDIO_USE_PROCESSING_STATE */
541 return 1;
542 #endif /* QDIO_USE_PROCESSING_STATE */
543 }
544
545 /*
546 * see the comment in do_QDIO and before qdio_reserve_q about the
547 * sophisticated locking outside of unmark_q, so that we don't need to
548 * disable the interrupts :-)
549 */
550 static void
551 qdio_unmark_q(struct qdio_q *q)
552 {
553 unsigned long flags;
554
555 QDIO_DBF_TEXT4(0,trace,"unmark q");
556 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
557
558 if ((!q->list_prev)||(!q->list_next))
559 return;
560
561 if ((q->is_thinint_q)&&(q->is_input_q)) {
562 /* iQDIO */
563 spin_lock_irqsave(&ttiq_list_lock,flags);
564 /* in case cleanup has done this already and simultanously
565 * qdio_unmark_q is called from the interrupt handler, we've
566 * got to check this in this specific case again */
567 if ((!q->list_prev)||(!q->list_next))
568 goto out;
569 if (q->list_next==q) {
570 /* q was the only interesting q */
571 tiq_list=NULL;
572 q->list_next=NULL;
573 q->list_prev=NULL;
574 } else {
575 q->list_next->list_prev=q->list_prev;
576 q->list_prev->list_next=q->list_next;
577 tiq_list=q->list_next;
578 q->list_next=NULL;
579 q->list_prev=NULL;
580 }
581 out:
582 spin_unlock_irqrestore(&ttiq_list_lock,flags);
583 }
584 }
585
586 static inline unsigned long
587 tiqdio_clear_global_summary(void)
588 {
589 unsigned long time;
590
591 QDIO_DBF_TEXT5(0,trace,"clrglobl");
592
593 time = do_clear_global_summary();
594
595 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
596
597 return time;
598 }
599
600
601 /************************* OUTBOUND ROUTINES *******************************/
602 static int
603 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
604 {
605 struct qdio_irq *irq;
606 unsigned char state;
607 unsigned int cnt, count, ftc;
608
609 irq = (struct qdio_irq *) q->irq_ptr;
610 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
611 SYNC_MEMORY;
612
613 ftc = q->first_to_check;
614 count = qdio_min(atomic_read(&q->number_of_buffers_used),
615 (QDIO_MAX_BUFFERS_PER_Q-1));
616 if (count == 0)
617 return q->first_to_check;
618 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
619 if (cnt == 0)
620 return q->first_to_check;
621 switch (state) {
622 case SLSB_P_OUTPUT_ERROR:
623 QDIO_DBF_TEXT3(0,trace,"outperr");
624 atomic_sub(cnt , &q->number_of_buffers_used);
625 if (q->qdio_error)
626 q->error_status_flags |=
627 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
628 q->qdio_error = SLSB_P_OUTPUT_ERROR;
629 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
630 q->first_to_check = ftc;
631 break;
632 case SLSB_P_OUTPUT_EMPTY:
633 QDIO_DBF_TEXT5(0,trace,"outpempt");
634 atomic_sub(cnt, &q->number_of_buffers_used);
635 q->first_to_check = ftc;
636 break;
637 case SLSB_CU_OUTPUT_PRIMED:
638 /* all buffers primed */
639 QDIO_DBF_TEXT5(0,trace,"outpprim");
640 break;
641 default:
642 break;
643 }
644 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
645 return q->first_to_check;
646 }
647
648 static int
649 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
650 {
651 struct qdio_irq *irq;
652 unsigned char state;
653 int tmp, ftc, count, cnt;
654 char dbf_text[15];
655
656
657 irq = (struct qdio_irq *) q->irq_ptr;
658 ftc = q->first_to_check;
659 count = qdio_min(atomic_read(&q->number_of_buffers_used),
660 (QDIO_MAX_BUFFERS_PER_Q-1));
661 if (count == 0)
662 return q->first_to_check;
663 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
664 if (cnt == 0)
665 return q->first_to_check;
666 switch (state) {
667 case SLSB_P_INPUT_ERROR :
668 #ifdef CONFIG_QDIO_DEBUG
669 QDIO_DBF_TEXT3(1,trace,"inperr");
670 sprintf(dbf_text,"%2x,%2x",ftc,count);
671 QDIO_DBF_TEXT3(1,trace,dbf_text);
672 #endif /* CONFIG_QDIO_DEBUG */
673 if (q->qdio_error)
674 q->error_status_flags |=
675 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
676 q->qdio_error = SLSB_P_INPUT_ERROR;
677 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
678 atomic_sub(cnt, &q->number_of_buffers_used);
679 q->first_to_check = ftc;
680 break;
681 case SLSB_P_INPUT_PRIMED :
682 QDIO_DBF_TEXT3(0,trace,"inptprim");
683 sprintf(dbf_text,"%2x,%2x",ftc,count);
684 QDIO_DBF_TEXT3(1,trace,dbf_text);
685 tmp = 0;
686 ftc = q->first_to_check;
687 #ifdef QDIO_USE_PROCESSING_STATE
688 if (cnt > 1) {
689 cnt -= 1;
690 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
691 if (!tmp)
692 break;
693 }
694 cnt = 1;
695 tmp += set_slsb(q, &ftc,
696 SLSB_P_INPUT_PROCESSING, &cnt);
697 atomic_set(&q->polling, 1);
698 #else
699 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
700 #endif
701 atomic_sub(tmp, &q->number_of_buffers_used);
702 q->first_to_check = ftc;
703 break;
704 case SLSB_CU_INPUT_EMPTY:
705 case SLSB_P_INPUT_NOT_INIT:
706 case SLSB_P_INPUT_PROCESSING:
707 QDIO_DBF_TEXT5(0,trace,"inpnipro");
708 break;
709 default:
710 break;
711 }
712 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
713 return q->first_to_check;
714 }
715
716 static int
717 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
718 {
719 struct qdio_irq *irq;
720 volatile char *slsb;
721 unsigned int count = 1;
722 int first_not_to_check, f, f_mod_no;
723 char dbf_text[15];
724
725 QDIO_DBF_TEXT4(0,trace,"getobfro");
726 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
727
728 irq = (struct qdio_irq *) q->irq_ptr;
729 if (irq->is_qebsm)
730 return qdio_qebsm_get_outbound_buffer_frontier(q);
731
732 slsb=&q->slsb.acc.val[0];
733 f_mod_no=f=q->first_to_check;
734 /*
735 * f points to already processed elements, so f+no_used is correct...
736 * ... but: we don't check 128 buffers, as otherwise
737 * qdio_has_outbound_q_moved would return 0
738 */
739 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
740 (QDIO_MAX_BUFFERS_PER_Q-1));
741
742 if ((!q->is_iqdio_q)&&(!q->hydra_gives_outbound_pcis))
743 SYNC_MEMORY;
744
745 check_next:
746 if (f==first_not_to_check)
747 goto out;
748
749 switch(slsb[f_mod_no]) {
750
751 /* the adapter has not fetched the output yet */
752 case SLSB_CU_OUTPUT_PRIMED:
753 QDIO_DBF_TEXT5(0,trace,"outpprim");
754 break;
755
756 /* the adapter got it */
757 case SLSB_P_OUTPUT_EMPTY:
758 atomic_dec(&q->number_of_buffers_used);
759 f++;
760 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
761 QDIO_DBF_TEXT5(0,trace,"outpempt");
762 goto check_next;
763
764 case SLSB_P_OUTPUT_ERROR:
765 QDIO_DBF_TEXT3(0,trace,"outperr");
766 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
767 q->sbal[f_mod_no]->element[14].sbalf.value,
768 q->sbal[f_mod_no]->element[15].sbalf.value);
769 QDIO_DBF_TEXT3(1,trace,dbf_text);
770 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
771
772 /* kind of process the buffer */
773 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
774
775 /*
776 * we increment the frontier, as this buffer
777 * was processed obviously
778 */
779 atomic_dec(&q->number_of_buffers_used);
780 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
781
782 if (q->qdio_error)
783 q->error_status_flags|=
784 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
785 q->qdio_error=SLSB_P_OUTPUT_ERROR;
786 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
787
788 break;
789
790 /* no new buffers */
791 default:
792 QDIO_DBF_TEXT5(0,trace,"outpni");
793 }
794 out:
795 return (q->first_to_check=f_mod_no);
796 }
797
798 /* all buffers are processed */
799 static int
800 qdio_is_outbound_q_done(struct qdio_q *q)
801 {
802 int no_used;
803 #ifdef CONFIG_QDIO_DEBUG
804 char dbf_text[15];
805 #endif
806
807 no_used=atomic_read(&q->number_of_buffers_used);
808
809 #ifdef CONFIG_QDIO_DEBUG
810 if (no_used) {
811 sprintf(dbf_text,"oqisnt%02x",no_used);
812 QDIO_DBF_TEXT4(0,trace,dbf_text);
813 } else {
814 QDIO_DBF_TEXT4(0,trace,"oqisdone");
815 }
816 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
817 #endif /* CONFIG_QDIO_DEBUG */
818 return (no_used==0);
819 }
820
821 static int
822 qdio_has_outbound_q_moved(struct qdio_q *q)
823 {
824 int i;
825
826 i=qdio_get_outbound_buffer_frontier(q);
827
828 if ( (i!=GET_SAVED_FRONTIER(q)) ||
829 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
830 SAVE_FRONTIER(q,i);
831 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
832 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
833 return 1;
834 } else {
835 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 0;
838 }
839 }
840
841 static void
842 qdio_kick_outbound_q(struct qdio_q *q)
843 {
844 int result;
845 #ifdef CONFIG_QDIO_DEBUG
846 char dbf_text[15];
847
848 QDIO_DBF_TEXT4(0,trace,"kickoutq");
849 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
850 #endif /* CONFIG_QDIO_DEBUG */
851
852 if (!q->siga_out)
853 return;
854
855 /* here's the story with cc=2 and busy bit set (thanks, Rick):
856 * VM's CP could present us cc=2 and busy bit set on SIGA-write
857 * during reconfiguration of their Guest LAN (only in HIPERS mode,
858 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
859 * the queues down immediately; and not being under VM we have a
860 * problem on cc=2 and busy bit set right away).
861 *
862 * Therefore qdio_siga_output will try for a short time constantly,
863 * if such a condition occurs. If it doesn't change, it will
864 * increase the busy_siga_counter and save the timestamp, and
865 * schedule the queue for later processing (via mark_q, using the
866 * queue tasklet). __qdio_outbound_processing will check out the
867 * counter. If non-zero, it will call qdio_kick_outbound_q as often
868 * as the value of the counter. This will attempt further SIGA
869 * instructions. For each successful SIGA, the counter is
870 * decreased, for failing SIGAs the counter remains the same, after
871 * all.
872 * After some time of no movement, qdio_kick_outbound_q will
873 * finally fail and reflect corresponding error codes to call
874 * the upper layer module and have it take the queues down.
875 *
876 * Note that this is a change from the original HiperSockets design
877 * (saying cc=2 and busy bit means take the queues down), but in
878 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
879 * conditions will still take the queues down, but the threshold is
880 * higher due to the Guest LAN environment.
881 */
882
883
884 result=qdio_siga_output(q);
885
886 switch (result) {
887 case 0:
888 /* went smooth this time, reset timestamp */
889 #ifdef CONFIG_QDIO_DEBUG
890 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
891 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
892 atomic_read(&q->busy_siga_counter));
893 QDIO_DBF_TEXT3(0,trace,dbf_text);
894 #endif /* CONFIG_QDIO_DEBUG */
895 q->timing.busy_start=0;
896 break;
897 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
898 /* cc=2 and busy bit: */
899 atomic_inc(&q->busy_siga_counter);
900
901 /* if the last siga was successful, save
902 * timestamp here */
903 if (!q->timing.busy_start)
904 q->timing.busy_start=NOW;
905
906 /* if we're in time, don't touch error_status_flags
907 * and siga_error */
908 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
909 qdio_mark_q(q);
910 break;
911 }
912 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
913 #ifdef CONFIG_QDIO_DEBUG
914 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
915 atomic_read(&q->busy_siga_counter));
916 QDIO_DBF_TEXT3(0,trace,dbf_text);
917 #endif /* CONFIG_QDIO_DEBUG */
918 /* else fallthrough and report error */
919 default:
920 /* for plain cc=1, 2 or 3: */
921 if (q->siga_error)
922 q->error_status_flags|=
923 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
924 q->error_status_flags|=
925 QDIO_STATUS_LOOK_FOR_ERROR;
926 q->siga_error=result;
927 }
928 }
929
930 static void
931 qdio_kick_outbound_handler(struct qdio_q *q)
932 {
933 int start, end, real_end, count;
934 #ifdef CONFIG_QDIO_DEBUG
935 char dbf_text[15];
936 #endif
937
938 start = q->first_element_to_kick;
939 /* last_move_ftc was just updated */
940 real_end = GET_SAVED_FRONTIER(q);
941 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
942 (QDIO_MAX_BUFFERS_PER_Q-1);
943 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
944 (QDIO_MAX_BUFFERS_PER_Q-1);
945
946 #ifdef CONFIG_QDIO_DEBUG
947 QDIO_DBF_TEXT4(0,trace,"kickouth");
948 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
949
950 sprintf(dbf_text,"s=%2xc=%2x",start,count);
951 QDIO_DBF_TEXT4(0,trace,dbf_text);
952 #endif /* CONFIG_QDIO_DEBUG */
953
954 if (q->state==QDIO_IRQ_STATE_ACTIVE)
955 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
956 q->error_status_flags,
957 q->qdio_error,q->siga_error,q->q_no,start,count,
958 q->int_parm);
959
960 /* for the next time: */
961 q->first_element_to_kick=real_end;
962 q->qdio_error=0;
963 q->siga_error=0;
964 q->error_status_flags=0;
965 }
966
967 static void
968 __qdio_outbound_processing(struct qdio_q *q)
969 {
970 int siga_attempts;
971
972 QDIO_DBF_TEXT4(0,trace,"qoutproc");
973 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
974
975 if (unlikely(qdio_reserve_q(q))) {
976 qdio_release_q(q);
977 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
978 /* as we're sissies, we'll check next time */
979 if (likely(!atomic_read(&q->is_in_shutdown))) {
980 qdio_mark_q(q);
981 QDIO_DBF_TEXT4(0,trace,"busy,agn");
982 }
983 return;
984 }
985 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
986 qdio_perf_stat_inc(&perf_stats.tl_runs);
987
988 /* see comment in qdio_kick_outbound_q */
989 siga_attempts=atomic_read(&q->busy_siga_counter);
990 while (siga_attempts) {
991 atomic_dec(&q->busy_siga_counter);
992 qdio_kick_outbound_q(q);
993 siga_attempts--;
994 }
995
996 if (qdio_has_outbound_q_moved(q))
997 qdio_kick_outbound_handler(q);
998
999 if (q->queue_type == QDIO_ZFCP_QFMT) {
1000 if ((!q->hydra_gives_outbound_pcis) &&
1001 (!qdio_is_outbound_q_done(q)))
1002 qdio_mark_q(q);
1003 }
1004 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1005 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1006 /*
1007 * make sure buffer switch from PRIMED to EMPTY is noticed
1008 * and outbound_handler is called
1009 */
1010 if (qdio_is_outbound_q_done(q)) {
1011 del_timer(&q->timer);
1012 } else {
1013 if (!timer_pending(&q->timer))
1014 mod_timer(&q->timer, jiffies +
1015 QDIO_FORCE_CHECK_TIMEOUT);
1016 }
1017 }
1018
1019 qdio_release_q(q);
1020 }
1021
1022 static void
1023 qdio_outbound_processing(struct qdio_q *q)
1024 {
1025 __qdio_outbound_processing(q);
1026 }
1027
1028 /************************* INBOUND ROUTINES *******************************/
1029
1030
1031 static int
1032 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1033 {
1034 struct qdio_irq *irq;
1035 int f,f_mod_no;
1036 volatile char *slsb;
1037 unsigned int count = 1;
1038 int first_not_to_check;
1039 #ifdef CONFIG_QDIO_DEBUG
1040 char dbf_text[15];
1041 #endif /* CONFIG_QDIO_DEBUG */
1042 #ifdef QDIO_USE_PROCESSING_STATE
1043 int last_position=-1;
1044 #endif /* QDIO_USE_PROCESSING_STATE */
1045
1046 QDIO_DBF_TEXT4(0,trace,"getibfro");
1047 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1048
1049 irq = (struct qdio_irq *) q->irq_ptr;
1050 if (irq->is_qebsm)
1051 return qdio_qebsm_get_inbound_buffer_frontier(q);
1052
1053 slsb=&q->slsb.acc.val[0];
1054 f_mod_no=f=q->first_to_check;
1055 /*
1056 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1057 * would return 0
1058 */
1059 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1060 (QDIO_MAX_BUFFERS_PER_Q-1));
1061
1062 /*
1063 * we don't use this one, as a PCI or we after a thin interrupt
1064 * will sync the queues
1065 */
1066 /* SYNC_MEMORY;*/
1067
1068 check_next:
1069 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1070 if (f==first_not_to_check)
1071 goto out;
1072 switch (slsb[f_mod_no]) {
1073
1074 /* CU_EMPTY means frontier is reached */
1075 case SLSB_CU_INPUT_EMPTY:
1076 QDIO_DBF_TEXT5(0,trace,"inptempt");
1077 break;
1078
1079 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1080 case SLSB_P_INPUT_PRIMED:
1081 QDIO_DBF_TEXT5(0,trace,"inptprim");
1082
1083 #ifdef QDIO_USE_PROCESSING_STATE
1084 /*
1085 * as soon as running under VM, polling the input queues will
1086 * kill VM in terms of CP overhead
1087 */
1088 if (q->siga_sync) {
1089 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1090 } else {
1091 /* set the previous buffer to NOT_INIT. The current
1092 * buffer will be set to PROCESSING at the end of
1093 * this function to avoid further interrupts. */
1094 if (last_position>=0)
1095 set_slsb(q, &last_position,
1096 SLSB_P_INPUT_NOT_INIT, &count);
1097 atomic_set(&q->polling,1);
1098 last_position=f_mod_no;
1099 }
1100 #else /* QDIO_USE_PROCESSING_STATE */
1101 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1102 #endif /* QDIO_USE_PROCESSING_STATE */
1103 /*
1104 * not needed, as the inbound queue will be synced on the next
1105 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1106 */
1107 /*SYNC_MEMORY;*/
1108 f++;
1109 atomic_dec(&q->number_of_buffers_used);
1110 goto check_next;
1111
1112 case SLSB_P_INPUT_NOT_INIT:
1113 case SLSB_P_INPUT_PROCESSING:
1114 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1115 break;
1116
1117 /* P_ERROR means frontier is reached, break and report error */
1118 case SLSB_P_INPUT_ERROR:
1119 #ifdef CONFIG_QDIO_DEBUG
1120 sprintf(dbf_text,"inperr%2x",f_mod_no);
1121 QDIO_DBF_TEXT3(1,trace,dbf_text);
1122 #endif /* CONFIG_QDIO_DEBUG */
1123 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1124
1125 /* kind of process the buffer */
1126 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1127
1128 if (q->qdio_error)
1129 q->error_status_flags|=
1130 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1131 q->qdio_error=SLSB_P_INPUT_ERROR;
1132 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1133
1134 /* we increment the frontier, as this buffer
1135 * was processed obviously */
1136 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1137 atomic_dec(&q->number_of_buffers_used);
1138
1139 #ifdef QDIO_USE_PROCESSING_STATE
1140 last_position=-1;
1141 #endif /* QDIO_USE_PROCESSING_STATE */
1142
1143 break;
1144
1145 /* everything else means frontier not changed (HALTED or so) */
1146 default:
1147 break;
1148 }
1149 out:
1150 q->first_to_check=f_mod_no;
1151
1152 #ifdef QDIO_USE_PROCESSING_STATE
1153 if (last_position>=0)
1154 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1155 #endif /* QDIO_USE_PROCESSING_STATE */
1156
1157 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1158
1159 return q->first_to_check;
1160 }
1161
1162 static int
1163 qdio_has_inbound_q_moved(struct qdio_q *q)
1164 {
1165 int i;
1166
1167 i=qdio_get_inbound_buffer_frontier(q);
1168 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1169 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1170 SAVE_FRONTIER(q,i);
1171 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1172 SAVE_TIMESTAMP(q);
1173
1174 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1175 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1176 return 1;
1177 } else {
1178 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 0;
1181 }
1182 }
1183
1184 /* means, no more buffers to be filled */
1185 static int
1186 tiqdio_is_inbound_q_done(struct qdio_q *q)
1187 {
1188 int no_used;
1189 unsigned int start_buf, count;
1190 unsigned char state = 0;
1191 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1192
1193 #ifdef CONFIG_QDIO_DEBUG
1194 char dbf_text[15];
1195 #endif
1196
1197 no_used=atomic_read(&q->number_of_buffers_used);
1198
1199 /* propagate the change from 82 to 80 through VM */
1200 SYNC_MEMORY;
1201
1202 #ifdef CONFIG_QDIO_DEBUG
1203 if (no_used) {
1204 sprintf(dbf_text,"iqisnt%02x",no_used);
1205 QDIO_DBF_TEXT4(0,trace,dbf_text);
1206 } else {
1207 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1208 }
1209 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1210 #endif /* CONFIG_QDIO_DEBUG */
1211
1212 if (!no_used)
1213 return 1;
1214 if (!q->siga_sync && !irq->is_qebsm)
1215 /* we'll check for more primed buffers in qeth_stop_polling */
1216 return 0;
1217 if (irq->is_qebsm) {
1218 count = 1;
1219 start_buf = q->first_to_check;
1220 qdio_do_eqbs(q, &state, &start_buf, &count);
1221 } else
1222 state = q->slsb.acc.val[q->first_to_check];
1223 if (state != SLSB_P_INPUT_PRIMED)
1224 /*
1225 * nothing more to do, if next buffer is not PRIMED.
1226 * note that we did a SYNC_MEMORY before, that there
1227 * has been a sychnronization.
1228 * we will return 0 below, as there is nothing to do
1229 * (stop_polling not necessary, as we have not been
1230 * using the PROCESSING state
1231 */
1232 return 0;
1233
1234 /*
1235 * ok, the next input buffer is primed. that means, that device state
1236 * change indicator and adapter local summary are set, so we will find
1237 * it next time.
1238 * we will return 0 below, as there is nothing to do, except scheduling
1239 * ourselves for the next time.
1240 */
1241 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1242 tiqdio_sched_tl();
1243 return 0;
1244 }
1245
1246 static int
1247 qdio_is_inbound_q_done(struct qdio_q *q)
1248 {
1249 int no_used;
1250 unsigned int start_buf, count;
1251 unsigned char state = 0;
1252 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1253
1254 #ifdef CONFIG_QDIO_DEBUG
1255 char dbf_text[15];
1256 #endif
1257
1258 no_used=atomic_read(&q->number_of_buffers_used);
1259
1260 /*
1261 * we need that one for synchronization with the adapter, as it
1262 * does a kind of PCI avoidance
1263 */
1264 SYNC_MEMORY;
1265
1266 if (!no_used) {
1267 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1268 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1269 return 1;
1270 }
1271 if (irq->is_qebsm) {
1272 count = 1;
1273 start_buf = q->first_to_check;
1274 qdio_do_eqbs(q, &state, &start_buf, &count);
1275 } else
1276 state = q->slsb.acc.val[q->first_to_check];
1277 if (state == SLSB_P_INPUT_PRIMED) {
1278 /* we got something to do */
1279 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1280 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1281 return 0;
1282 }
1283
1284 /* on VM, we don't poll, so the q is always done here */
1285 if (q->siga_sync)
1286 return 1;
1287 if (q->hydra_gives_outbound_pcis)
1288 return 1;
1289
1290 /*
1291 * at this point we know, that inbound first_to_check
1292 * has (probably) not moved (see qdio_inbound_processing)
1293 */
1294 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1295 #ifdef CONFIG_QDIO_DEBUG
1296 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1297 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1298 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1299 QDIO_DBF_TEXT4(0,trace,dbf_text);
1300 #endif /* CONFIG_QDIO_DEBUG */
1301 return 1;
1302 } else {
1303 #ifdef CONFIG_QDIO_DEBUG
1304 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1306 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1307 QDIO_DBF_TEXT4(0,trace,dbf_text);
1308 #endif /* CONFIG_QDIO_DEBUG */
1309 return 0;
1310 }
1311 }
1312
1313 static void
1314 qdio_kick_inbound_handler(struct qdio_q *q)
1315 {
1316 int count, start, end, real_end, i;
1317 #ifdef CONFIG_QDIO_DEBUG
1318 char dbf_text[15];
1319 #endif
1320
1321 QDIO_DBF_TEXT4(0,trace,"kickinh");
1322 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1323
1324 start=q->first_element_to_kick;
1325 real_end=q->first_to_check;
1326 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1327
1328 i=start;
1329 count=0;
1330 while (1) {
1331 count++;
1332 if (i==end)
1333 break;
1334 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1335 }
1336
1337 #ifdef CONFIG_QDIO_DEBUG
1338 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1339 QDIO_DBF_TEXT4(0,trace,dbf_text);
1340 #endif /* CONFIG_QDIO_DEBUG */
1341
1342 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1343 q->handler(q->cdev,
1344 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1345 q->qdio_error,q->siga_error,q->q_no,start,count,
1346 q->int_parm);
1347
1348 /* for the next time: */
1349 q->first_element_to_kick=real_end;
1350 q->qdio_error=0;
1351 q->siga_error=0;
1352 q->error_status_flags=0;
1353
1354 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1355 }
1356
1357 static void
1358 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1359 {
1360 struct qdio_irq *irq_ptr;
1361 struct qdio_q *oq;
1362 int i;
1363
1364 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1365 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1366
1367 /*
1368 * we first want to reserve the q, so that we know, that we don't
1369 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1370 * be set
1371 */
1372 if (unlikely(qdio_reserve_q(q))) {
1373 qdio_release_q(q);
1374 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1375 /*
1376 * as we might just be about to stop polling, we make
1377 * sure that we check again at least once more
1378 */
1379 tiqdio_sched_tl();
1380 return;
1381 }
1382 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1383 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1384 qdio_unmark_q(q);
1385 goto out;
1386 }
1387
1388 /*
1389 * we reset spare_ind_was_set, when the queue does not use the
1390 * spare indicator
1391 */
1392 if (spare_ind_was_set)
1393 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1394
1395 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1396 goto out;
1397 /*
1398 * q->dev_st_chg_ind is the indicator, be it shared or not.
1399 * only clear it, if indicator is non-shared
1400 */
1401 if (!spare_ind_was_set)
1402 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1403
1404 if (q->hydra_gives_outbound_pcis) {
1405 if (!q->siga_sync_done_on_thinints) {
1406 SYNC_MEMORY_ALL;
1407 } else if ((!q->siga_sync_done_on_outb_tis)&&
1408 (q->hydra_gives_outbound_pcis)) {
1409 SYNC_MEMORY_ALL_OUTB;
1410 }
1411 } else {
1412 SYNC_MEMORY;
1413 }
1414 /*
1415 * maybe we have to do work on our outbound queues... at least
1416 * we have to check the outbound-int-capable thinint-capable
1417 * queues
1418 */
1419 if (q->hydra_gives_outbound_pcis) {
1420 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1421 for (i=0;i<irq_ptr->no_output_qs;i++) {
1422 oq = irq_ptr->output_qs[i];
1423 if (!qdio_is_outbound_q_done(oq)) {
1424 qdio_perf_stat_dec(&perf_stats.tl_runs);
1425 __qdio_outbound_processing(oq);
1426 }
1427 }
1428 }
1429
1430 if (!qdio_has_inbound_q_moved(q))
1431 goto out;
1432
1433 qdio_kick_inbound_handler(q);
1434 if (tiqdio_is_inbound_q_done(q))
1435 if (!qdio_stop_polling(q)) {
1436 /*
1437 * we set the flags to get into the stuff next time,
1438 * see also comment in qdio_stop_polling
1439 */
1440 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1441 tiqdio_sched_tl();
1442 }
1443 out:
1444 qdio_release_q(q);
1445 }
1446
1447 static void
1448 tiqdio_inbound_processing(struct qdio_q *q)
1449 {
1450 __tiqdio_inbound_processing(q, atomic_read(&spare_indicator_usecount));
1451 }
1452
1453 static void
1454 __qdio_inbound_processing(struct qdio_q *q)
1455 {
1456 int q_laps=0;
1457
1458 QDIO_DBF_TEXT4(0,trace,"qinproc");
1459 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1460
1461 if (unlikely(qdio_reserve_q(q))) {
1462 qdio_release_q(q);
1463 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1464 /* as we're sissies, we'll check next time */
1465 if (likely(!atomic_read(&q->is_in_shutdown))) {
1466 qdio_mark_q(q);
1467 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1468 }
1469 return;
1470 }
1471 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1472 qdio_perf_stat_inc(&perf_stats.tl_runs);
1473
1474 again:
1475 if (qdio_has_inbound_q_moved(q)) {
1476 qdio_kick_inbound_handler(q);
1477 if (!qdio_stop_polling(q)) {
1478 q_laps++;
1479 if (q_laps<QDIO_Q_LAPS)
1480 goto again;
1481 }
1482 qdio_mark_q(q);
1483 } else {
1484 if (!qdio_is_inbound_q_done(q))
1485 /* means poll time is not yet over */
1486 qdio_mark_q(q);
1487 }
1488
1489 qdio_release_q(q);
1490 }
1491
1492 static void
1493 qdio_inbound_processing(struct qdio_q *q)
1494 {
1495 __qdio_inbound_processing(q);
1496 }
1497
1498 /************************* MAIN ROUTINES *******************************/
1499
1500 #ifdef QDIO_USE_PROCESSING_STATE
1501 static int
1502 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1503 {
1504 if (!q) {
1505 tiqdio_sched_tl();
1506 return 0;
1507 }
1508
1509 /*
1510 * under VM, we have not used the PROCESSING state, so no
1511 * need to stop polling
1512 */
1513 if (q->siga_sync)
1514 return 2;
1515
1516 if (unlikely(qdio_reserve_q(q))) {
1517 qdio_release_q(q);
1518 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1519 /*
1520 * as we might just be about to stop polling, we make
1521 * sure that we check again at least once more
1522 */
1523
1524 /*
1525 * sanity -- we'd get here without setting the
1526 * dev st chg ind
1527 */
1528 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1529 tiqdio_sched_tl();
1530 return 0;
1531 }
1532 if (qdio_stop_polling(q)) {
1533 qdio_release_q(q);
1534 return 2;
1535 }
1536 if (q_laps<QDIO_Q_LAPS-1) {
1537 qdio_release_q(q);
1538 return 3;
1539 }
1540 /*
1541 * we set the flags to get into the stuff
1542 * next time, see also comment in qdio_stop_polling
1543 */
1544 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1545 tiqdio_sched_tl();
1546 qdio_release_q(q);
1547 return 1;
1548
1549 }
1550 #endif /* QDIO_USE_PROCESSING_STATE */
1551
1552 static void
1553 tiqdio_inbound_checks(void)
1554 {
1555 struct qdio_q *q;
1556 int spare_ind_was_set=0;
1557 #ifdef QDIO_USE_PROCESSING_STATE
1558 int q_laps=0;
1559 #endif /* QDIO_USE_PROCESSING_STATE */
1560
1561 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1562 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1563
1564 #ifdef QDIO_USE_PROCESSING_STATE
1565 again:
1566 #endif /* QDIO_USE_PROCESSING_STATE */
1567
1568 /* when the spare indicator is used and set, save that and clear it */
1569 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1570 spare_ind_was_set = 1;
1571 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1572 }
1573
1574 q=(struct qdio_q*)tiq_list;
1575 do {
1576 if (!q)
1577 break;
1578 __tiqdio_inbound_processing(q, spare_ind_was_set);
1579 q=(struct qdio_q*)q->list_next;
1580 } while (q!=(struct qdio_q*)tiq_list);
1581
1582 #ifdef QDIO_USE_PROCESSING_STATE
1583 q=(struct qdio_q*)tiq_list;
1584 do {
1585 int ret;
1586
1587 ret = tiqdio_reset_processing_state(q, q_laps);
1588 switch (ret) {
1589 case 0:
1590 return;
1591 case 1:
1592 q_laps++;
1593 case 2:
1594 q = (struct qdio_q*)q->list_next;
1595 break;
1596 default:
1597 q_laps++;
1598 goto again;
1599 }
1600 } while (q!=(struct qdio_q*)tiq_list);
1601 #endif /* QDIO_USE_PROCESSING_STATE */
1602 }
1603
1604 static void
1605 tiqdio_tl(unsigned long data)
1606 {
1607 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1608
1609 qdio_perf_stat_inc(&perf_stats.tl_runs);
1610
1611 tiqdio_inbound_checks();
1612 }
1613
1614 /********************* GENERAL HELPER_ROUTINES ***********************/
1615
1616 static void
1617 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1618 {
1619 int i;
1620
1621 for (i=0;i<QDIO_MAX_QUEUES_PER_IRQ;i++) {
1622 if (!irq_ptr->input_qs[i])
1623 goto next;
1624
1625 kfree(irq_ptr->input_qs[i]->slib);
1626 kfree(irq_ptr->input_qs[i]);
1627
1628 next:
1629 if (!irq_ptr->output_qs[i])
1630 continue;
1631
1632 kfree(irq_ptr->output_qs[i]->slib);
1633 kfree(irq_ptr->output_qs[i]);
1634
1635 }
1636 kfree(irq_ptr->qdr);
1637 free_page((unsigned long) irq_ptr);
1638 }
1639
1640 static void
1641 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1642 unsigned int qib_param_field_format,
1643 /* pointer to 128 bytes or NULL, if no param field */
1644 unsigned char *qib_param_field,
1645 /* pointer to no_queues*128 words of data or NULL */
1646 unsigned int no_input_qs,
1647 unsigned int no_output_qs,
1648 unsigned long *input_slib_elements,
1649 unsigned long *output_slib_elements)
1650 {
1651 int i,j;
1652
1653 if (!irq_ptr)
1654 return;
1655
1656 irq_ptr->qib.pfmt=qib_param_field_format;
1657 if (qib_param_field)
1658 memcpy(irq_ptr->qib.parm,qib_param_field,
1659 QDIO_MAX_BUFFERS_PER_Q);
1660
1661 if (input_slib_elements)
1662 for (i=0;i<no_input_qs;i++) {
1663 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1664 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1665 input_slib_elements[
1666 i*QDIO_MAX_BUFFERS_PER_Q+j];
1667 }
1668 if (output_slib_elements)
1669 for (i=0;i<no_output_qs;i++) {
1670 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1671 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1672 output_slib_elements[
1673 i*QDIO_MAX_BUFFERS_PER_Q+j];
1674 }
1675 }
1676
1677 static int
1678 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1679 int no_input_qs, int no_output_qs)
1680 {
1681 int i;
1682 struct qdio_q *q;
1683 int result=-ENOMEM;
1684
1685 for (i=0;i<no_input_qs;i++) {
1686 q = kzalloc(sizeof(struct qdio_q), GFP_KERNEL);
1687
1688 if (!q) {
1689 QDIO_PRINT_ERR("kmalloc of q failed!\n");
1690 goto out;
1691 }
1692
1693 q->slib = kmalloc(PAGE_SIZE, GFP_KERNEL);
1694 if (!q->slib) {
1695 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1696 goto out;
1697 }
1698
1699 irq_ptr->input_qs[i]=q;
1700 }
1701
1702 for (i=0;i<no_output_qs;i++) {
1703 q = kzalloc(sizeof(struct qdio_q), GFP_KERNEL);
1704
1705 if (!q) {
1706 goto out;
1707 }
1708
1709 q->slib=kmalloc(PAGE_SIZE,GFP_KERNEL);
1710 if (!q->slib) {
1711 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1712 goto out;
1713 }
1714
1715 irq_ptr->output_qs[i]=q;
1716 }
1717
1718 result=0;
1719 out:
1720 return result;
1721 }
1722
1723 static void
1724 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1725 int no_input_qs, int no_output_qs,
1726 qdio_handler_t *input_handler,
1727 qdio_handler_t *output_handler,
1728 unsigned long int_parm,int q_format,
1729 unsigned long flags,
1730 void **inbound_sbals_array,
1731 void **outbound_sbals_array)
1732 {
1733 struct qdio_q *q;
1734 int i,j;
1735 char dbf_text[20]; /* see qdio_initialize */
1736 void *ptr;
1737 int available;
1738
1739 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1740 QDIO_DBF_TEXT0(0,setup,dbf_text);
1741 for (i=0;i<no_input_qs;i++) {
1742 q=irq_ptr->input_qs[i];
1743
1744 memset(q,0,((char*)&q->slib)-((char*)q));
1745 sprintf(dbf_text,"in-q%4x",i);
1746 QDIO_DBF_TEXT0(0,setup,dbf_text);
1747 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1748
1749 memset(q->slib,0,PAGE_SIZE);
1750 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1751
1752 available=0;
1753
1754 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1755 q->sbal[j]=*(inbound_sbals_array++);
1756
1757 q->queue_type=q_format;
1758 q->int_parm=int_parm;
1759 q->schid = irq_ptr->schid;
1760 q->irq_ptr = irq_ptr;
1761 q->cdev = cdev;
1762 q->mask=1<<(31-i);
1763 q->q_no=i;
1764 q->is_input_q=1;
1765 q->first_to_check=0;
1766 q->last_move_ftc=0;
1767 q->handler=input_handler;
1768 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1769
1770 q->tasklet.data=(unsigned long)q;
1771 /* q->is_thinint_q isn't valid at this time, but
1772 * irq_ptr->is_thinint_irq is */
1773 q->tasklet.func=(void(*)(unsigned long))
1774 ((irq_ptr->is_thinint_irq)?&tiqdio_inbound_processing:
1775 &qdio_inbound_processing);
1776
1777 /* actually this is not used for inbound queues. yet. */
1778 atomic_set(&q->busy_siga_counter,0);
1779 q->timing.busy_start=0;
1780
1781 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1782 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1783 QDIO_STATS_NUMBER)*j;
1784 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1785 */
1786
1787 /* fill in slib */
1788 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1789 (unsigned long)(q->slib);
1790 q->slib->sla=(unsigned long)(q->sl);
1791 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1792
1793 /* fill in sl */
1794 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1795 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1796
1797 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1798 ptr=(void*)q->sl;
1799 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1800 ptr=(void*)&q->slsb;
1801 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1802 ptr=(void*)q->sbal[0];
1803 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1804
1805 /* fill in slsb */
1806 if (!irq_ptr->is_qebsm) {
1807 unsigned int count = 1;
1808 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1809 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1810 }
1811 }
1812
1813 for (i=0;i<no_output_qs;i++) {
1814 q=irq_ptr->output_qs[i];
1815 memset(q,0,((char*)&q->slib)-((char*)q));
1816
1817 sprintf(dbf_text,"outq%4x",i);
1818 QDIO_DBF_TEXT0(0,setup,dbf_text);
1819 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1820
1821 memset(q->slib,0,PAGE_SIZE);
1822 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1823
1824 available=0;
1825
1826 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1827 q->sbal[j]=*(outbound_sbals_array++);
1828
1829 q->queue_type=q_format;
1830 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1831 (no_output_qs > 1) &&
1832 (i == no_output_qs-1))
1833 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1834 q->int_parm=int_parm;
1835 q->is_input_q=0;
1836 q->is_pci_out = 0;
1837 q->schid = irq_ptr->schid;
1838 q->cdev = cdev;
1839 q->irq_ptr = irq_ptr;
1840 q->mask=1<<(31-i);
1841 q->q_no=i;
1842 q->first_to_check=0;
1843 q->last_move_ftc=0;
1844 q->handler=output_handler;
1845
1846 q->tasklet.data=(unsigned long)q;
1847 q->tasklet.func=(void(*)(unsigned long))
1848 &qdio_outbound_processing;
1849 q->timer.function=(void(*)(unsigned long))
1850 &qdio_outbound_processing;
1851 q->timer.data = (long)q;
1852 init_timer(&q->timer);
1853
1854 atomic_set(&q->busy_siga_counter,0);
1855 q->timing.busy_start=0;
1856
1857 /* fill in slib */
1858 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1859 (unsigned long)(q->slib);
1860 q->slib->sla=(unsigned long)(q->sl);
1861 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1862
1863 /* fill in sl */
1864 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1865 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1866
1867 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1868 ptr=(void*)q->sl;
1869 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1870 ptr=(void*)&q->slsb;
1871 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1872 ptr=(void*)q->sbal[0];
1873 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1874
1875 /* fill in slsb */
1876 if (!irq_ptr->is_qebsm) {
1877 unsigned int count = 1;
1878 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1879 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1880 }
1881 }
1882 }
1883
1884 static void
1885 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1886 unsigned int no_input_qs,
1887 unsigned int no_output_qs,
1888 unsigned int min_input_threshold,
1889 unsigned int max_input_threshold,
1890 unsigned int min_output_threshold,
1891 unsigned int max_output_threshold)
1892 {
1893 int i;
1894 struct qdio_q *q;
1895
1896 for (i=0;i<no_input_qs;i++) {
1897 q=irq_ptr->input_qs[i];
1898 q->timing.threshold=max_input_threshold;
1899 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1900 q->threshold_classes[j].threshold=
1901 min_input_threshold+
1902 (max_input_threshold-min_input_threshold)/
1903 QDIO_STATS_CLASSES;
1904 }
1905 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1906 }
1907 for (i=0;i<no_output_qs;i++) {
1908 q=irq_ptr->output_qs[i];
1909 q->timing.threshold=max_output_threshold;
1910 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1911 q->threshold_classes[j].threshold=
1912 min_output_threshold+
1913 (max_output_threshold-min_output_threshold)/
1914 QDIO_STATS_CLASSES;
1915 }
1916 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1917 }
1918 }
1919
1920 static int
1921 tiqdio_thinint_handler(void)
1922 {
1923 QDIO_DBF_TEXT4(0,trace,"thin_int");
1924
1925 qdio_perf_stat_inc(&perf_stats.thinints);
1926
1927 /* SVS only when needed:
1928 * issue SVS to benefit from iqdio interrupt avoidance
1929 * (SVS clears AISOI)*/
1930 if (!omit_svs)
1931 tiqdio_clear_global_summary();
1932
1933 tiqdio_inbound_checks();
1934 return 0;
1935 }
1936
1937 static void
1938 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1939 {
1940 int i;
1941 #ifdef CONFIG_QDIO_DEBUG
1942 char dbf_text[15];
1943
1944 QDIO_DBF_TEXT5(0,trace,"newstate");
1945 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1946 QDIO_DBF_TEXT5(0,trace,dbf_text);
1947 #endif /* CONFIG_QDIO_DEBUG */
1948
1949 irq_ptr->state=state;
1950 for (i=0;i<irq_ptr->no_input_qs;i++)
1951 irq_ptr->input_qs[i]->state=state;
1952 for (i=0;i<irq_ptr->no_output_qs;i++)
1953 irq_ptr->output_qs[i]->state=state;
1954 mb();
1955 }
1956
1957 static void
1958 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1959 {
1960 char dbf_text[15];
1961
1962 if (irb->esw.esw0.erw.cons) {
1963 sprintf(dbf_text,"sens%4x",schid.sch_no);
1964 QDIO_DBF_TEXT2(1,trace,dbf_text);
1965 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1966
1967 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1968 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1969 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1970 }
1971
1972 }
1973
1974 static void
1975 qdio_handle_pci(struct qdio_irq *irq_ptr)
1976 {
1977 int i;
1978 struct qdio_q *q;
1979
1980 qdio_perf_stat_inc(&perf_stats.pcis);
1981 for (i=0;i<irq_ptr->no_input_qs;i++) {
1982 q=irq_ptr->input_qs[i];
1983 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1984 qdio_mark_q(q);
1985 else {
1986 qdio_perf_stat_dec(&perf_stats.tl_runs);
1987 __qdio_inbound_processing(q);
1988 }
1989 }
1990 if (!irq_ptr->hydra_gives_outbound_pcis)
1991 return;
1992 for (i=0;i<irq_ptr->no_output_qs;i++) {
1993 q=irq_ptr->output_qs[i];
1994 if (qdio_is_outbound_q_done(q))
1995 continue;
1996 qdio_perf_stat_dec(&perf_stats.tl_runs);
1997 if (!irq_ptr->sync_done_on_outb_pcis)
1998 SYNC_MEMORY;
1999 __qdio_outbound_processing(q);
2000 }
2001 }
2002
2003 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
2004
2005 static void
2006 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
2007 int cstat, int dstat)
2008 {
2009 struct qdio_irq *irq_ptr;
2010 struct qdio_q *q;
2011 char dbf_text[15];
2012
2013 irq_ptr = cdev->private->qdio_data;
2014
2015 QDIO_DBF_TEXT2(1, trace, "ick2");
2016 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2017 QDIO_DBF_TEXT2(1,trace,dbf_text);
2018 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2019 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2020 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2021 QDIO_PRINT_ERR("received check condition on activate " \
2022 "queues on device %s (cs=x%x, ds=x%x).\n",
2023 cdev->dev.bus_id, cstat, dstat);
2024 if (irq_ptr->no_input_qs) {
2025 q=irq_ptr->input_qs[0];
2026 } else if (irq_ptr->no_output_qs) {
2027 q=irq_ptr->output_qs[0];
2028 } else {
2029 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2030 cdev->dev.bus_id);
2031 goto omit_handler_call;
2032 }
2033 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2034 QDIO_STATUS_LOOK_FOR_ERROR,
2035 0,0,0,-1,-1,q->int_parm);
2036 omit_handler_call:
2037 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2038
2039 }
2040
2041 static void
2042 qdio_call_shutdown(struct work_struct *work)
2043 {
2044 struct ccw_device_private *priv;
2045 struct ccw_device *cdev;
2046
2047 priv = container_of(work, struct ccw_device_private, kick_work);
2048 cdev = priv->cdev;
2049 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2050 put_device(&cdev->dev);
2051 }
2052
2053 static void
2054 qdio_timeout_handler(struct ccw_device *cdev)
2055 {
2056 struct qdio_irq *irq_ptr;
2057 char dbf_text[15];
2058
2059 QDIO_DBF_TEXT2(0, trace, "qtoh");
2060 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2061 QDIO_DBF_TEXT2(0, trace, dbf_text);
2062
2063 irq_ptr = cdev->private->qdio_data;
2064 sprintf(dbf_text, "state:%d", irq_ptr->state);
2065 QDIO_DBF_TEXT2(0, trace, dbf_text);
2066
2067 switch (irq_ptr->state) {
2068 case QDIO_IRQ_STATE_INACTIVE:
2069 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2070 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2071 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2072 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2073 break;
2074 case QDIO_IRQ_STATE_CLEANUP:
2075 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2076 "irq=0.%x.%x.\n",
2077 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2078 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2079 break;
2080 case QDIO_IRQ_STATE_ESTABLISHED:
2081 case QDIO_IRQ_STATE_ACTIVE:
2082 /* I/O has been terminated by common I/O layer. */
2083 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2084 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2085 QDIO_DBF_TEXT2(1, trace, "cio:term");
2086 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2087 if (get_device(&cdev->dev)) {
2088 /* Can't call shutdown from interrupt context. */
2089 PREPARE_WORK(&cdev->private->kick_work,
2090 qdio_call_shutdown);
2091 queue_work(ccw_device_work, &cdev->private->kick_work);
2092 }
2093 break;
2094 default:
2095 BUG();
2096 }
2097 ccw_device_set_timeout(cdev, 0);
2098 wake_up(&cdev->private->wait_q);
2099 }
2100
2101 static void
2102 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2103 {
2104 struct qdio_irq *irq_ptr;
2105 int cstat,dstat;
2106 char dbf_text[15];
2107
2108 #ifdef CONFIG_QDIO_DEBUG
2109 QDIO_DBF_TEXT4(0, trace, "qint");
2110 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2111 QDIO_DBF_TEXT4(0, trace, dbf_text);
2112 #endif /* CONFIG_QDIO_DEBUG */
2113
2114 if (!intparm) {
2115 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2116 "handler, device %s\n", cdev->dev.bus_id);
2117 return;
2118 }
2119
2120 irq_ptr = cdev->private->qdio_data;
2121 if (!irq_ptr) {
2122 QDIO_DBF_TEXT2(1, trace, "uint");
2123 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2124 QDIO_DBF_TEXT2(1,trace,dbf_text);
2125 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2126 cdev->dev.bus_id);
2127 return;
2128 }
2129
2130 if (IS_ERR(irb)) {
2131 /* Currently running i/o is in error. */
2132 switch (PTR_ERR(irb)) {
2133 case -EIO:
2134 QDIO_PRINT_ERR("i/o error on device %s\n",
2135 cdev->dev.bus_id);
2136 return;
2137 case -ETIMEDOUT:
2138 qdio_timeout_handler(cdev);
2139 return;
2140 default:
2141 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2142 PTR_ERR(irb), cdev->dev.bus_id);
2143 return;
2144 }
2145 }
2146
2147 qdio_irq_check_sense(irq_ptr->schid, irb);
2148
2149 #ifdef CONFIG_QDIO_DEBUG
2150 sprintf(dbf_text, "state:%d", irq_ptr->state);
2151 QDIO_DBF_TEXT4(0, trace, dbf_text);
2152 #endif /* CONFIG_QDIO_DEBUG */
2153
2154 cstat = irb->scsw.cstat;
2155 dstat = irb->scsw.dstat;
2156
2157 switch (irq_ptr->state) {
2158 case QDIO_IRQ_STATE_INACTIVE:
2159 qdio_establish_handle_irq(cdev, cstat, dstat);
2160 break;
2161
2162 case QDIO_IRQ_STATE_CLEANUP:
2163 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2164 break;
2165
2166 case QDIO_IRQ_STATE_ESTABLISHED:
2167 case QDIO_IRQ_STATE_ACTIVE:
2168 if (cstat & SCHN_STAT_PCI) {
2169 qdio_handle_pci(irq_ptr);
2170 break;
2171 }
2172
2173 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2174 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2175 break;
2176 }
2177 default:
2178 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2179 "device %s?!\n",
2180 irq_ptr->state, cdev->dev.bus_id);
2181 }
2182 wake_up(&cdev->private->wait_q);
2183
2184 }
2185
2186 int
2187 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2188 unsigned int queue_number)
2189 {
2190 int cc = 0;
2191 struct qdio_q *q;
2192 struct qdio_irq *irq_ptr;
2193 void *ptr;
2194 #ifdef CONFIG_QDIO_DEBUG
2195 char dbf_text[15]="SyncXXXX";
2196 #endif
2197
2198 irq_ptr = cdev->private->qdio_data;
2199 if (!irq_ptr)
2200 return -ENODEV;
2201
2202 #ifdef CONFIG_QDIO_DEBUG
2203 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2204 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2205 *((int*)(&dbf_text[0]))=flags;
2206 *((int*)(&dbf_text[4]))=queue_number;
2207 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2208 #endif /* CONFIG_QDIO_DEBUG */
2209
2210 if (flags&QDIO_FLAG_SYNC_INPUT) {
2211 q=irq_ptr->input_qs[queue_number];
2212 if (!q)
2213 return -EINVAL;
2214 if (!(irq_ptr->is_qebsm))
2215 cc = do_siga_sync(q->schid, 0, q->mask);
2216 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2217 q=irq_ptr->output_qs[queue_number];
2218 if (!q)
2219 return -EINVAL;
2220 if (!(irq_ptr->is_qebsm))
2221 cc = do_siga_sync(q->schid, q->mask, 0);
2222 } else
2223 return -EINVAL;
2224
2225 ptr=&cc;
2226 if (cc)
2227 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2228
2229 return cc;
2230 }
2231
2232 static void
2233 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2234 unsigned long token)
2235 {
2236 struct qdio_q *q;
2237 int i;
2238 unsigned int count, start_buf;
2239 char dbf_text[15];
2240
2241 /*check if QEBSM is disabled */
2242 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2243 irq_ptr->is_qebsm = 0;
2244 irq_ptr->sch_token = 0;
2245 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2246 QDIO_DBF_TEXT0(0,setup,"noV=V");
2247 return;
2248 }
2249 irq_ptr->sch_token = token;
2250 /*input queue*/
2251 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2252 q = irq_ptr->input_qs[i];
2253 count = QDIO_MAX_BUFFERS_PER_Q;
2254 start_buf = 0;
2255 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2256 }
2257 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2258 QDIO_DBF_TEXT0(0,setup,dbf_text);
2259 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2260 QDIO_DBF_TEXT0(0,setup,dbf_text);
2261 /*output queue*/
2262 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2263 q = irq_ptr->output_qs[i];
2264 count = QDIO_MAX_BUFFERS_PER_Q;
2265 start_buf = 0;
2266 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2267 }
2268 }
2269
2270 static void
2271 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2272 {
2273 int result;
2274 unsigned char qdioac;
2275 struct {
2276 struct chsc_header request;
2277 u16 reserved1:10;
2278 u16 ssid:2;
2279 u16 fmt:4;
2280 u16 first_sch;
2281 u16 reserved2;
2282 u16 last_sch;
2283 u32 reserved3;
2284 struct chsc_header response;
2285 u32 reserved4;
2286 u8 flags;
2287 u8 reserved5;
2288 u16 sch;
2289 u8 qfmt;
2290 u8 parm;
2291 u8 qdioac1;
2292 u8 sch_class;
2293 u8 reserved7;
2294 u8 icnt;
2295 u8 reserved8;
2296 u8 ocnt;
2297 u8 reserved9;
2298 u8 mbccnt;
2299 u16 qdioac2;
2300 u64 sch_token;
2301 } *ssqd_area;
2302
2303 QDIO_DBF_TEXT0(0,setup,"getssqd");
2304 qdioac = 0;
2305 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2306 if (!ssqd_area) {
2307 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2308 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2309 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2310 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2311 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2312 irq_ptr->is_qebsm = 0;
2313 irq_ptr->sch_token = 0;
2314 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2315 return;
2316 }
2317
2318 ssqd_area->request = (struct chsc_header) {
2319 .length = 0x0010,
2320 .code = 0x0024,
2321 };
2322 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2323 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2324 ssqd_area->ssid = irq_ptr->schid.ssid;
2325 result = chsc(ssqd_area);
2326
2327 if (result) {
2328 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2329 "SIGAs for sch 0.%x.%x.\n", result,
2330 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2331 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2332 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2333 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2334 irq_ptr->is_qebsm = 0;
2335 goto out;
2336 }
2337
2338 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2339 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2340 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2341 ssqd_area->response.code,
2342 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2343 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2344 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2345 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2346 irq_ptr->is_qebsm = 0;
2347 goto out;
2348 }
2349 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2350 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2351 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2352 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2353 "using all SIGAs.\n",
2354 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2355 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2356 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2357 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2358 irq_ptr->is_qebsm = 0;
2359 goto out;
2360 }
2361 qdioac = ssqd_area->qdioac1;
2362 out:
2363 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2364 ssqd_area->sch_token);
2365 mempool_free(ssqd_area, qdio_mempool_scssc);
2366 irq_ptr->qdioac = qdioac;
2367 }
2368
2369 static unsigned int
2370 tiqdio_check_chsc_availability(void)
2371 {
2372 char dbf_text[15];
2373
2374 if (!css_characteristics_avail)
2375 return -EIO;
2376
2377 /* Check for bit 41. */
2378 if (!css_general_characteristics.aif) {
2379 QDIO_PRINT_WARN("Adapter interruption facility not " \
2380 "installed.\n");
2381 return -ENOENT;
2382 }
2383
2384 /* Check for bits 107 and 108. */
2385 if (!css_chsc_characteristics.scssc ||
2386 !css_chsc_characteristics.scsscf) {
2387 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2388 "not available.\n");
2389 return -ENOENT;
2390 }
2391
2392 /* Check for OSA/FCP thin interrupts (bit 67). */
2393 hydra_thinints = css_general_characteristics.aif_osa;
2394 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2395 QDIO_DBF_TEXT0(0,setup,dbf_text);
2396
2397 #ifdef CONFIG_64BIT
2398 /* Check for QEBSM support in general (bit 58). */
2399 is_passthrough = css_general_characteristics.qebsm;
2400 #endif
2401 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2402 QDIO_DBF_TEXT0(0,setup,dbf_text);
2403
2404 /* Check for aif time delay disablement fac (bit 56). If installed,
2405 * omit svs even under lpar (good point by rick again) */
2406 omit_svs = css_general_characteristics.aif_tdd;
2407 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2408 QDIO_DBF_TEXT0(0,setup,dbf_text);
2409 return 0;
2410 }
2411
2412
2413 static unsigned int
2414 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2415 {
2416 unsigned long real_addr_local_summary_bit;
2417 unsigned long real_addr_dev_st_chg_ind;
2418 void *ptr;
2419 char dbf_text[15];
2420
2421 unsigned int resp_code;
2422 int result;
2423
2424 struct {
2425 struct chsc_header request;
2426 u16 operation_code;
2427 u16 reserved1;
2428 u32 reserved2;
2429 u32 reserved3;
2430 u64 summary_indicator_addr;
2431 u64 subchannel_indicator_addr;
2432 u32 ks:4;
2433 u32 kc:4;
2434 u32 reserved4:21;
2435 u32 isc:3;
2436 u32 word_with_d_bit;
2437 /* set to 0x10000000 to enable
2438 * time delay disablement facility */
2439 u32 reserved5;
2440 struct subchannel_id schid;
2441 u32 reserved6[1004];
2442 struct chsc_header response;
2443 u32 reserved7;
2444 } *scssc_area;
2445
2446 if (!irq_ptr->is_thinint_irq)
2447 return -ENODEV;
2448
2449 if (reset_to_zero) {
2450 real_addr_local_summary_bit=0;
2451 real_addr_dev_st_chg_ind=0;
2452 } else {
2453 real_addr_local_summary_bit=
2454 virt_to_phys((volatile void *)indicators);
2455 real_addr_dev_st_chg_ind=
2456 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2457 }
2458
2459 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2460 if (!scssc_area) {
2461 QDIO_PRINT_WARN("No memory for setting indicators on " \
2462 "subchannel 0.%x.%x.\n",
2463 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2464 return -ENOMEM;
2465 }
2466 scssc_area->request = (struct chsc_header) {
2467 .length = 0x0fe0,
2468 .code = 0x0021,
2469 };
2470 scssc_area->operation_code = 0;
2471
2472 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2473 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2474 scssc_area->ks = QDIO_STORAGE_KEY;
2475 scssc_area->kc = QDIO_STORAGE_KEY;
2476 scssc_area->isc = TIQDIO_THININT_ISC;
2477 scssc_area->schid = irq_ptr->schid;
2478 /* enables the time delay disablement facility. Don't care
2479 * whether it is really there (i.e. we haven't checked for
2480 * it) */
2481 if (css_general_characteristics.aif_tdd)
2482 scssc_area->word_with_d_bit = 0x10000000;
2483 else
2484 QDIO_PRINT_WARN("Time delay disablement facility " \
2485 "not available\n");
2486
2487 result = chsc(scssc_area);
2488 if (result) {
2489 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2490 "cc=%i.\n",
2491 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2492 result = -EIO;
2493 goto out;
2494 }
2495
2496 resp_code = scssc_area->response.code;
2497 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2498 QDIO_PRINT_WARN("response upon setting indicators " \
2499 "is 0x%x.\n",resp_code);
2500 sprintf(dbf_text,"sidR%4x",resp_code);
2501 QDIO_DBF_TEXT1(0,trace,dbf_text);
2502 QDIO_DBF_TEXT1(0,setup,dbf_text);
2503 ptr=&scssc_area->response;
2504 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2505 result = -EIO;
2506 goto out;
2507 }
2508
2509 QDIO_DBF_TEXT2(0,setup,"setscind");
2510 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2511 sizeof(unsigned long));
2512 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2513 result = 0;
2514 out:
2515 mempool_free(scssc_area, qdio_mempool_scssc);
2516 return result;
2517
2518 }
2519
2520 static unsigned int
2521 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2522 {
2523 unsigned int resp_code;
2524 int result;
2525 void *ptr;
2526 char dbf_text[15];
2527
2528 struct {
2529 struct chsc_header request;
2530 u16 operation_code;
2531 u16 reserved1;
2532 u32 reserved2;
2533 u32 reserved3;
2534 u32 reserved4[2];
2535 u32 delay_target;
2536 u32 reserved5[1009];
2537 struct chsc_header response;
2538 u32 reserved6;
2539 } *scsscf_area;
2540
2541 if (!irq_ptr->is_thinint_irq)
2542 return -ENODEV;
2543
2544 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2545 if (!scsscf_area) {
2546 QDIO_PRINT_WARN("No memory for setting delay target on " \
2547 "subchannel 0.%x.%x.\n",
2548 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2549 return -ENOMEM;
2550 }
2551 scsscf_area->request = (struct chsc_header) {
2552 .length = 0x0fe0,
2553 .code = 0x1027,
2554 };
2555
2556 scsscf_area->delay_target = delay_target<<16;
2557
2558 result=chsc(scsscf_area);
2559 if (result) {
2560 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2561 "cc=%i. Continuing.\n",
2562 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2563 result);
2564 result = -EIO;
2565 goto out;
2566 }
2567
2568 resp_code = scsscf_area->response.code;
2569 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2570 QDIO_PRINT_WARN("response upon setting delay target " \
2571 "is 0x%x. Continuing.\n",resp_code);
2572 sprintf(dbf_text,"sdtR%4x",resp_code);
2573 QDIO_DBF_TEXT1(0,trace,dbf_text);
2574 QDIO_DBF_TEXT1(0,setup,dbf_text);
2575 ptr=&scsscf_area->response;
2576 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2577 }
2578 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2579 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2580 result = 0; /* not critical */
2581 out:
2582 mempool_free(scsscf_area, qdio_mempool_scssc);
2583 return result;
2584 }
2585
2586 int
2587 qdio_cleanup(struct ccw_device *cdev, int how)
2588 {
2589 struct qdio_irq *irq_ptr;
2590 char dbf_text[15];
2591 int rc;
2592
2593 irq_ptr = cdev->private->qdio_data;
2594 if (!irq_ptr)
2595 return -ENODEV;
2596
2597 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2598 QDIO_DBF_TEXT1(0,trace,dbf_text);
2599 QDIO_DBF_TEXT0(0,setup,dbf_text);
2600
2601 rc = qdio_shutdown(cdev, how);
2602 if ((rc == 0) || (rc == -EINPROGRESS))
2603 rc = qdio_free(cdev);
2604 return rc;
2605 }
2606
2607 int
2608 qdio_shutdown(struct ccw_device *cdev, int how)
2609 {
2610 struct qdio_irq *irq_ptr;
2611 int i;
2612 int result = 0;
2613 int rc;
2614 unsigned long flags;
2615 int timeout;
2616 char dbf_text[15];
2617
2618 irq_ptr = cdev->private->qdio_data;
2619 if (!irq_ptr)
2620 return -ENODEV;
2621
2622 down(&irq_ptr->setting_up_sema);
2623
2624 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2625 QDIO_DBF_TEXT1(0,trace,dbf_text);
2626 QDIO_DBF_TEXT0(0,setup,dbf_text);
2627
2628 /* mark all qs as uninteresting */
2629 for (i=0;i<irq_ptr->no_input_qs;i++)
2630 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2631
2632 for (i=0;i<irq_ptr->no_output_qs;i++)
2633 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2634
2635 tasklet_kill(&tiqdio_tasklet);
2636
2637 for (i=0;i<irq_ptr->no_input_qs;i++) {
2638 qdio_unmark_q(irq_ptr->input_qs[i]);
2639 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2640 wait_event_interruptible_timeout(cdev->private->wait_q,
2641 !atomic_read(&irq_ptr->
2642 input_qs[i]->
2643 use_count),
2644 QDIO_NO_USE_COUNT_TIMEOUT);
2645 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2646 result=-EINPROGRESS;
2647 }
2648
2649 for (i=0;i<irq_ptr->no_output_qs;i++) {
2650 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2651 del_timer(&irq_ptr->output_qs[i]->timer);
2652 wait_event_interruptible_timeout(cdev->private->wait_q,
2653 !atomic_read(&irq_ptr->
2654 output_qs[i]->
2655 use_count),
2656 QDIO_NO_USE_COUNT_TIMEOUT);
2657 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2658 result=-EINPROGRESS;
2659 }
2660
2661 /* cleanup subchannel */
2662 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2663 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2664 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2665 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2666 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2667 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2668 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2669 } else { /* default behaviour */
2670 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2671 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2672 }
2673 if (rc == -ENODEV) {
2674 /* No need to wait for device no longer present. */
2675 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2676 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2677 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2678 /*
2679 * Whoever put another handler there, has to cope with the
2680 * interrupt theirself. Might happen if qdio_shutdown was
2681 * called on already shutdown queues, but this shouldn't have
2682 * bad side effects.
2683 */
2684 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2685 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2686 } else if (rc == 0) {
2687 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2688 ccw_device_set_timeout(cdev, timeout);
2689 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2690
2691 wait_event(cdev->private->wait_q,
2692 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2693 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2694 } else {
2695 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2696 "device %s\n", result, cdev->dev.bus_id);
2697 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2698 result = rc;
2699 goto out;
2700 }
2701 if (irq_ptr->is_thinint_irq) {
2702 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2703 tiqdio_set_subchannel_ind(irq_ptr,1);
2704 /* reset adapter interrupt indicators */
2705 }
2706
2707 /* exchange int handlers, if necessary */
2708 if ((void*)cdev->handler == (void*)qdio_handler)
2709 cdev->handler=irq_ptr->original_int_handler;
2710
2711 /* Ignore errors. */
2712 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2713 ccw_device_set_timeout(cdev, 0);
2714 out:
2715 up(&irq_ptr->setting_up_sema);
2716 return result;
2717 }
2718
2719 int
2720 qdio_free(struct ccw_device *cdev)
2721 {
2722 struct qdio_irq *irq_ptr;
2723 char dbf_text[15];
2724
2725 irq_ptr = cdev->private->qdio_data;
2726 if (!irq_ptr)
2727 return -ENODEV;
2728
2729 down(&irq_ptr->setting_up_sema);
2730
2731 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2732 QDIO_DBF_TEXT1(0,trace,dbf_text);
2733 QDIO_DBF_TEXT0(0,setup,dbf_text);
2734
2735 cdev->private->qdio_data = NULL;
2736
2737 up(&irq_ptr->setting_up_sema);
2738
2739 qdio_release_irq_memory(irq_ptr);
2740 module_put(THIS_MODULE);
2741 return 0;
2742 }
2743
2744 static void
2745 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2746 {
2747 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2748
2749 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2750 QDIO_DBF_TEXT0(0,setup,dbf_text);
2751 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2752 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2753 QDIO_DBF_TEXT0(0,setup,dbf_text);
2754 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2755 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2756 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2757 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2758 QDIO_DBF_TEXT0(0,setup,dbf_text);
2759 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2760 QDIO_DBF_TEXT0(0,setup,dbf_text);
2761 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2762 QDIO_DBF_TEXT0(0,setup,dbf_text);
2763 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2764 QDIO_DBF_TEXT0(0,setup,dbf_text);
2765 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2766 QDIO_DBF_TEXT0(0,setup,dbf_text);
2767 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2768 QDIO_DBF_TEXT0(0,setup,dbf_text);
2769 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2770 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2771 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2772 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2773 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2774 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2775 }
2776
2777 static void
2778 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2779 {
2780 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2781 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2782
2783 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2784
2785 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2786
2787 irq_ptr->qdr->qdf0[i].slsba=
2788 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2789
2790 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2791 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2792 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2793 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2794 }
2795
2796 static void
2797 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2798 int j, int iqfmt)
2799 {
2800 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2801 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2802
2803 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2804
2805 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2806
2807 irq_ptr->qdr->qdf0[i+j].slsba=
2808 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2809
2810 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2811 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2812 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2813 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2814 }
2815
2816
2817 static void
2818 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2819 {
2820 int i;
2821
2822 for (i=0;i<irq_ptr->no_input_qs;i++) {
2823 irq_ptr->input_qs[i]->siga_sync=
2824 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2825 irq_ptr->input_qs[i]->siga_in=
2826 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2827 irq_ptr->input_qs[i]->siga_out=
2828 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2829 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2830 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2831 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2832 irq_ptr->hydra_gives_outbound_pcis;
2833 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2834 ((irq_ptr->qdioac&
2835 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2836 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2837 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2838 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2839
2840 }
2841 }
2842
2843 static void
2844 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2845 {
2846 int i;
2847
2848 for (i=0;i<irq_ptr->no_output_qs;i++) {
2849 irq_ptr->output_qs[i]->siga_sync=
2850 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2851 irq_ptr->output_qs[i]->siga_in=
2852 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2853 irq_ptr->output_qs[i]->siga_out=
2854 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2855 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2856 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2857 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2858 irq_ptr->hydra_gives_outbound_pcis;
2859 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2860 ((irq_ptr->qdioac&
2861 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2862 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2863 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2864 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2865
2866 }
2867 }
2868
2869 static int
2870 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2871 int dstat)
2872 {
2873 char dbf_text[15];
2874 struct qdio_irq *irq_ptr;
2875
2876 irq_ptr = cdev->private->qdio_data;
2877
2878 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2879 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2880 QDIO_DBF_TEXT2(1,trace,dbf_text);
2881 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2882 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2883 QDIO_PRINT_ERR("received check condition on establish " \
2884 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2885 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2886 cstat,dstat);
2887 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2888 }
2889
2890 if (!(dstat & DEV_STAT_DEV_END)) {
2891 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2892 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2893 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2894 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2895 "device end: dstat=%02x, cstat=%02x\n",
2896 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2897 dstat, cstat);
2898 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2899 return 1;
2900 }
2901
2902 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2903 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2904 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2905 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2906 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2907 "the following devstat: dstat=%02x, "
2908 "cstat=%02x\n", irq_ptr->schid.ssid,
2909 irq_ptr->schid.sch_no, dstat, cstat);
2910 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2911 return 1;
2912 }
2913 return 0;
2914 }
2915
2916 static void
2917 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2918 {
2919 struct qdio_irq *irq_ptr;
2920 char dbf_text[15];
2921
2922 irq_ptr = cdev->private->qdio_data;
2923
2924 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2925 QDIO_DBF_TEXT0(0,setup,dbf_text);
2926 QDIO_DBF_TEXT0(0,trace,dbf_text);
2927
2928 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2929 ccw_device_set_timeout(cdev, 0);
2930 return;
2931 }
2932
2933 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2934 ccw_device_set_timeout(cdev, 0);
2935 }
2936
2937 int
2938 qdio_initialize(struct qdio_initialize *init_data)
2939 {
2940 int rc;
2941 char dbf_text[15];
2942
2943 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2944 QDIO_DBF_TEXT0(0,setup,dbf_text);
2945 QDIO_DBF_TEXT0(0,trace,dbf_text);
2946
2947 rc = qdio_allocate(init_data);
2948 if (rc == 0) {
2949 rc = qdio_establish(init_data);
2950 if (rc != 0)
2951 qdio_free(init_data->cdev);
2952 }
2953
2954 return rc;
2955 }
2956
2957
2958 int
2959 qdio_allocate(struct qdio_initialize *init_data)
2960 {
2961 struct qdio_irq *irq_ptr;
2962 char dbf_text[15];
2963
2964 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2965 QDIO_DBF_TEXT0(0,setup,dbf_text);
2966 QDIO_DBF_TEXT0(0,trace,dbf_text);
2967 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2968 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2969 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2970 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2971 return -EINVAL;
2972
2973 if (!init_data->input_sbal_addr_array)
2974 return -EINVAL;
2975
2976 if (!init_data->output_sbal_addr_array)
2977 return -EINVAL;
2978
2979 qdio_allocate_do_dbf(init_data);
2980
2981 /* create irq */
2982 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2983
2984 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2985 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2986
2987 if (!irq_ptr) {
2988 QDIO_PRINT_ERR("kmalloc of irq_ptr failed!\n");
2989 return -ENOMEM;
2990 }
2991
2992 init_MUTEX(&irq_ptr->setting_up_sema);
2993
2994 /* QDR must be in DMA area since CCW data address is only 32 bit */
2995 irq_ptr->qdr=kmalloc(sizeof(struct qdr), GFP_KERNEL | GFP_DMA);
2996 if (!(irq_ptr->qdr)) {
2997 free_page((unsigned long) irq_ptr);
2998 QDIO_PRINT_ERR("kmalloc of irq_ptr->qdr failed!\n");
2999 return -ENOMEM;
3000 }
3001 QDIO_DBF_TEXT0(0,setup,"qdr:");
3002 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
3003
3004 if (qdio_alloc_qs(irq_ptr,
3005 init_data->no_input_qs,
3006 init_data->no_output_qs)) {
3007 qdio_release_irq_memory(irq_ptr);
3008 return -ENOMEM;
3009 }
3010
3011 init_data->cdev->private->qdio_data = irq_ptr;
3012
3013 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3014
3015 return 0;
3016 }
3017
3018 static int qdio_fill_irq(struct qdio_initialize *init_data)
3019 {
3020 int i;
3021 char dbf_text[15];
3022 struct ciw *ciw;
3023 int is_iqdio;
3024 struct qdio_irq *irq_ptr;
3025
3026 irq_ptr = init_data->cdev->private->qdio_data;
3027
3028 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3029
3030 /* wipes qib.ac, required by ar7063 */
3031 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3032
3033 irq_ptr->int_parm=init_data->int_parm;
3034
3035 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3036 irq_ptr->no_input_qs=init_data->no_input_qs;
3037 irq_ptr->no_output_qs=init_data->no_output_qs;
3038
3039 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3040 irq_ptr->is_iqdio_irq=1;
3041 irq_ptr->is_thinint_irq=1;
3042 } else {
3043 irq_ptr->is_iqdio_irq=0;
3044 irq_ptr->is_thinint_irq=hydra_thinints;
3045 }
3046 sprintf(dbf_text,"is_i_t%1x%1x",
3047 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3048 QDIO_DBF_TEXT2(0,setup,dbf_text);
3049
3050 if (irq_ptr->is_thinint_irq) {
3051 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3052 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3053 if (!irq_ptr->dev_st_chg_ind) {
3054 QDIO_PRINT_WARN("no indicator location available " \
3055 "for irq 0.%x.%x\n",
3056 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3057 qdio_release_irq_memory(irq_ptr);
3058 return -ENOBUFS;
3059 }
3060 }
3061
3062 /* defaults */
3063 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3064 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3065 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3066 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3067
3068 qdio_fill_qs(irq_ptr, init_data->cdev,
3069 init_data->no_input_qs,
3070 init_data->no_output_qs,
3071 init_data->input_handler,
3072 init_data->output_handler,init_data->int_parm,
3073 init_data->q_format,init_data->flags,
3074 init_data->input_sbal_addr_array,
3075 init_data->output_sbal_addr_array);
3076
3077 if (!try_module_get(THIS_MODULE)) {
3078 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3079 qdio_release_irq_memory(irq_ptr);
3080 return -EINVAL;
3081 }
3082
3083 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3084 init_data->no_output_qs,
3085 init_data->min_input_threshold,
3086 init_data->max_input_threshold,
3087 init_data->min_output_threshold,
3088 init_data->max_output_threshold);
3089
3090 /* fill in qdr */
3091 irq_ptr->qdr->qfmt=init_data->q_format;
3092 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3093 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3094 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3095 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3096
3097 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3098 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3099
3100 /* fill in qib */
3101 irq_ptr->is_qebsm = is_passthrough;
3102 if (irq_ptr->is_qebsm)
3103 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3104
3105 irq_ptr->qib.qfmt=init_data->q_format;
3106 if (init_data->no_input_qs)
3107 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3108 if (init_data->no_output_qs)
3109 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3110 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3111
3112 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3113 init_data->qib_param_field,
3114 init_data->no_input_qs,
3115 init_data->no_output_qs,
3116 init_data->input_slib_elements,
3117 init_data->output_slib_elements);
3118
3119 /* first input descriptors, then output descriptors */
3120 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3121 for (i=0;i<init_data->no_input_qs;i++)
3122 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3123
3124 for (i=0;i<init_data->no_output_qs;i++)
3125 qdio_allocate_fill_output_desc(irq_ptr, i,
3126 init_data->no_input_qs,
3127 is_iqdio);
3128
3129 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3130
3131 /* get qdio commands */
3132 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3133 if (!ciw) {
3134 QDIO_DBF_TEXT2(1,setup,"no eq");
3135 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3136 "Trying to use default.\n");
3137 } else
3138 irq_ptr->equeue = *ciw;
3139 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3140 if (!ciw) {
3141 QDIO_DBF_TEXT2(1,setup,"no aq");
3142 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3143 "Trying to use default.\n");
3144 } else
3145 irq_ptr->aqueue = *ciw;
3146
3147 /* Set new interrupt handler. */
3148 irq_ptr->original_int_handler = init_data->cdev->handler;
3149 init_data->cdev->handler = qdio_handler;
3150
3151 return 0;
3152 }
3153
3154 int
3155 qdio_establish(struct qdio_initialize *init_data)
3156 {
3157 struct qdio_irq *irq_ptr;
3158 unsigned long saveflags;
3159 int result, result2;
3160 struct ccw_device *cdev;
3161 char dbf_text[20];
3162
3163 cdev=init_data->cdev;
3164 irq_ptr = cdev->private->qdio_data;
3165 if (!irq_ptr)
3166 return -EINVAL;
3167
3168 if (cdev->private->state != DEV_STATE_ONLINE)
3169 return -EINVAL;
3170
3171 down(&irq_ptr->setting_up_sema);
3172
3173 qdio_fill_irq(init_data);
3174
3175 /* the thinint CHSC stuff */
3176 if (irq_ptr->is_thinint_irq) {
3177
3178 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3179 if (result) {
3180 up(&irq_ptr->setting_up_sema);
3181 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3182 return result;
3183 }
3184 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3185 }
3186
3187 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3188 QDIO_DBF_TEXT0(0,setup,dbf_text);
3189 QDIO_DBF_TEXT0(0,trace,dbf_text);
3190
3191 /* establish q */
3192 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3193 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3194 irq_ptr->ccw.count=irq_ptr->equeue.count;
3195 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3196
3197 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3198
3199 ccw_device_set_options_mask(cdev, 0);
3200 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3201 QDIO_DOING_ESTABLISH,0, 0,
3202 QDIO_ESTABLISH_TIMEOUT);
3203 if (result) {
3204 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
3205 QDIO_DOING_ESTABLISH,0,0,
3206 QDIO_ESTABLISH_TIMEOUT);
3207 sprintf(dbf_text,"eq:io%4x",result);
3208 QDIO_DBF_TEXT2(1,setup,dbf_text);
3209 if (result2) {
3210 sprintf(dbf_text,"eq:io%4x",result);
3211 QDIO_DBF_TEXT2(1,setup,dbf_text);
3212 }
3213 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3214 "returned %i, next try returned %i\n",
3215 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3216 result, result2);
3217 result=result2;
3218 if (result)
3219 ccw_device_set_timeout(cdev, 0);
3220 }
3221
3222 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3223
3224 if (result) {
3225 up(&irq_ptr->setting_up_sema);
3226 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3227 return result;
3228 }
3229
3230 /* Timeout is cared for already by using ccw_device_start_timeout(). */
3231 wait_event_interruptible(cdev->private->wait_q,
3232 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3233 irq_ptr->state == QDIO_IRQ_STATE_ERR);
3234
3235 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3236 result = 0;
3237 else {
3238 up(&irq_ptr->setting_up_sema);
3239 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3240 return -EIO;
3241 }
3242
3243 qdio_get_ssqd_information(irq_ptr);
3244 /* if this gets set once, we're running under VM and can omit SVSes */
3245 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3246 omit_svs=1;
3247
3248 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3249 QDIO_DBF_TEXT2(0,setup,dbf_text);
3250
3251 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3252 QDIO_DBF_TEXT2(0,setup,dbf_text);
3253
3254 irq_ptr->hydra_gives_outbound_pcis=
3255 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3256 irq_ptr->sync_done_on_outb_pcis=
3257 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3258
3259 qdio_initialize_set_siga_flags_input(irq_ptr);
3260 qdio_initialize_set_siga_flags_output(irq_ptr);
3261
3262 up(&irq_ptr->setting_up_sema);
3263
3264 return result;
3265
3266 }
3267
3268 int
3269 qdio_activate(struct ccw_device *cdev, int flags)
3270 {
3271 struct qdio_irq *irq_ptr;
3272 int i,result=0,result2;
3273 unsigned long saveflags;
3274 char dbf_text[20]; /* see qdio_initialize */
3275
3276 irq_ptr = cdev->private->qdio_data;
3277 if (!irq_ptr)
3278 return -ENODEV;
3279
3280 if (cdev->private->state != DEV_STATE_ONLINE)
3281 return -EINVAL;
3282
3283 down(&irq_ptr->setting_up_sema);
3284 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3285 result=-EBUSY;
3286 goto out;
3287 }
3288
3289 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3290 QDIO_DBF_TEXT2(0,setup,dbf_text);
3291 QDIO_DBF_TEXT2(0,trace,dbf_text);
3292
3293 /* activate q */
3294 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3295 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3296 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3297 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3298
3299 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3300
3301 ccw_device_set_timeout(cdev, 0);
3302 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3303 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3304 0, DOIO_DENY_PREFETCH);
3305 if (result) {
3306 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3307 QDIO_DOING_ACTIVATE,0,0);
3308 sprintf(dbf_text,"aq:io%4x",result);
3309 QDIO_DBF_TEXT2(1,setup,dbf_text);
3310 if (result2) {
3311 sprintf(dbf_text,"aq:io%4x",result);
3312 QDIO_DBF_TEXT2(1,setup,dbf_text);
3313 }
3314 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3315 "returned %i, next try returned %i\n",
3316 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3317 result, result2);
3318 result=result2;
3319 }
3320
3321 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3322 if (result)
3323 goto out;
3324
3325 for (i=0;i<irq_ptr->no_input_qs;i++) {
3326 if (irq_ptr->is_thinint_irq) {
3327 /*
3328 * that way we know, that, if we will get interrupted
3329 * by tiqdio_inbound_processing, qdio_unmark_q will
3330 * not be called
3331 */
3332 qdio_reserve_q(irq_ptr->input_qs[i]);
3333 qdio_mark_tiq(irq_ptr->input_qs[i]);
3334 qdio_release_q(irq_ptr->input_qs[i]);
3335 }
3336 }
3337
3338 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3339 for (i=0;i<irq_ptr->no_input_qs;i++) {
3340 irq_ptr->input_qs[i]->is_input_q|=
3341 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3342 }
3343 }
3344
3345 wait_event_interruptible_timeout(cdev->private->wait_q,
3346 ((irq_ptr->state ==
3347 QDIO_IRQ_STATE_STOPPED) ||
3348 (irq_ptr->state ==
3349 QDIO_IRQ_STATE_ERR)),
3350 QDIO_ACTIVATE_TIMEOUT);
3351
3352 switch (irq_ptr->state) {
3353 case QDIO_IRQ_STATE_STOPPED:
3354 case QDIO_IRQ_STATE_ERR:
3355 up(&irq_ptr->setting_up_sema);
3356 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3357 down(&irq_ptr->setting_up_sema);
3358 result = -EIO;
3359 break;
3360 default:
3361 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3362 result = 0;
3363 }
3364 out:
3365 up(&irq_ptr->setting_up_sema);
3366
3367 return result;
3368 }
3369
3370 /* buffers filled forwards again to make Rick happy */
3371 static void
3372 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3373 unsigned int count, struct qdio_buffer *buffers)
3374 {
3375 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3376 int tmp = 0;
3377
3378 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3379 if (irq->is_qebsm) {
3380 while (count) {
3381 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3382 if (!tmp)
3383 return;
3384 }
3385 return;
3386 }
3387 for (;;) {
3388 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3389 count--;
3390 if (!count) break;
3391 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3392 }
3393 }
3394
3395 static void
3396 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3397 unsigned int count, struct qdio_buffer *buffers)
3398 {
3399 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3400 int tmp = 0;
3401
3402 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3403 if (irq->is_qebsm) {
3404 while (count) {
3405 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3406 if (!tmp)
3407 return;
3408 }
3409 return;
3410 }
3411
3412 for (;;) {
3413 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3414 count--;
3415 if (!count) break;
3416 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3417 }
3418 }
3419
3420 static void
3421 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3422 unsigned int qidx, unsigned int count,
3423 struct qdio_buffer *buffers)
3424 {
3425 int used_elements;
3426
3427 /* This is the inbound handling of queues */
3428 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3429
3430 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3431
3432 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3433 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3434 atomic_xchg(&q->polling,0);
3435
3436 if (used_elements)
3437 return;
3438 if (callflags&QDIO_FLAG_DONT_SIGA)
3439 return;
3440 if (q->siga_in) {
3441 int result;
3442
3443 result=qdio_siga_input(q);
3444 if (result) {
3445 if (q->siga_error)
3446 q->error_status_flags|=
3447 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3448 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3449 q->siga_error=result;
3450 }
3451 }
3452
3453 qdio_mark_q(q);
3454 }
3455
3456 static void
3457 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3458 unsigned int qidx, unsigned int count,
3459 struct qdio_buffer *buffers)
3460 {
3461 int used_elements;
3462 unsigned int cnt, start_buf;
3463 unsigned char state = 0;
3464 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3465
3466 /* This is the outbound handling of queues */
3467 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3468
3469 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3470
3471 if (callflags&QDIO_FLAG_DONT_SIGA) {
3472 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3473 return;
3474 }
3475 if (callflags & QDIO_FLAG_PCI_OUT)
3476 q->is_pci_out = 1;
3477 else
3478 q->is_pci_out = 0;
3479 if (q->is_iqdio_q) {
3480 /* one siga for every sbal */
3481 while (count--)
3482 qdio_kick_outbound_q(q);
3483
3484 __qdio_outbound_processing(q);
3485 } else {
3486 /* under VM, we do a SIGA sync unconditionally */
3487 SYNC_MEMORY;
3488 else {
3489 /*
3490 * w/o shadow queues (else branch of
3491 * SYNC_MEMORY :-/ ), we try to
3492 * fast-requeue buffers
3493 */
3494 if (irq->is_qebsm) {
3495 cnt = 1;
3496 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3497 (QDIO_MAX_BUFFERS_PER_Q-1));
3498 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3499 } else
3500 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3501 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3502 if (state != SLSB_CU_OUTPUT_PRIMED) {
3503 qdio_kick_outbound_q(q);
3504 } else {
3505 QDIO_DBF_TEXT3(0,trace, "fast-req");
3506 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3507 }
3508 }
3509 /*
3510 * only marking the q could take too long,
3511 * the upper layer module could do a lot of
3512 * traffic in that time
3513 */
3514 __qdio_outbound_processing(q);
3515 }
3516
3517 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3518 }
3519
3520 /* count must be 1 in iqdio */
3521 int
3522 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3523 unsigned int queue_number, unsigned int qidx,
3524 unsigned int count,struct qdio_buffer *buffers)
3525 {
3526 struct qdio_irq *irq_ptr;
3527 #ifdef CONFIG_QDIO_DEBUG
3528 char dbf_text[20];
3529
3530 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3531 QDIO_DBF_TEXT3(0,trace,dbf_text);
3532 #endif /* CONFIG_QDIO_DEBUG */
3533
3534 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3535 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3536 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3537 return -EINVAL;
3538
3539 if (count==0)
3540 return 0;
3541
3542 irq_ptr = cdev->private->qdio_data;
3543 if (!irq_ptr)
3544 return -ENODEV;
3545
3546 #ifdef CONFIG_QDIO_DEBUG
3547 if (callflags&QDIO_FLAG_SYNC_INPUT)
3548 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3549 sizeof(void*));
3550 else
3551 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3552 sizeof(void*));
3553 sprintf(dbf_text,"flag%04x",callflags);
3554 QDIO_DBF_TEXT3(0,trace,dbf_text);
3555 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3556 QDIO_DBF_TEXT3(0,trace,dbf_text);
3557 #endif /* CONFIG_QDIO_DEBUG */
3558
3559 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3560 return -EBUSY;
3561
3562 if (callflags&QDIO_FLAG_SYNC_INPUT)
3563 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3564 callflags, qidx, count, buffers);
3565 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3566 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3567 callflags, qidx, count, buffers);
3568 else {
3569 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3570 return -EINVAL;
3571 }
3572 return 0;
3573 }
3574
3575 static int
3576 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3577 int buffer_length, int *eof, void *data)
3578 {
3579 int c=0;
3580
3581 /* we are always called with buffer_length=4k, so we all
3582 deliver on the first read */
3583 if (offset>0)
3584 return 0;
3585
3586 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3587 #ifdef CONFIG_64BIT
3588 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3589 (long)atomic64_read(&perf_stats.tl_runs));
3590 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3591 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3592 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3593 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3594 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3595 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3596 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3597 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3598 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3599 _OUTP_IT("\n");
3600 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3601 (long)atomic64_read(&perf_stats.siga_syncs));
3602 _OUTP_IT("Number of SIGA in's issued : %li\n",
3603 (long)atomic64_read(&perf_stats.siga_ins));
3604 _OUTP_IT("Number of SIGA out's issued : %li\n",
3605 (long)atomic64_read(&perf_stats.siga_outs));
3606 _OUTP_IT("Number of PCIs caught : %li\n",
3607 (long)atomic64_read(&perf_stats.pcis));
3608 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3609 (long)atomic64_read(&perf_stats.thinints));
3610 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3611 (long)atomic64_read(&perf_stats.fast_reqs));
3612 _OUTP_IT("\n");
3613 _OUTP_IT("Number of inbound transfers : %li\n",
3614 (long)atomic64_read(&perf_stats.inbound_cnt));
3615 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3616 (long)atomic64_read(&perf_stats.outbound_cnt));
3617 #else /* CONFIG_64BIT */
3618 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3619 atomic_read(&perf_stats.tl_runs));
3620 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3621 atomic_read(&perf_stats.inbound_tl_runs),
3622 atomic_read(&perf_stats.inbound_tl_runs_resched));
3623 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3624 atomic_read(&perf_stats.inbound_thin_tl_runs),
3625 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3626 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3627 atomic_read(&perf_stats.outbound_tl_runs),
3628 atomic_read(&perf_stats.outbound_tl_runs_resched));
3629 _OUTP_IT("\n");
3630 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3631 atomic_read(&perf_stats.siga_syncs));
3632 _OUTP_IT("Number of SIGA in's issued : %i\n",
3633 atomic_read(&perf_stats.siga_ins));
3634 _OUTP_IT("Number of SIGA out's issued : %i\n",
3635 atomic_read(&perf_stats.siga_outs));
3636 _OUTP_IT("Number of PCIs caught : %i\n",
3637 atomic_read(&perf_stats.pcis));
3638 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3639 atomic_read(&perf_stats.thinints));
3640 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3641 atomic_read(&perf_stats.fast_reqs));
3642 _OUTP_IT("\n");
3643 _OUTP_IT("Number of inbound transfers : %i\n",
3644 atomic_read(&perf_stats.inbound_cnt));
3645 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3646 atomic_read(&perf_stats.outbound_cnt));
3647 #endif /* CONFIG_64BIT */
3648 _OUTP_IT("\n");
3649
3650 return c;
3651 }
3652
3653 static struct proc_dir_entry *qdio_perf_proc_file;
3654
3655 static void
3656 qdio_add_procfs_entry(void)
3657 {
3658 proc_perf_file_registration=0;
3659 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3660 S_IFREG|0444,&proc_root);
3661 if (qdio_perf_proc_file) {
3662 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3663 } else proc_perf_file_registration=-1;
3664
3665 if (proc_perf_file_registration)
3666 QDIO_PRINT_WARN("was not able to register perf. " \
3667 "proc-file (%i).\n",
3668 proc_perf_file_registration);
3669 }
3670
3671 static void
3672 qdio_remove_procfs_entry(void)
3673 {
3674 if (!proc_perf_file_registration) /* means if it went ok earlier */
3675 remove_proc_entry(QDIO_PERF,&proc_root);
3676 }
3677
3678 /**
3679 * attributes in sysfs
3680 *****************************************************************************/
3681
3682 static ssize_t
3683 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3684 {
3685 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3686 }
3687
3688 static ssize_t
3689 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3690 {
3691 char *tmp;
3692 int i;
3693
3694 i = simple_strtoul(buf, &tmp, 16);
3695 if ((i == 0) || (i == 1)) {
3696 if (i == qdio_performance_stats)
3697 return count;
3698 qdio_performance_stats = i;
3699 if (i==0) {
3700 /* reset perf. stat. info */
3701 #ifdef CONFIG_64BIT
3702 atomic64_set(&perf_stats.tl_runs, 0);
3703 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3704 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3705 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3706 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3707 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3708 0);
3709 atomic64_set(&perf_stats.siga_outs, 0);
3710 atomic64_set(&perf_stats.siga_ins, 0);
3711 atomic64_set(&perf_stats.siga_syncs, 0);
3712 atomic64_set(&perf_stats.pcis, 0);
3713 atomic64_set(&perf_stats.thinints, 0);
3714 atomic64_set(&perf_stats.fast_reqs, 0);
3715 atomic64_set(&perf_stats.outbound_cnt, 0);
3716 atomic64_set(&perf_stats.inbound_cnt, 0);
3717 #else /* CONFIG_64BIT */
3718 atomic_set(&perf_stats.tl_runs, 0);
3719 atomic_set(&perf_stats.outbound_tl_runs, 0);
3720 atomic_set(&perf_stats.inbound_tl_runs, 0);
3721 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3722 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3723 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3724 atomic_set(&perf_stats.siga_outs, 0);
3725 atomic_set(&perf_stats.siga_ins, 0);
3726 atomic_set(&perf_stats.siga_syncs, 0);
3727 atomic_set(&perf_stats.pcis, 0);
3728 atomic_set(&perf_stats.thinints, 0);
3729 atomic_set(&perf_stats.fast_reqs, 0);
3730 atomic_set(&perf_stats.outbound_cnt, 0);
3731 atomic_set(&perf_stats.inbound_cnt, 0);
3732 #endif /* CONFIG_64BIT */
3733 }
3734 } else {
3735 QDIO_PRINT_WARN("QDIO performance_stats: write 0 or 1 to this file!\n");
3736 return -EINVAL;
3737 }
3738 return count;
3739 }
3740
3741 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3742 qdio_performance_stats_store);
3743
3744 static void
3745 tiqdio_register_thinints(void)
3746 {
3747 char dbf_text[20];
3748 register_thinint_result=
3749 s390_register_adapter_interrupt(&tiqdio_thinint_handler);
3750 if (register_thinint_result) {
3751 sprintf(dbf_text,"regthn%x",(register_thinint_result&0xff));
3752 QDIO_DBF_TEXT0(0,setup,dbf_text);
3753 QDIO_PRINT_ERR("failed to register adapter handler " \
3754 "(rc=%i).\nAdapter interrupts might " \
3755 "not work. Continuing.\n",
3756 register_thinint_result);
3757 }
3758 }
3759
3760 static void
3761 tiqdio_unregister_thinints(void)
3762 {
3763 if (!register_thinint_result)
3764 s390_unregister_adapter_interrupt(&tiqdio_thinint_handler);
3765 }
3766
3767 static int
3768 qdio_get_qdio_memory(void)
3769 {
3770 int i;
3771 indicator_used[0]=1;
3772
3773 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3774 indicator_used[i]=0;
3775 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3776 GFP_KERNEL);
3777 if (!indicators)
3778 return -ENOMEM;
3779 return 0;
3780 }
3781
3782 static void
3783 qdio_release_qdio_memory(void)
3784 {
3785 kfree(indicators);
3786 }
3787
3788
3789 static void
3790 qdio_unregister_dbf_views(void)
3791 {
3792 if (qdio_dbf_setup)
3793 debug_unregister(qdio_dbf_setup);
3794 if (qdio_dbf_sbal)
3795 debug_unregister(qdio_dbf_sbal);
3796 if (qdio_dbf_sense)
3797 debug_unregister(qdio_dbf_sense);
3798 if (qdio_dbf_trace)
3799 debug_unregister(qdio_dbf_trace);
3800 #ifdef CONFIG_QDIO_DEBUG
3801 if (qdio_dbf_slsb_out)
3802 debug_unregister(qdio_dbf_slsb_out);
3803 if (qdio_dbf_slsb_in)
3804 debug_unregister(qdio_dbf_slsb_in);
3805 #endif /* CONFIG_QDIO_DEBUG */
3806 }
3807
3808 static int
3809 qdio_register_dbf_views(void)
3810 {
3811 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3812 QDIO_DBF_SETUP_PAGES,
3813 QDIO_DBF_SETUP_NR_AREAS,
3814 QDIO_DBF_SETUP_LEN);
3815 if (!qdio_dbf_setup)
3816 goto oom;
3817 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3818 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3819
3820 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3821 QDIO_DBF_SBAL_PAGES,
3822 QDIO_DBF_SBAL_NR_AREAS,
3823 QDIO_DBF_SBAL_LEN);
3824 if (!qdio_dbf_sbal)
3825 goto oom;
3826
3827 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3828 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3829
3830 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3831 QDIO_DBF_SENSE_PAGES,
3832 QDIO_DBF_SENSE_NR_AREAS,
3833 QDIO_DBF_SENSE_LEN);
3834 if (!qdio_dbf_sense)
3835 goto oom;
3836
3837 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3838 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3839
3840 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3841 QDIO_DBF_TRACE_PAGES,
3842 QDIO_DBF_TRACE_NR_AREAS,
3843 QDIO_DBF_TRACE_LEN);
3844 if (!qdio_dbf_trace)
3845 goto oom;
3846
3847 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3848 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3849
3850 #ifdef CONFIG_QDIO_DEBUG
3851 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3852 QDIO_DBF_SLSB_OUT_PAGES,
3853 QDIO_DBF_SLSB_OUT_NR_AREAS,
3854 QDIO_DBF_SLSB_OUT_LEN);
3855 if (!qdio_dbf_slsb_out)
3856 goto oom;
3857 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3858 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3859
3860 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3861 QDIO_DBF_SLSB_IN_PAGES,
3862 QDIO_DBF_SLSB_IN_NR_AREAS,
3863 QDIO_DBF_SLSB_IN_LEN);
3864 if (!qdio_dbf_slsb_in)
3865 goto oom;
3866 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3867 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3868 #endif /* CONFIG_QDIO_DEBUG */
3869 return 0;
3870 oom:
3871 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3872 qdio_unregister_dbf_views();
3873 return -ENOMEM;
3874 }
3875
3876 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3877 {
3878 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3879 }
3880
3881 static void qdio_mempool_free(void *element, void *size)
3882 {
3883 free_page((unsigned long) element);
3884 }
3885
3886 static int __init
3887 init_QDIO(void)
3888 {
3889 int res;
3890 void *ptr;
3891
3892 printk("qdio: loading %s\n",version);
3893
3894 res=qdio_get_qdio_memory();
3895 if (res)
3896 return res;
3897
3898 res = qdio_register_dbf_views();
3899 if (res)
3900 return res;
3901
3902 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3903 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3904
3905 memset((void*)&perf_stats,0,sizeof(perf_stats));
3906 QDIO_DBF_TEXT0(0,setup,"perfstat");
3907 ptr=&perf_stats;
3908 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3909
3910 qdio_add_procfs_entry();
3911
3912 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3913 qdio_mempool_alloc,
3914 qdio_mempool_free, NULL);
3915
3916 if (tiqdio_check_chsc_availability())
3917 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3918
3919 tiqdio_register_thinints();
3920
3921 return 0;
3922 }
3923
3924 static void __exit
3925 cleanup_QDIO(void)
3926 {
3927 tiqdio_unregister_thinints();
3928 qdio_remove_procfs_entry();
3929 qdio_release_qdio_memory();
3930 qdio_unregister_dbf_views();
3931 mempool_destroy(qdio_mempool_scssc);
3932 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3933 printk("qdio: %s: module removed\n",version);
3934 }
3935
3936 module_init(init_QDIO);
3937 module_exit(cleanup_QDIO);
3938
3939 EXPORT_SYMBOL(qdio_allocate);
3940 EXPORT_SYMBOL(qdio_establish);
3941 EXPORT_SYMBOL(qdio_initialize);
3942 EXPORT_SYMBOL(qdio_activate);
3943 EXPORT_SYMBOL(do_QDIO);
3944 EXPORT_SYMBOL(qdio_shutdown);
3945 EXPORT_SYMBOL(qdio_free);
3946 EXPORT_SYMBOL(qdio_cleanup);
3947 EXPORT_SYMBOL(qdio_synchronize);
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