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[PATCH] atmel_serial: Pass fixed register mappings through platform_data
[pv_ops_mirror.git] / arch / arm / mach-at91rm9200 / devices.c
blob059824376629db538a6306e56bee80b9dbaeeb69
1 /*
2 * arch/arm/mach-at91rm9200/devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/platform_device.h>
17
18 #include <asm/hardware.h>
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21
22 #include "generic.h"
23
24 #define SZ_512 0x00000200
25 #define SZ_256 0x00000100
26 #define SZ_16 0x00000010
27
28 /* --------------------------------------------------------------------
29 * USB Host
30 * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = 0xffffffffUL;
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource at91_usbh_resources[] = {
37 [0] = {
38 .start = AT91RM9200_UHP_BASE,
39 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = AT91RM9200_ID_UHP,
44 .end = AT91RM9200_ID_UHP,
45 .flags = IORESOURCE_IRQ,
46 },
47 };
48
49 static struct platform_device at91rm9200_usbh_device = {
50 .name = "at91_ohci",
51 .id = -1,
52 .dev = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data,
56 },
57 .resource = at91_usbh_resources,
58 .num_resources = ARRAY_SIZE(at91_usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63 if (!data)
64 return;
65
66 usbh_data = *data;
67 platform_device_register(&at91rm9200_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75 * USB Device (Gadget)
76 * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource at91_udc_resources[] = {
82 [0] = {
83 .start = AT91RM9200_BASE_UDP,
84 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = AT91RM9200_ID_UDP,
89 .end = AT91RM9200_ID_UDP,
90 .flags = IORESOURCE_IRQ,
91 },
92 };
93
94 static struct platform_device at91rm9200_udc_device = {
95 .name = "at91_udc",
96 .id = -1,
97 .dev = {
98 .platform_data = &udc_data,
99 },
100 .resource = at91_udc_resources,
101 .num_resources = ARRAY_SIZE(at91_udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106 if (!data)
107 return;
108
109 if (data->vbus_pin) {
110 at91_set_gpio_input(data->vbus_pin, 0);
111 at91_set_deglitch(data->vbus_pin, 1);
112 }
113 if (data->pullup_pin)
114 at91_set_gpio_output(data->pullup_pin, 0);
115
116 udc_data = *data;
117 platform_device_register(&at91rm9200_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125 * Ethernet
126 * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
129 static u64 eth_dmamask = 0xffffffffUL;
130 static struct at91_eth_data eth_data;
131
132 static struct resource at91_eth_resources[] = {
133 [0] = {
134 .start = AT91_VA_BASE_EMAC,
135 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = AT91RM9200_ID_EMAC,
140 .end = AT91RM9200_ID_EMAC,
141 .flags = IORESOURCE_IRQ,
142 },
143 };
144
145 static struct platform_device at91rm9200_eth_device = {
146 .name = "at91_ether",
147 .id = -1,
148 .dev = {
149 .dma_mask = &eth_dmamask,
150 .coherent_dma_mask = 0xffffffff,
151 .platform_data = &eth_data,
152 },
153 .resource = at91_eth_resources,
154 .num_resources = ARRAY_SIZE(at91_eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159 if (!data)
160 return;
161
162 if (data->phy_irq_pin) {
163 at91_set_gpio_input(data->phy_irq_pin, 0);
164 at91_set_deglitch(data->phy_irq_pin, 1);
165 }
166
167 /* Pins used for MII and RMII */
168 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
169 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
170 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
171 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
172 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
173 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
174 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
175 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
176 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
177 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
178
179 if (!data->is_rmii) {
180 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
181 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
182 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
183 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
184 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
185 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
186 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
187 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
188 }
189
190 eth_data = *data;
191 platform_device_register(&at91rm9200_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199 * Compact Flash / PCMCIA
200 * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203 static struct at91_cf_data cf_data;
204
205 static struct resource at91_cf_resources[] = {
206 [0] = {
207 .start = AT91_CF_BASE,
208 /* ties up CS4, CS5 and CS6 */
209 .end = AT91_CF_BASE + (0x30000000 - 1),
210 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
211 },
212 };
213
214 static struct platform_device at91rm9200_cf_device = {
215 .name = "at91_cf",
216 .id = -1,
217 .dev = {
218 .platform_data = &cf_data,
219 },
220 .resource = at91_cf_resources,
221 .num_resources = ARRAY_SIZE(at91_cf_resources),
222 };
223
224 void __init at91_add_device_cf(struct at91_cf_data *data)
225 {
226 if (!data)
227 return;
228
229 /* input/irq */
230 if (data->irq_pin) {
231 at91_set_gpio_input(data->irq_pin, 1);
232 at91_set_deglitch(data->irq_pin, 1);
233 }
234 at91_set_gpio_input(data->det_pin, 1);
235 at91_set_deglitch(data->det_pin, 1);
236
237 /* outputs, initially off */
238 if (data->vcc_pin)
239 at91_set_gpio_output(data->vcc_pin, 0);
240 at91_set_gpio_output(data->rst_pin, 0);
241
242 /* force poweron defaults for these pins ... */
243 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
244 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
245 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
246 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
247
248 cf_data = *data;
249 platform_device_register(&at91rm9200_cf_device);
250 }
251 #else
252 void __init at91_add_device_cf(struct at91_cf_data *data) {}
253 #endif
254
255
256 /* --------------------------------------------------------------------
257 * MMC / SD
258 * -------------------------------------------------------------------- */
259
260 #if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
261 static u64 mmc_dmamask = 0xffffffffUL;
262 static struct at91_mmc_data mmc_data;
263
264 static struct resource at91_mmc_resources[] = {
265 [0] = {
266 .start = AT91RM9200_BASE_MCI,
267 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
268 .flags = IORESOURCE_MEM,
269 },
270 [1] = {
271 .start = AT91RM9200_ID_MCI,
272 .end = AT91RM9200_ID_MCI,
273 .flags = IORESOURCE_IRQ,
274 },
275 };
276
277 static struct platform_device at91rm9200_mmc_device = {
278 .name = "at91_mci",
279 .id = -1,
280 .dev = {
281 .dma_mask = &mmc_dmamask,
282 .coherent_dma_mask = 0xffffffff,
283 .platform_data = &mmc_data,
284 },
285 .resource = at91_mmc_resources,
286 .num_resources = ARRAY_SIZE(at91_mmc_resources),
287 };
288
289 void __init at91_add_device_mmc(struct at91_mmc_data *data)
290 {
291 if (!data)
292 return;
293
294 /* input/irq */
295 if (data->det_pin) {
296 at91_set_gpio_input(data->det_pin, 1);
297 at91_set_deglitch(data->det_pin, 1);
298 }
299 if (data->wp_pin)
300 at91_set_gpio_input(data->wp_pin, 1);
301
302 /* CLK */
303 at91_set_A_periph(AT91_PIN_PA27, 0);
304
305 if (data->is_b) {
306 /* CMD */
307 at91_set_B_periph(AT91_PIN_PA8, 0);
308
309 /* DAT0, maybe DAT1..DAT3 */
310 at91_set_B_periph(AT91_PIN_PA9, 0);
311 if (data->wire4) {
312 at91_set_B_periph(AT91_PIN_PA10, 0);
313 at91_set_B_periph(AT91_PIN_PA11, 0);
314 at91_set_B_periph(AT91_PIN_PA12, 0);
315 }
316 } else {
317 /* CMD */
318 at91_set_A_periph(AT91_PIN_PA28, 0);
319
320 /* DAT0, maybe DAT1..DAT3 */
321 at91_set_A_periph(AT91_PIN_PA29, 0);
322 if (data->wire4) {
323 at91_set_B_periph(AT91_PIN_PB3, 0);
324 at91_set_B_periph(AT91_PIN_PB4, 0);
325 at91_set_B_periph(AT91_PIN_PB5, 0);
326 }
327 }
328
329 mmc_data = *data;
330 platform_device_register(&at91rm9200_mmc_device);
331 }
332 #else
333 void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
334 #endif
335
336
337 /* --------------------------------------------------------------------
338 * NAND / SmartMedia
339 * -------------------------------------------------------------------- */
340
341 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
342 static struct at91_nand_data nand_data;
343
344 static struct resource at91_nand_resources[] = {
345 {
346 .start = AT91_SMARTMEDIA_BASE,
347 .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
348 .flags = IORESOURCE_MEM,
349 }
350 };
351
352 static struct platform_device at91_nand_device = {
353 .name = "at91_nand",
354 .id = -1,
355 .dev = {
356 .platform_data = &nand_data,
357 },
358 .resource = at91_nand_resources,
359 .num_resources = ARRAY_SIZE(at91_nand_resources),
360 };
361
362 void __init at91_add_device_nand(struct at91_nand_data *data)
363 {
364 if (!data)
365 return;
366
367 /* enable pin */
368 if (data->enable_pin)
369 at91_set_gpio_output(data->enable_pin, 1);
370
371 /* ready/busy pin */
372 if (data->rdy_pin)
373 at91_set_gpio_input(data->rdy_pin, 1);
374
375 /* card detect pin */
376 if (data->det_pin)
377 at91_set_gpio_input(data->det_pin, 1);
378
379 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
380 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
381
382 nand_data = *data;
383 platform_device_register(&at91_nand_device);
384 }
385 #else
386 void __init at91_add_device_nand(struct at91_nand_data *data) {}
387 #endif
388
389
390 /* --------------------------------------------------------------------
391 * TWI (i2c)
392 * -------------------------------------------------------------------- */
393
394 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
395 static struct platform_device at91rm9200_twi_device = {
396 .name = "at91_i2c",
397 .id = -1,
398 .num_resources = 0,
399 };
400
401 void __init at91_add_device_i2c(void)
402 {
403 /* pins used for TWI interface */
404 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
405 at91_set_multi_drive(AT91_PIN_PA25, 1);
406
407 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
408 at91_set_multi_drive(AT91_PIN_PA26, 1);
409
410 platform_device_register(&at91rm9200_twi_device);
411 }
412 #else
413 void __init at91_add_device_i2c(void) {}
414 #endif
415
416
417 /* --------------------------------------------------------------------
418 * SPI
419 * -------------------------------------------------------------------- */
420
421 #if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
422 static u64 spi_dmamask = 0xffffffffUL;
423
424 static struct resource at91_spi_resources[] = {
425 [0] = {
426 .start = AT91RM9200_BASE_SPI,
427 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 [1] = {
431 .start = AT91RM9200_ID_SPI,
432 .end = AT91RM9200_ID_SPI,
433 .flags = IORESOURCE_IRQ,
434 },
435 };
436
437 static struct platform_device at91rm9200_spi_device = {
438 .name = "at91_spi",
439 .id = 0,
440 .dev = {
441 .dma_mask = &spi_dmamask,
442 .coherent_dma_mask = 0xffffffff,
443 },
444 .resource = at91_spi_resources,
445 .num_resources = ARRAY_SIZE(at91_spi_resources),
446 };
447
448 static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
449
450 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
451 {
452 int i;
453 unsigned long cs_pin;
454
455 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
456 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
457 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
458
459 /* Enable SPI chip-selects */
460 for (i = 0; i < nr_devices; i++) {
461 if (devices[i].controller_data)
462 cs_pin = (unsigned long) devices[i].controller_data;
463 else
464 cs_pin = at91_spi_standard_cs[devices[i].chip_select];
465
466 #ifdef CONFIG_SPI_AT91_MANUAL_CS
467 at91_set_gpio_output(cs_pin, 1);
468 #else
469 at91_set_A_periph(cs_pin, 0);
470 #endif
471
472 /* pass chip-select pin to driver */
473 devices[i].controller_data = (void *) cs_pin;
474 }
475
476 spi_register_board_info(devices, nr_devices);
477 at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
478 platform_device_register(&at91rm9200_spi_device);
479 }
480 #else
481 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
482 #endif
483
484
485 /* --------------------------------------------------------------------
486 * RTC
487 * -------------------------------------------------------------------- */
488
489 #if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
490 static struct platform_device at91rm9200_rtc_device = {
491 .name = "at91_rtc",
492 .id = -1,
493 .num_resources = 0,
494 };
495
496 static void __init at91_add_device_rtc(void)
497 {
498 platform_device_register(&at91rm9200_rtc_device);
499 }
500 #else
501 static void __init at91_add_device_rtc(void) {}
502 #endif
503
504
505 /* --------------------------------------------------------------------
506 * Watchdog
507 * -------------------------------------------------------------------- */
508
509 #if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
510 static struct platform_device at91rm9200_wdt_device = {
511 .name = "at91_wdt",
512 .id = -1,
513 .num_resources = 0,
514 };
515
516 static void __init at91_add_device_watchdog(void)
517 {
518 platform_device_register(&at91rm9200_wdt_device);
519 }
520 #else
521 static void __init at91_add_device_watchdog(void) {}
522 #endif
523
524
525 /* --------------------------------------------------------------------
526 * LEDs
527 * -------------------------------------------------------------------- */
528
529 #if defined(CONFIG_LEDS)
530 u8 at91_leds_cpu;
531 u8 at91_leds_timer;
532
533 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
534 {
535 at91_leds_cpu = cpu_led;
536 at91_leds_timer = timer_led;
537 }
538 #else
539 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
540 #endif
541
542
543 /* --------------------------------------------------------------------
544 * UART
545 * -------------------------------------------------------------------- */
546
547 #if defined(CONFIG_SERIAL_ATMEL)
548 static struct resource dbgu_resources[] = {
549 [0] = {
550 .start = AT91_VA_BASE_SYS + AT91_DBGU,
551 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
552 .flags = IORESOURCE_MEM,
553 },
554 [1] = {
555 .start = AT91_ID_SYS,
556 .end = AT91_ID_SYS,
557 .flags = IORESOURCE_IRQ,
558 },
559 };
560
561 static struct atmel_uart_data dbgu_data = {
562 .use_dma_tx = 0,
563 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
564 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
565 };
566
567 static struct platform_device at91rm9200_dbgu_device = {
568 .name = "atmel_usart",
569 .id = 0,
570 .dev = {
571 .platform_data = &dbgu_data,
572 .coherent_dma_mask = 0xffffffff,
573 },
574 .resource = dbgu_resources,
575 .num_resources = ARRAY_SIZE(dbgu_resources),
576 };
577
578 static inline void configure_dbgu_pins(void)
579 {
580 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
581 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
582 }
583
584 static struct resource uart0_resources[] = {
585 [0] = {
586 .start = AT91RM9200_BASE_US0,
587 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
588 .flags = IORESOURCE_MEM,
589 },
590 [1] = {
591 .start = AT91RM9200_ID_US0,
592 .end = AT91RM9200_ID_US0,
593 .flags = IORESOURCE_IRQ,
594 },
595 };
596
597 static struct atmel_uart_data uart0_data = {
598 .use_dma_tx = 1,
599 .use_dma_rx = 1,
600 };
601
602 static struct platform_device at91rm9200_uart0_device = {
603 .name = "atmel_usart",
604 .id = 1,
605 .dev = {
606 .platform_data = &uart0_data,
607 .coherent_dma_mask = 0xffffffff,
608 },
609 .resource = uart0_resources,
610 .num_resources = ARRAY_SIZE(uart0_resources),
611 };
612
613 static inline void configure_usart0_pins(void)
614 {
615 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
616 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
617 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
618
619 /*
620 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
621 * We need to drive the pin manually. Default is off (RTS is active low).
622 */
623 at91_set_gpio_output(AT91_PIN_PA21, 1);
624 }
625
626 static struct resource uart1_resources[] = {
627 [0] = {
628 .start = AT91RM9200_BASE_US1,
629 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
630 .flags = IORESOURCE_MEM,
631 },
632 [1] = {
633 .start = AT91RM9200_ID_US1,
634 .end = AT91RM9200_ID_US1,
635 .flags = IORESOURCE_IRQ,
636 },
637 };
638
639 static struct atmel_uart_data uart1_data = {
640 .use_dma_tx = 1,
641 .use_dma_rx = 1,
642 };
643
644 static struct platform_device at91rm9200_uart1_device = {
645 .name = "atmel_usart",
646 .id = 2,
647 .dev = {
648 .platform_data = &uart1_data,
649 .coherent_dma_mask = 0xffffffff,
650 },
651 .resource = uart1_resources,
652 .num_resources = ARRAY_SIZE(uart1_resources),
653 };
654
655 static inline void configure_usart1_pins(void)
656 {
657 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
658 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
659 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
660 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
661 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
662 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
663 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
664 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
665 }
666
667 static struct resource uart2_resources[] = {
668 [0] = {
669 .start = AT91RM9200_BASE_US2,
670 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
671 .flags = IORESOURCE_MEM,
672 },
673 [1] = {
674 .start = AT91RM9200_ID_US2,
675 .end = AT91RM9200_ID_US2,
676 .flags = IORESOURCE_IRQ,
677 },
678 };
679
680 static struct atmel_uart_data uart2_data = {
681 .use_dma_tx = 1,
682 .use_dma_rx = 1,
683 };
684
685 static struct platform_device at91rm9200_uart2_device = {
686 .name = "atmel_usart",
687 .id = 3,
688 .dev = {
689 .platform_data = &uart2_data,
690 .coherent_dma_mask = 0xffffffff,
691 },
692 .resource = uart2_resources,
693 .num_resources = ARRAY_SIZE(uart2_resources),
694 };
695
696 static inline void configure_usart2_pins(void)
697 {
698 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
699 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
700 }
701
702 static struct resource uart3_resources[] = {
703 [0] = {
704 .start = AT91RM9200_BASE_US3,
705 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
706 .flags = IORESOURCE_MEM,
707 },
708 [1] = {
709 .start = AT91RM9200_ID_US3,
710 .end = AT91RM9200_ID_US3,
711 .flags = IORESOURCE_IRQ,
712 },
713 };
714
715 static struct atmel_uart_data uart3_data = {
716 .use_dma_tx = 1,
717 .use_dma_rx = 1,
718 };
719
720 static struct platform_device at91rm9200_uart3_device = {
721 .name = "atmel_usart",
722 .id = 4,
723 .dev = {
724 .platform_data = &uart3_data,
725 .coherent_dma_mask = 0xffffffff,
726 },
727 .resource = uart3_resources,
728 .num_resources = ARRAY_SIZE(uart3_resources),
729 };
730
731 static inline void configure_usart3_pins(void)
732 {
733 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
734 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
735 }
736
737 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
738 struct platform_device *atmel_default_console_device; /* the serial console device */
739
740 void __init at91_init_serial(struct at91_uart_config *config)
741 {
742 int i;
743
744 /* Fill in list of supported UARTs */
745 for (i = 0; i < config->nr_tty; i++) {
746 switch (config->tty_map[i]) {
747 case 0:
748 configure_usart0_pins();
749 at91_uarts[i] = &at91rm9200_uart0_device;
750 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
751 break;
752 case 1:
753 configure_usart1_pins();
754 at91_uarts[i] = &at91rm9200_uart1_device;
755 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
756 break;
757 case 2:
758 configure_usart2_pins();
759 at91_uarts[i] = &at91rm9200_uart2_device;
760 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
761 break;
762 case 3:
763 configure_usart3_pins();
764 at91_uarts[i] = &at91rm9200_uart3_device;
765 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
766 break;
767 case 4:
768 configure_dbgu_pins();
769 at91_uarts[i] = &at91rm9200_dbgu_device;
770 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
771 break;
772 default:
773 continue;
774 }
775 at91_uarts[i]->id = i; /* update ID number to mapped ID */
776 }
777
778 /* Set serial console device */
779 if (config->console_tty < ATMEL_MAX_UART)
780 atmel_default_console_device = at91_uarts[config->console_tty];
781 if (!atmel_default_console_device)
782 printk(KERN_INFO "AT91: No default serial console defined.\n");
783 }
784
785 void __init at91_add_device_serial(void)
786 {
787 int i;
788
789 for (i = 0; i < ATMEL_MAX_UART; i++) {
790 if (at91_uarts[i])
791 platform_device_register(at91_uarts[i]);
792 }
793 }
794 #else
795 void __init at91_init_serial(struct at91_uart_config *config) {}
796 void __init at91_add_device_serial(void) {}
797 #endif
798
799
800 /* -------------------------------------------------------------------- */
801
802 /*
803 * These devices are always present and don't need any board-specific
804 * setup.
805 */
806 static int __init at91_add_standard_devices(void)
807 {
808 at91_add_device_rtc();
809 at91_add_device_watchdog();
810 return 0;
811 }
812
813 arch_initcall(at91_add_standard_devices);
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