arch/ppc/platforms/4xx/ebony.h

   1 /*
   2  * Ebony board definitions
   3  *
   4  * Matt Porter <mporter@mvista.com>
   5  *
   6  * Copyright 2002 MontaVista Software Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #ifdef __KERNEL__
  15 #ifndef __ASM_EBONY_H__
  16 #define __ASM_EBONY_H__
  17
  18 #include <platforms/4xx/ibm440gp.h>
  19
  20 /* F/W TLB mapping used in bootloader glue to reset EMAC */
  21 #define PPC44x_EMAC0_MR0        0xE0000800
  22
  23 /* Where to find the MAC info */
  24 #define OPENBIOS_MAC_BASE       0xfffffe0c
  25 #define OPENBIOS_MAC_OFFSET     0x0c
  26
  27 /* Default clock rates for Rev. B and Rev. C silicon */
  28 #define EBONY_440GP_RB_SYSCLK   33000000
  29 #define EBONY_440GP_RC_SYSCLK   400000000
  30
  31 /* RTC/NVRAM location */
  32 #define EBONY_RTC_ADDR          0x0000000148000000ULL
  33 #define EBONY_RTC_SIZE          0x2000
  34
  35 /* Flash */
  36 #define EBONY_FPGA_ADDR         0x0000000148300000ULL
  37 #define EBONY_BOOT_SMALL_FLASH(x)       (x & 0x20)
  38 #define EBONY_ONBRD_FLASH_EN(x)         (x & 0x02)
  39 #define EBONY_FLASH_SEL(x)              (x & 0x01)
  40 #define EBONY_SMALL_FLASH_LOW1  0x00000001ff800000ULL
  41 #define EBONY_SMALL_FLASH_LOW2  0x00000001ff880000ULL
  42 #define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL
  43 #define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL
  44 #define EBONY_SMALL_FLASH_SIZE  0x80000
  45 #define EBONY_LARGE_FLASH_LOW   0x00000001ff800000ULL
  46 #define EBONY_LARGE_FLASH_HIGH  0x00000001ffc00000ULL
  47 #define EBONY_LARGE_FLASH_SIZE  0x400000
  48
  49 #define EBONY_SMALL_FLASH_BASE  0x00000001fff80000ULL
  50 #define EBONY_LARGE_FLASH_BASE  0x00000001ff800000ULL
  51
  52 /*
  53  * Serial port defines
  54  */
  55
  56 #if defined(__BOOTER__)
  57 /* OpenBIOS defined UART mappings, used by bootloader shim */
  58 #define UART0_IO_BASE   0xE0000200
  59 #define UART1_IO_BASE   0xE0000300
  60 #else
  61 /* head_44x.S created UART mapping, used before early_serial_setup.
  62  * We cannot use default OpenBIOS UART mappings because they
  63  * don't work for configurations with more than 512M RAM.    --ebs
  64  */
  65 #define UART0_IO_BASE   0xF0000200
  66 #define UART1_IO_BASE   0xF0000300
  67 #endif
  68
  69 /* external Epson SG-615P */
  70 #define BASE_BAUD       691200
  71
  72 #define STD_UART_OP(num)                                        \
  73         { 0, BASE_BAUD, 0, UART##num##_INT,                     \
  74                 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),        \
  75                 iomem_base: (void*)UART##num##_IO_BASE,         \
  76                 io_type: SERIAL_IO_MEM},
  77
  78 #define SERIAL_PORT_DFNS        \
  79         STD_UART_OP(0)          \
  80         STD_UART_OP(1)
  81
  82 /* PCI support */
  83 #define EBONY_PCI_LOWER_IO      0x00000000
  84 #define EBONY_PCI_UPPER_IO      0x0000ffff
  85 #define EBONY_PCI_LOWER_MEM     0x80002000
  86 #define EBONY_PCI_UPPER_MEM     0xffffefff
  87
  88 #define EBONY_PCI_CFGREGS_BASE  0x000000020ec00000
  89 #define EBONY_PCI_CFGA_PLB32    0x0ec00000
  90 #define EBONY_PCI_CFGD_PLB32    0x0ec00004
  91
  92 #define EBONY_PCI_IO_BASE       0x0000000208000000ULL
  93 #define EBONY_PCI_IO_SIZE       0x00010000
  94 #define EBONY_PCI_MEM_OFFSET    0x00000000
  95
  96 #endif                          /* __ASM_EBONY_H__ */
  97 #endif                          /* __KERNEL__ */