ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / arch / x86 / kernel / genapic_flat_64.c
blob1a9c68845ee8c8538e6b6e6f1c04d5d4a19fb9be
1 /*
2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
5 * Flat APIC subarch code.
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9 * James Cleverdon.
11 #include <linux/errno.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/init.h>
18 #include <asm/smp.h>
19 #include <asm/ipi.h>
20 #include <asm/genapic.h>
22 static cpumask_t flat_target_cpus(void)
24 return cpu_online_map;
27 static cpumask_t flat_vector_allocation_domain(int cpu)
29 /* Careful. Some cpus do not strictly honor the set of cpus
30 * specified in the interrupt destination when using lowest
31 * priority interrupt delivery mode.
33 * In particular there was a hyperthreading cpu observed to
34 * deliver interrupts to the wrong hyperthread when only one
35 * hyperthread was specified in the interrupt desitination.
37 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
38 return domain;
42 * Set up the logical destination ID.
44 * Intel recommends to set DFR, LDR and TPR before enabling
45 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
46 * document number 292116). So here it goes...
48 static void flat_init_apic_ldr(void)
50 unsigned long val;
51 unsigned long num, id;
53 num = smp_processor_id();
54 id = 1UL << num;
55 apic_write(APIC_DFR, APIC_DFR_FLAT);
56 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
57 val |= SET_APIC_LOGICAL_ID(id);
58 apic_write(APIC_LDR, val);
61 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
63 unsigned long mask = cpus_addr(cpumask)[0];
64 unsigned long flags;
66 local_irq_save(flags);
67 __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
68 local_irq_restore(flags);
71 static void flat_send_IPI_allbutself(int vector)
73 #ifdef CONFIG_HOTPLUG_CPU
74 int hotplug = 1;
75 #else
76 int hotplug = 0;
77 #endif
78 if (hotplug || vector == NMI_VECTOR) {
79 cpumask_t allbutme = cpu_online_map;
81 cpu_clear(smp_processor_id(), allbutme);
83 if (!cpus_empty(allbutme))
84 flat_send_IPI_mask(allbutme, vector);
85 } else if (num_online_cpus() > 1) {
86 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
90 static void flat_send_IPI_all(int vector)
92 if (vector == NMI_VECTOR)
93 flat_send_IPI_mask(cpu_online_map, vector);
94 else
95 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
98 static int flat_apic_id_registered(void)
100 return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map);
103 static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
105 return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
108 static unsigned int phys_pkg_id(int index_msb)
110 return hard_smp_processor_id() >> index_msb;
113 struct genapic apic_flat = {
114 .name = "flat",
115 .int_delivery_mode = dest_LowestPrio,
116 .int_dest_mode = (APIC_DEST_LOGICAL != 0),
117 .target_cpus = flat_target_cpus,
118 .vector_allocation_domain = flat_vector_allocation_domain,
119 .apic_id_registered = flat_apic_id_registered,
120 .init_apic_ldr = flat_init_apic_ldr,
121 .send_IPI_all = flat_send_IPI_all,
122 .send_IPI_allbutself = flat_send_IPI_allbutself,
123 .send_IPI_mask = flat_send_IPI_mask,
124 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
125 .phys_pkg_id = phys_pkg_id,
129 * Physflat mode is used when there are more than 8 CPUs on a AMD system.
130 * We cannot use logical delivery in this case because the mask
131 * overflows, so use physical mode.
134 static cpumask_t physflat_target_cpus(void)
136 return cpu_online_map;
139 static cpumask_t physflat_vector_allocation_domain(int cpu)
141 return cpumask_of_cpu(cpu);
144 static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
146 send_IPI_mask_sequence(cpumask, vector);
149 static void physflat_send_IPI_allbutself(int vector)
151 cpumask_t allbutme = cpu_online_map;
153 cpu_clear(smp_processor_id(), allbutme);
154 physflat_send_IPI_mask(allbutme, vector);
157 static void physflat_send_IPI_all(int vector)
159 physflat_send_IPI_mask(cpu_online_map, vector);
162 static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
164 int cpu;
167 * We're using fixed IRQ delivery, can only return one phys APIC ID.
168 * May as well be the first.
170 cpu = first_cpu(cpumask);
171 if ((unsigned)cpu < NR_CPUS)
172 return per_cpu(x86_cpu_to_apicid, cpu);
173 else
174 return BAD_APICID;
177 struct genapic apic_physflat = {
178 .name = "physical flat",
179 .int_delivery_mode = dest_Fixed,
180 .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
181 .target_cpus = physflat_target_cpus,
182 .vector_allocation_domain = physflat_vector_allocation_domain,
183 .apic_id_registered = flat_apic_id_registered,
184 .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
185 .send_IPI_all = physflat_send_IPI_all,
186 .send_IPI_allbutself = physflat_send_IPI_allbutself,
187 .send_IPI_mask = physflat_send_IPI_mask,
188 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
189 .phys_pkg_id = phys_pkg_id,