ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / net / wireless / rt2x00 / rt2x00reg.h
blob0325bed2fbf599c7207efdd5ee44cf808aabecf4
1 /*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00
23 Abstract: rt2x00 generic register information.
26 #ifndef RT2X00REG_H
27 #define RT2X00REG_H
30 * TX result flags.
32 enum tx_status {
33 TX_SUCCESS = 0,
34 TX_SUCCESS_RETRY = 1,
35 TX_FAIL_RETRY = 2,
36 TX_FAIL_INVALID = 3,
37 TX_FAIL_OTHER = 4,
41 * Antenna values
43 enum antenna {
44 ANTENNA_SW_DIVERSITY = 0,
45 ANTENNA_A = 1,
46 ANTENNA_B = 2,
47 ANTENNA_HW_DIVERSITY = 3,
51 * Led mode values.
53 enum led_mode {
54 LED_MODE_DEFAULT = 0,
55 LED_MODE_TXRX_ACTIVITY = 1,
56 LED_MODE_SIGNAL_STRENGTH = 2,
57 LED_MODE_ASUS = 3,
58 LED_MODE_ALPHA = 4,
62 * TSF sync values
64 enum tsf_sync {
65 TSF_SYNC_NONE = 0,
66 TSF_SYNC_INFRA = 1,
67 TSF_SYNC_BEACON = 2,
71 * Device states
73 enum dev_state {
74 STATE_DEEP_SLEEP = 0,
75 STATE_SLEEP = 1,
76 STATE_STANDBY = 2,
77 STATE_AWAKE = 3,
80 * Additional device states, these values are
81 * not strict since they are not directly passed
82 * into the device.
84 STATE_RADIO_ON,
85 STATE_RADIO_OFF,
86 STATE_RADIO_RX_ON,
87 STATE_RADIO_RX_OFF,
88 STATE_RADIO_RX_ON_LINK,
89 STATE_RADIO_RX_OFF_LINK,
90 STATE_RADIO_IRQ_ON,
91 STATE_RADIO_IRQ_OFF,
95 * IFS backoff values
97 enum ifs {
98 IFS_BACKOFF = 0,
99 IFS_SIFS = 1,
100 IFS_NEW_BACKOFF = 2,
101 IFS_NONE = 3,
105 * Cipher types for hardware encryption
107 enum cipher {
108 CIPHER_NONE = 0,
109 CIPHER_WEP64 = 1,
110 CIPHER_WEP128 = 2,
111 CIPHER_TKIP = 3,
112 CIPHER_AES = 4,
114 * The following fields were added by rt61pci and rt73usb.
116 CIPHER_CKIP64 = 5,
117 CIPHER_CKIP128 = 6,
118 CIPHER_TKIP_NO_MIC = 7,
122 * Register handlers.
123 * We store the position of a register field inside a field structure,
124 * This will simplify the process of setting and reading a certain field
125 * inside the register while making sure the process remains byte order safe.
127 struct rt2x00_field8 {
128 u8 bit_offset;
129 u8 bit_mask;
132 struct rt2x00_field16 {
133 u16 bit_offset;
134 u16 bit_mask;
137 struct rt2x00_field32 {
138 u32 bit_offset;
139 u32 bit_mask;
143 * Power of two check, this will check
144 * if the mask that has been given contains
145 * and contiguous set of bits.
147 #define is_power_of_two(x) ( !((x) & ((x)-1)) )
148 #define low_bit_mask(x) ( ((x)-1) & ~(x) )
149 #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x))
151 #define FIELD8(__mask) \
152 ({ \
153 BUILD_BUG_ON(!(__mask) || \
154 !is_valid_mask(__mask) || \
155 (__mask) != (u8)(__mask)); \
156 (struct rt2x00_field8) { \
157 __ffs(__mask), (__mask) \
158 }; \
161 #define FIELD16(__mask) \
162 ({ \
163 BUILD_BUG_ON(!(__mask) || \
164 !is_valid_mask(__mask) || \
165 (__mask) != (u16)(__mask));\
166 (struct rt2x00_field16) { \
167 __ffs(__mask), (__mask) \
168 }; \
171 #define FIELD32(__mask) \
172 ({ \
173 BUILD_BUG_ON(!(__mask) || \
174 !is_valid_mask(__mask) || \
175 (__mask) != (u32)(__mask));\
176 (struct rt2x00_field32) { \
177 __ffs(__mask), (__mask) \
178 }; \
181 static inline void rt2x00_set_field32(u32 *reg,
182 const struct rt2x00_field32 field,
183 const u32 value)
185 *reg &= ~(field.bit_mask);
186 *reg |= (value << field.bit_offset) & field.bit_mask;
189 static inline u32 rt2x00_get_field32(const u32 reg,
190 const struct rt2x00_field32 field)
192 return (reg & field.bit_mask) >> field.bit_offset;
195 static inline void rt2x00_set_field16(u16 *reg,
196 const struct rt2x00_field16 field,
197 const u16 value)
199 *reg &= ~(field.bit_mask);
200 *reg |= (value << field.bit_offset) & field.bit_mask;
203 static inline u16 rt2x00_get_field16(const u16 reg,
204 const struct rt2x00_field16 field)
206 return (reg & field.bit_mask) >> field.bit_offset;
209 static inline void rt2x00_set_field8(u8 *reg,
210 const struct rt2x00_field8 field,
211 const u8 value)
213 *reg &= ~(field.bit_mask);
214 *reg |= (value << field.bit_offset) & field.bit_mask;
217 static inline u8 rt2x00_get_field8(const u8 reg,
218 const struct rt2x00_field8 field)
220 return (reg & field.bit_mask) >> field.bit_offset;
223 #endif /* RT2X00REG_H */