ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / include / asm-sh / microdev.h
blob1aed15856e11ff5bae72b2522f94f816084e0dee
1 /*
2 * linux/include/asm-sh/microdev.h
4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
6 * Definitions for the SuperH SH4-202 MicroDev board.
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
11 #ifndef __ASM_SH_MICRODEV_H
12 #define __ASM_SH_MICRODEV_H
14 extern void init_microdev_irq(void);
15 extern void microdev_print_fpga_intc_status(void);
18 * The following are useful macros for manipulating the interrupt
19 * controller (INTC) on the CPU-board FPGA. should be noted that there
20 * is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
21 * these are two different things, both of which need to be prorammed to
22 * correctly route - unfortunately, they have the same name and
23 * abbreviations!
25 #define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
26 #define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
27 #define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
28 #define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
29 #define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
30 #define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
31 #define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */
32 #define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */
33 #define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */
37 * The following are the IRQ numbers for the Linux Kernel for external
38 * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'.
40 #define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
41 #define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */
42 #define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */
43 #define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
44 #define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */
45 #define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
46 #define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */
47 #define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */
50 * The following are the IRQ numbers for the INTC on the FPGA for
51 * external interrupts. i.e. the bits in the INTC registers in the
52 * FPGA.
54 #define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
55 #define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */
56 #define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
57 #define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
58 #define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */
59 #define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */
60 #define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */
61 #define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */
63 #define MICRODEV_IRQ_PCI_INTA 8
64 #define MICRODEV_IRQ_PCI_INTB 9
65 #define MICRODEV_IRQ_PCI_INTC 10
66 #define MICRODEV_IRQ_PCI_INTD 11
68 #define __IO_PREFIX microdev
69 #include <asm/io_generic.h>
71 #if defined(CONFIG_PCI)
72 unsigned char microdev_pci_inb(unsigned long port);
73 unsigned short microdev_pci_inw(unsigned long port);
74 unsigned long microdev_pci_inl(unsigned long port);
75 void microdev_pci_outb(unsigned char data, unsigned long port);
76 void microdev_pci_outw(unsigned short data, unsigned long port);
77 void microdev_pci_outl(unsigned long data, unsigned long port);
78 #endif
80 #endif /* __ASM_SH_MICRODEV_H */