[POWERPC] ptrace shouldn't touch FP exec mode
[pv_ops_mirror.git] / include / asm-parisc / mmzone.h
blob9608d2cf214ac7d33d76661b6bff10cc9dad00c1
1 #ifndef _PARISC_MMZONE_H
2 #define _PARISC_MMZONE_H
4 #ifdef CONFIG_DISCONTIGMEM
6 #define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7 extern int npmem_ranges;
9 struct node_map_data {
10 pg_data_t pg_data;
13 extern struct node_map_data node_data[];
15 #define NODE_DATA(nid) (&node_data[nid].pg_data)
17 #define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18 #define node_end_pfn(nid) \
19 ({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
24 /* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256
27 * Stretch (N-class): 0-2, 4-32, 34-xxx
30 /* Since each 1GB can only belong to one region (node), we can create
31 * an index table for pfn to nid lookup; each entry in pfnnid_map
32 * represents 1GB, and contains the node that the memory belongs to. */
34 #define PFNNID_SHIFT (30 - PAGE_SHIFT)
35 #define PFNNID_MAP_MAX 512 /* support 512GB */
36 extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
38 #ifndef CONFIG_64BIT
39 #define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
40 #else
41 /* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
42 #define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
43 #endif
45 static inline int pfn_to_nid(unsigned long pfn)
47 unsigned int i;
48 unsigned char r;
50 if (unlikely(pfn_is_io(pfn)))
51 return 0;
53 i = pfn >> PFNNID_SHIFT;
54 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0]));
55 r = pfnnid_map[i];
56 BUG_ON(r == 0xff);
58 return (int)r;
61 static inline int pfn_valid(int pfn)
63 int nid = pfn_to_nid(pfn);
65 if (nid >= 0)
66 return (pfn < node_end_pfn(nid));
67 return 0;
70 #else /* !CONFIG_DISCONTIGMEM */
71 #define MAX_PHYSMEM_RANGES 1
72 #endif
73 #endif /* _PARISC_MMZONE_H */