drivers/net/netxen/netxen_nic_phan_reg.h

   1 /*
   2  * Copyright (C) 2003 - 2006 NetXen, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18  * MA  02111-1307, USA.
  19  *
  20  * The full GNU General Public License is included in this distribution
  21  * in the file called LICENSE.
  22  *
  23  * Contact Information:
  24  *    info@netxen.com
  25  * NetXen,
  26  * 3965 Freedom Circle, Fourth floor,
  27  * Santa Clara, CA 95054
  28  */
  29
  30 #ifndef __NIC_PHAN_REG_H_
  31 #define __NIC_PHAN_REG_H_
  32
  33 /*
  34  * CRB Registers or queue message done only at initialization time.
  35  */
  36 #define NIC_CRB_BASE               NETXEN_CAM_RAM(0x200)
  37 #define NETXEN_NIC_REG(X)             (NIC_CRB_BASE+(X))
  38
  39 #define CRB_PHAN_CNTRL_LO_OFFSET    NETXEN_NIC_REG(0x00)
  40 #define CRB_PHAN_CNTRL_HI_OFFSET    NETXEN_NIC_REG(0x04)
  41 #define CRB_CMD_PRODUCER_OFFSET     NETXEN_NIC_REG(0x08)
  42 #define CRB_CMD_CONSUMER_OFFSET     NETXEN_NIC_REG(0x0c)
  43 #define CRB_PAUSE_ADDR_LO           NETXEN_NIC_REG(0x10)        /* C0 EPG BUG  */
  44 #define CRB_PAUSE_ADDR_HI           NETXEN_NIC_REG(0x14)
  45 #define CRB_HOST_CMD_ADDR_HI        NETXEN_NIC_REG(0x18)        /* host add:cmd ring */
  46 #define CRB_HOST_CMD_ADDR_LO        NETXEN_NIC_REG(0x1c)
  47 #define CRB_CMD_INTR_LOOP           NETXEN_NIC_REG(0x20)        /* 4 regs for perf */
  48 #define CRB_CMD_DMA_LOOP            NETXEN_NIC_REG(0x24)
  49 #define CRB_RCV_INTR_LOOP           NETXEN_NIC_REG(0x28)
  50 #define CRB_RCV_DMA_LOOP            NETXEN_NIC_REG(0x2c)
  51 #define CRB_ENABLE_TX_INTR          NETXEN_NIC_REG(0x30)        /* phantom init status */
  52 #define CRB_MMAP_ADDR_3             NETXEN_NIC_REG(0x34)
  53 #define CRB_CMDPEG_CMDRING          NETXEN_NIC_REG(0x38)
  54 #define CRB_HOST_DUMMY_BUF_ADDR_HI  NETXEN_NIC_REG(0x3c)
  55 #define CRB_HOST_DUMMY_BUF_ADDR_LO  NETXEN_NIC_REG(0x40)
  56 #define CRB_MMAP_ADDR_0             NETXEN_NIC_REG(0x44)
  57 #define CRB_MMAP_ADDR_1             NETXEN_NIC_REG(0x48)
  58 #define CRB_MMAP_ADDR_2             NETXEN_NIC_REG(0x4c)
  59 #define CRB_CMDPEG_STATE            NETXEN_NIC_REG(0x50)
  60 #define CRB_MMAP_SIZE_0             NETXEN_NIC_REG(0x54)
  61 #define CRB_MMAP_SIZE_1             NETXEN_NIC_REG(0x58)
  62 #define CRB_MMAP_SIZE_2             NETXEN_NIC_REG(0x5c)
  63 #define CRB_MMAP_SIZE_3             NETXEN_NIC_REG(0x60)
  64 #define CRB_GLOBAL_INT_COAL         NETXEN_NIC_REG(0x64)        /* interrupt coalescing */
  65 #define CRB_INT_COAL_MODE           NETXEN_NIC_REG(0x68)
  66 #define CRB_MAX_RCV_BUFS            NETXEN_NIC_REG(0x6c)
  67 #define CRB_TX_INT_THRESHOLD        NETXEN_NIC_REG(0x70)
  68 #define CRB_RX_PKT_TIMER            NETXEN_NIC_REG(0x74)
  69 #define CRB_TX_PKT_TIMER            NETXEN_NIC_REG(0x78)
  70 #define CRB_RX_PKT_CNT              NETXEN_NIC_REG(0x7c)
  71 #define CRB_RX_TMR_CNT              NETXEN_NIC_REG(0x80)
  72 #define CRB_RX_LRO_TIMER            NETXEN_NIC_REG(0x84)
  73 #define CRB_RX_LRO_MID_TIMER        NETXEN_NIC_REG(0x88)
  74 #define CRB_DMA_MAX_RCV_BUFS        NETXEN_NIC_REG(0x8c)
  75 #define CRB_MAX_DMA_ENTRIES         NETXEN_NIC_REG(0x90)
  76 #define CRB_XG_STATE                NETXEN_NIC_REG(0x94)        /* XG Link status */
  77 #define CRB_AGENT_GO                NETXEN_NIC_REG(0x98)        /* NIC pkt gen agent */
  78 #define CRB_AGENT_TX_SIZE           NETXEN_NIC_REG(0x9c)
  79 #define CRB_AGENT_TX_TYPE           NETXEN_NIC_REG(0xa0)
  80 #define CRB_AGENT_TX_ADDR           NETXEN_NIC_REG(0xa4)
  81 #define CRB_AGENT_TX_MSS            NETXEN_NIC_REG(0xa8)
  82 #define CRB_TX_STATE                NETXEN_NIC_REG(0xac)        /* Debug -performance */
  83 #define CRB_TX_COUNT                NETXEN_NIC_REG(0xb0)
  84 #define CRB_RX_STATE                NETXEN_NIC_REG(0xb4)
  85 #define CRB_RX_PERF_DEBUG_1         NETXEN_NIC_REG(0xb8)
  86 #define CRB_RX_LRO_CONTROL          NETXEN_NIC_REG(0xbc)        /* LRO On/OFF */
  87 #define CRB_RX_LRO_START_NUM        NETXEN_NIC_REG(0xc0)
  88 #define CRB_MPORT_MODE              NETXEN_NIC_REG(0xc4)        /* Multiport Mode */
  89 #define CRB_CMD_RING_SIZE           NETXEN_NIC_REG(0xc8)
  90 #define CRB_INT_VECTOR              NETXEN_NIC_REG(0xd4)
  91 #define CRB_CTX_RESET               NETXEN_NIC_REG(0xd8)
  92 #define CRB_HOST_STS_PROD           NETXEN_NIC_REG(0xdc)
  93 #define CRB_HOST_STS_CONS           NETXEN_NIC_REG(0xe0)
  94 #define CRB_PEG_CMD_PROD            NETXEN_NIC_REG(0xe4)
  95 #define CRB_PEG_CMD_CONS            NETXEN_NIC_REG(0xe8)
  96 #define CRB_HOST_BUFFER_PROD        NETXEN_NIC_REG(0xec)
  97 #define CRB_HOST_BUFFER_CONS        NETXEN_NIC_REG(0xf0)
  98 #define CRB_JUMBO_BUFFER_PROD       NETXEN_NIC_REG(0xf4)
  99 #define CRB_JUMBO_BUFFER_CONS       NETXEN_NIC_REG(0xf8)
 100
 101 #define CRB_CMD_PRODUCER_OFFSET_1   NETXEN_NIC_REG(0x1ac)
 102 #define CRB_CMD_CONSUMER_OFFSET_1   NETXEN_NIC_REG(0x1b0)
 103 #define CRB_CMD_PRODUCER_OFFSET_2   NETXEN_NIC_REG(0x1b8)
 104 #define CRB_CMD_CONSUMER_OFFSET_2   NETXEN_NIC_REG(0x1bc)
 105
 106 // 1c0 to 1cc used for signature reg
 107 #define CRB_CMD_PRODUCER_OFFSET_3   NETXEN_NIC_REG(0x1d0)
 108 #define CRB_CMD_CONSUMER_OFFSET_3   NETXEN_NIC_REG(0x1d4)
 109 #define CRB_TEMP_STATE              NETXEN_NIC_REG(0x1b4)
 110
 111 #define CRB_V2P_0                   NETXEN_NIC_REG(0x290)
 112 #define CRB_V2P_1                   NETXEN_NIC_REG(0x294)
 113 #define CRB_V2P_2                   NETXEN_NIC_REG(0x298)
 114 #define CRB_V2P_3                   NETXEN_NIC_REG(0x29c)
 115 #define CRB_V2P(port)               (CRB_V2P_0+((port)*4))
 116 #define CRB_DRIVER_VERSION          NETXEN_NIC_REG(0x2a0)
 117 /* sw int status/mask registers */
 118 #define CRB_SW_INT_MASK_0          NETXEN_NIC_REG(0x1d8)
 119 #define CRB_SW_INT_MASK_1          NETXEN_NIC_REG(0x1e0)
 120 #define CRB_SW_INT_MASK_2          NETXEN_NIC_REG(0x1e4)
 121 #define CRB_SW_INT_MASK_3          NETXEN_NIC_REG(0x1e8)
 122
 123 /*
 124  * capabilities register, can be used to selectively enable/disable features
 125  * for backward compability
 126  */
 127 #define CRB_NIC_CAPABILITIES_HOST       NETXEN_NIC_REG(0x1a8)
 128 #define CRB_NIC_CAPABILITIES_FW         NETXEN_NIC_REG(0x1dc)
 129
 130 #define INTR_SCHEME_PERPORT             0x1
 131
 132 /* used for ethtool tests */
 133 #define CRB_SCRATCHPAD_TEST         NETXEN_NIC_REG(0x280)
 134
 135 /*
 136  * CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
 137  * which can be read by the Phantom host to get producer/consumer indexes from
 138  * Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
 139  * registers will be used for the addresses of the ring's shared memory
 140  * on the Phantom.
 141  */
 142
 143 #define nx_get_temp_val(x)              ((x) >> 16)
 144 #define nx_get_temp_state(x)            ((x) & 0xffff)
 145 #define nx_encode_temp(val, state)      (((val) << 16) | (state))
 146
 147 /* CRB registers per Rcv Descriptor ring */
 148 struct netxen_rcv_desc_crb {
 149         u32 crb_rcv_producer_offset __attribute__ ((aligned(512)));
 150         u32 crb_rcv_consumer_offset;
 151         u32 crb_globalrcv_ring;
 152         u32 crb_rcv_ring_size;
 153 };
 154
 155 /*
 156  * CRB registers used by the receive peg logic.
 157  */
 158
 159 struct netxen_recv_crb {
 160         struct netxen_rcv_desc_crb rcv_desc_crb[NUM_RCV_DESC_RINGS];
 161         u32 crb_rcvstatus_ring;
 162         u32 crb_rcv_status_producer;
 163         u32 crb_rcv_status_consumer;
 164         u32 crb_rcvpeg_state;
 165         u32 crb_status_ring_size;
 166 };
 167
 168 #if defined(DEFINE_GLOBAL_RECV_CRB)
 169 #else
 170 extern struct netxen_recv_crb recv_crb_registers[];
 171 extern u64 ctx_addr_sig_regs[][3];
 172 #endif                          /* DEFINE_GLOBAL_RECEIVE_CRB */
 173 #define CRB_CTX_ADDR_REG_LO(FUNC_ID)            (ctx_addr_sig_regs[FUNC_ID][0])
 174 #define CRB_CTX_ADDR_REG_HI(FUNC_ID)            (ctx_addr_sig_regs[FUNC_ID][2])
 175 #define CRB_CTX_SIGNATURE_REG(FUNC_ID)          (ctx_addr_sig_regs[FUNC_ID][1])
 176
 177 /*
 178  * Temperature control.
 179  */
 180 enum {
 181         NX_TEMP_NORMAL = 0x1,   /* Normal operating range */
 182         NX_TEMP_WARN,           /* Sound alert, temperature getting high */
 183         NX_TEMP_PANIC           /* Fatal error, hardware has shut down. */
 184 };
 185
 186 #endif                          /* __NIC_PHAN_REG_H_ */