knfsd: nfsd4: simplify exp_pseudoroot arguments
[pv_ops_mirror.git] / drivers / serial / crisv10.c
blob312bef6bd583ce92d1382cfb8bbefbb0ba834f32
1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
9 * $Log: serial.c,v $
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
21 * Revision 1.22 2004/08/24 06:12:20 starvik
22 * Whitespace cleanup
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
27 * Revision 1.19 2004/05/17 13:12:15 starvik
28 * Kernel console hook
29 * Big merge from Linux 2.4 still pending.
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
47 * parity (mark/space)
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
93 * to make it work.
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
128 * latencies.
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
152 * char.
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
210 * where used.
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
219 * to 1
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
222 * serial driver.
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
247 * Spellling check
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
251 * Needed by USB
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
272 * Items worth noticing:
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
314 * do the work.
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
332 * * Indentation fix
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
356 * Support RS485
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
371 * * Removed old code
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
385 * 2.0.34 updates
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
397 * the input DMA.
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use IRQF_SHARED when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
426 static char *serial_version = "$Revision: 1.25 $";
428 #include <linux/types.h>
429 #include <linux/errno.h>
430 #include <linux/signal.h>
431 #include <linux/sched.h>
432 #include <linux/timer.h>
433 #include <linux/interrupt.h>
434 #include <linux/tty.h>
435 #include <linux/tty_flip.h>
436 #include <linux/major.h>
437 #include <linux/string.h>
438 #include <linux/fcntl.h>
439 #include <linux/mm.h>
440 #include <linux/slab.h>
441 #include <linux/init.h>
442 #include <asm/uaccess.h>
443 #include <linux/kernel.h>
444 #include <linux/mutex.h>
446 #include <asm/io.h>
447 #include <asm/irq.h>
448 #include <asm/system.h>
449 #include <asm/bitops.h>
450 #include <linux/delay.h>
452 #include <asm/arch/svinto.h>
454 /* non-arch dependent serial structures are in linux/serial.h */
455 #include <linux/serial.h>
456 /* while we keep our own stuff (struct e100_serial) in a local .h file */
457 #include "serial.h"
458 #include <asm/fasttimer.h>
460 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
461 #ifndef CONFIG_ETRAX_FAST_TIMER
462 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
463 #endif
464 #endif
466 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
467 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
468 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
469 #endif
471 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
472 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
473 #endif
476 * All of the compatibilty code so we can compile serial.c against
477 * older kernels is hidden in serial_compat.h
479 #if defined(LOCAL_HEADERS)
480 #include "serial_compat.h"
481 #endif
483 struct tty_driver *serial_driver;
485 /* serial subtype definitions */
486 #ifndef SERIAL_TYPE_NORMAL
487 #define SERIAL_TYPE_NORMAL 1
488 #endif
490 /* number of characters left in xmit buffer before we ask for more */
491 #define WAKEUP_CHARS 256
493 //#define SERIAL_DEBUG_INTR
494 //#define SERIAL_DEBUG_OPEN
495 //#define SERIAL_DEBUG_FLOW
496 //#define SERIAL_DEBUG_DATA
497 //#define SERIAL_DEBUG_THROTTLE
498 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
499 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
501 /* Enable this to use serial interrupts to handle when you
502 expect the first received event on the serial port to
503 be an error, break or similar. Used to be able to flash IRMA
504 from eLinux */
505 #define SERIAL_HANDLE_EARLY_ERRORS
507 /* Defined and used in n_tty.c, but we need it here as well */
508 #define TTY_THRESHOLD_THROTTLE 128
510 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
511 * must not be to high or flow control won't work if we leave it to the tty
512 * layer so we have our own throttling in flush_to_flip
513 * TTY_FLIPBUF_SIZE=512,
514 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
515 * BUF_SIZE can't be > 128
517 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
518 #define SERIAL_DESCR_BUF_SIZE 256
520 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
521 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
523 /* We don't want to load the system with massive fast timer interrupt
524 * on high baudrates so limit it to 250 us (4kHz) */
525 #define MIN_FLUSH_TIME_USEC 250
527 /* Add an x here to log a lot of timer stuff */
528 #define TIMERD(x)
529 /* Debug details of interrupt handling */
530 #define DINTR1(x) /* irq on/off, errors */
531 #define DINTR2(x) /* tx and rx */
532 /* Debug flip buffer stuff */
533 #define DFLIP(x)
534 /* Debug flow control and overview of data flow */
535 #define DFLOW(x)
536 #define DBAUD(x)
537 #define DLOG_INT_TRIG(x)
539 //#define DEBUG_LOG_INCLUDED
540 #ifndef DEBUG_LOG_INCLUDED
541 #define DEBUG_LOG(line, string, value)
542 #else
543 struct debug_log_info
545 unsigned long time;
546 unsigned long timer_data;
547 // int line;
548 const char *string;
549 int value;
551 #define DEBUG_LOG_SIZE 4096
553 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
554 int debug_log_pos = 0;
556 #define DEBUG_LOG(_line, _string, _value) do { \
557 if ((_line) == SERIAL_DEBUG_LINE) {\
558 debug_log_func(_line, _string, _value); \
560 }while(0)
562 void debug_log_func(int line, const char *string, int value)
564 if (debug_log_pos < DEBUG_LOG_SIZE) {
565 debug_log[debug_log_pos].time = jiffies;
566 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
567 // debug_log[debug_log_pos].line = line;
568 debug_log[debug_log_pos].string = string;
569 debug_log[debug_log_pos].value = value;
570 debug_log_pos++;
572 /*printk(string, value);*/
574 #endif
576 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
577 /* Default number of timer ticks before flushing rx fifo
578 * When using "little data, low latency applications: use 0
579 * When using "much data applications (PPP)" use ~5
581 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
582 #endif
584 unsigned long timer_data_to_ns(unsigned long timer_data);
586 static void change_speed(struct e100_serial *info);
587 static void rs_throttle(struct tty_struct * tty);
588 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
589 static int rs_write(struct tty_struct * tty, int from_user,
590 const unsigned char *buf, int count);
591 #ifdef CONFIG_ETRAX_RS485
592 static int e100_write_rs485(struct tty_struct * tty, int from_user,
593 const unsigned char *buf, int count);
594 #endif
595 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
598 #define DEF_BAUD 115200 /* 115.2 kbit/s */
599 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
600 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
601 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
602 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
604 /* offsets from R_SERIALx_CTRL */
606 #define REG_DATA 0
607 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
608 #define REG_TR_DATA 0
609 #define REG_STATUS 1
610 #define REG_TR_CTRL 1
611 #define REG_REC_CTRL 2
612 #define REG_BAUD 3
613 #define REG_XOFF 4 /* this is a 32 bit register */
615 /* The bitfields are the same for all serial ports */
616 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
617 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
618 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
619 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
620 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
622 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
624 /* Values for info->errorcode */
625 #define ERRCODE_SET_BREAK (TTY_BREAK)
626 #define ERRCODE_INSERT 0x100
627 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
629 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
632 * General note regarding the use of IO_* macros in this file:
634 * We will use the bits defined for DMA channel 6 when using various
635 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
636 * the same for all channels (which of course they are).
638 * We will also use the bits defined for serial port 0 when writing commands
639 * to the different ports, as these bits too are the same for all ports.
643 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
644 static const unsigned long e100_ser_int_mask = 0
645 #ifdef CONFIG_ETRAX_SERIAL_PORT0
646 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
647 #endif
648 #ifdef CONFIG_ETRAX_SERIAL_PORT1
649 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
650 #endif
651 #ifdef CONFIG_ETRAX_SERIAL_PORT2
652 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
653 #endif
654 #ifdef CONFIG_ETRAX_SERIAL_PORT3
655 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
656 #endif
658 unsigned long r_alt_ser_baudrate_shadow = 0;
660 /* this is the data for the four serial ports in the etrax100 */
661 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
662 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
664 static struct e100_serial rs_table[] = {
665 { .baud = DEF_BAUD,
666 .port = (unsigned char *)R_SERIAL0_CTRL,
667 .irq = 1U << 12, /* uses DMA 6 and 7 */
668 .oclrintradr = R_DMA_CH6_CLR_INTR,
669 .ofirstadr = R_DMA_CH6_FIRST,
670 .ocmdadr = R_DMA_CH6_CMD,
671 .ostatusadr = R_DMA_CH6_STATUS,
672 .iclrintradr = R_DMA_CH7_CLR_INTR,
673 .ifirstadr = R_DMA_CH7_FIRST,
674 .icmdadr = R_DMA_CH7_CMD,
675 .idescradr = R_DMA_CH7_DESCR,
676 .flags = STD_FLAGS,
677 .rx_ctrl = DEF_RX,
678 .tx_ctrl = DEF_TX,
679 .iseteop = 2,
680 #ifdef CONFIG_ETRAX_SERIAL_PORT0
681 .enabled = 1,
682 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
683 .dma_out_enabled = 1,
684 #else
685 .dma_out_enabled = 0,
686 #endif
687 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
688 .dma_in_enabled = 1,
689 #else
690 .dma_in_enabled = 0
691 #endif
692 #else
693 .enabled = 0,
694 .dma_out_enabled = 0,
695 .dma_in_enabled = 0
696 #endif
698 }, /* ttyS0 */
699 #ifndef CONFIG_SVINTO_SIM
700 { .baud = DEF_BAUD,
701 .port = (unsigned char *)R_SERIAL1_CTRL,
702 .irq = 1U << 16, /* uses DMA 8 and 9 */
703 .oclrintradr = R_DMA_CH8_CLR_INTR,
704 .ofirstadr = R_DMA_CH8_FIRST,
705 .ocmdadr = R_DMA_CH8_CMD,
706 .ostatusadr = R_DMA_CH8_STATUS,
707 .iclrintradr = R_DMA_CH9_CLR_INTR,
708 .ifirstadr = R_DMA_CH9_FIRST,
709 .icmdadr = R_DMA_CH9_CMD,
710 .idescradr = R_DMA_CH9_DESCR,
711 .flags = STD_FLAGS,
712 .rx_ctrl = DEF_RX,
713 .tx_ctrl = DEF_TX,
714 .iseteop = 3,
715 #ifdef CONFIG_ETRAX_SERIAL_PORT1
716 .enabled = 1,
717 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
718 .dma_out_enabled = 1,
719 #else
720 .dma_out_enabled = 0,
721 #endif
722 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
723 .dma_in_enabled = 1,
724 #else
725 .dma_in_enabled = 0
726 #endif
727 #else
728 .enabled = 0,
729 .dma_out_enabled = 0,
730 .dma_in_enabled = 0
731 #endif
732 }, /* ttyS1 */
734 { .baud = DEF_BAUD,
735 .port = (unsigned char *)R_SERIAL2_CTRL,
736 .irq = 1U << 4, /* uses DMA 2 and 3 */
737 .oclrintradr = R_DMA_CH2_CLR_INTR,
738 .ofirstadr = R_DMA_CH2_FIRST,
739 .ocmdadr = R_DMA_CH2_CMD,
740 .ostatusadr = R_DMA_CH2_STATUS,
741 .iclrintradr = R_DMA_CH3_CLR_INTR,
742 .ifirstadr = R_DMA_CH3_FIRST,
743 .icmdadr = R_DMA_CH3_CMD,
744 .idescradr = R_DMA_CH3_DESCR,
745 .flags = STD_FLAGS,
746 .rx_ctrl = DEF_RX,
747 .tx_ctrl = DEF_TX,
748 .iseteop = 0,
749 #ifdef CONFIG_ETRAX_SERIAL_PORT2
750 .enabled = 1,
751 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
752 .dma_out_enabled = 1,
753 #else
754 .dma_out_enabled = 0,
755 #endif
756 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
757 .dma_in_enabled = 1,
758 #else
759 .dma_in_enabled = 0
760 #endif
761 #else
762 .enabled = 0,
763 .dma_out_enabled = 0,
764 .dma_in_enabled = 0
765 #endif
766 }, /* ttyS2 */
768 { .baud = DEF_BAUD,
769 .port = (unsigned char *)R_SERIAL3_CTRL,
770 .irq = 1U << 8, /* uses DMA 4 and 5 */
771 .oclrintradr = R_DMA_CH4_CLR_INTR,
772 .ofirstadr = R_DMA_CH4_FIRST,
773 .ocmdadr = R_DMA_CH4_CMD,
774 .ostatusadr = R_DMA_CH4_STATUS,
775 .iclrintradr = R_DMA_CH5_CLR_INTR,
776 .ifirstadr = R_DMA_CH5_FIRST,
777 .icmdadr = R_DMA_CH5_CMD,
778 .idescradr = R_DMA_CH5_DESCR,
779 .flags = STD_FLAGS,
780 .rx_ctrl = DEF_RX,
781 .tx_ctrl = DEF_TX,
782 .iseteop = 1,
783 #ifdef CONFIG_ETRAX_SERIAL_PORT3
784 .enabled = 1,
785 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
786 .dma_out_enabled = 1,
787 #else
788 .dma_out_enabled = 0,
789 #endif
790 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
791 .dma_in_enabled = 1,
792 #else
793 .dma_in_enabled = 0
794 #endif
795 #else
796 .enabled = 0,
797 .dma_out_enabled = 0,
798 .dma_in_enabled = 0
799 #endif
800 } /* ttyS3 */
801 #endif
805 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
807 static struct ktermios *serial_termios[NR_PORTS];
808 static struct ktermios *serial_termios_locked[NR_PORTS];
809 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
810 static struct fast_timer fast_timers[NR_PORTS];
811 #endif
813 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
814 #define PROCSTAT(x) x
815 struct ser_statistics_type {
816 int overrun_cnt;
817 int early_errors_cnt;
818 int ser_ints_ok_cnt;
819 int errors_cnt;
820 unsigned long int processing_flip;
821 unsigned long processing_flip_still_room;
822 unsigned long int timeout_flush_cnt;
823 int rx_dma_ints;
824 int tx_dma_ints;
825 int rx_tot;
826 int tx_tot;
829 static struct ser_statistics_type ser_stat[NR_PORTS];
831 #else
833 #define PROCSTAT(x)
835 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
837 /* RS-485 */
838 #if defined(CONFIG_ETRAX_RS485)
839 #ifdef CONFIG_ETRAX_FAST_TIMER
840 static struct fast_timer fast_timers_rs485[NR_PORTS];
841 #endif
842 #if defined(CONFIG_ETRAX_RS485_ON_PA)
843 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
844 #endif
845 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
846 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
847 #endif
848 #endif
850 /* Info and macros needed for each ports extra control/status signals. */
851 #define E100_STRUCT_PORT(line, pinname) \
852 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
853 (R_PORT_PA_DATA): ( \
854 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
855 (R_PORT_PB_DATA):&dummy_ser[line]))
857 #define E100_STRUCT_SHADOW(line, pinname) \
858 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
859 (&port_pa_data_shadow): ( \
860 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
861 (&port_pb_data_shadow):&dummy_ser[line]))
862 #define E100_STRUCT_MASK(line, pinname) \
863 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
864 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
865 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
866 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
868 #define DUMMY_DTR_MASK 1
869 #define DUMMY_RI_MASK 2
870 #define DUMMY_DSR_MASK 4
871 #define DUMMY_CD_MASK 8
872 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
874 /* If not all status pins are used or disabled, use mixed mode */
875 #ifdef CONFIG_ETRAX_SERIAL_PORT0
877 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
879 #if SER0_PA_BITSUM != -4
880 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
881 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
882 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
883 # endif
884 # endif
885 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
886 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
887 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
888 # endif
889 # endif
890 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
891 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
892 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
893 # endif
894 # endif
895 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
896 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
897 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
898 # endif
899 # endif
900 #endif
902 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
904 #if SER0_PB_BITSUM != -4
905 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
906 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
907 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
908 # endif
909 # endif
910 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
911 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
912 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
913 # endif
914 # endif
915 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
916 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
917 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
918 # endif
919 # endif
920 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
921 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
922 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
923 # endif
924 # endif
925 #endif
927 #endif /* PORT0 */
930 #ifdef CONFIG_ETRAX_SERIAL_PORT1
932 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
934 #if SER1_PA_BITSUM != -4
935 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
936 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
937 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
938 # endif
939 # endif
940 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
941 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
942 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
943 # endif
944 # endif
945 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
946 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
947 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
948 # endif
949 # endif
950 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
951 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
952 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
953 # endif
954 # endif
955 #endif
957 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
959 #if SER1_PB_BITSUM != -4
960 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
961 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
962 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
963 # endif
964 # endif
965 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
966 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
967 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
968 # endif
969 # endif
970 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
971 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
972 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
973 # endif
974 # endif
975 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
976 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
977 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
978 # endif
979 # endif
980 #endif
982 #endif /* PORT1 */
984 #ifdef CONFIG_ETRAX_SERIAL_PORT2
986 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
988 #if SER2_PA_BITSUM != -4
989 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
990 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
991 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
992 # endif
993 # endif
994 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
995 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
996 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
997 # endif
998 # endif
999 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1000 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1001 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1002 # endif
1003 # endif
1004 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1005 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1006 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1007 # endif
1008 # endif
1009 #endif
1011 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1013 #if SER2_PB_BITSUM != -4
1014 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1015 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1016 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1017 # endif
1018 # endif
1019 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1020 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1021 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1022 # endif
1023 # endif
1024 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1025 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1026 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1027 # endif
1028 # endif
1029 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1030 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1031 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1032 # endif
1033 # endif
1034 #endif
1036 #endif /* PORT2 */
1038 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1040 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1042 #if SER3_PA_BITSUM != -4
1043 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1044 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1045 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1046 # endif
1047 # endif
1048 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1049 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1050 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1051 # endif
1052 # endif
1053 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1054 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1055 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1056 # endif
1057 # endif
1058 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1059 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1060 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1061 # endif
1062 # endif
1063 #endif
1065 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1067 #if SER3_PB_BITSUM != -4
1068 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1069 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1070 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1071 # endif
1072 # endif
1073 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1074 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1075 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1076 # endif
1077 # endif
1078 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1079 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1080 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1081 # endif
1082 # endif
1083 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1084 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1085 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1086 # endif
1087 # endif
1088 #endif
1090 #endif /* PORT3 */
1093 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1094 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1095 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1096 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1097 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1098 #endif
1100 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1101 /* The pins can be mixed on PA and PB */
1102 #define CONTROL_PINS_PORT_NOT_USED(line) \
1103 &dummy_ser[line], &dummy_ser[line], \
1104 &dummy_ser[line], &dummy_ser[line], \
1105 &dummy_ser[line], &dummy_ser[line], \
1106 &dummy_ser[line], &dummy_ser[line], \
1107 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1110 struct control_pins
1112 volatile unsigned char *dtr_port;
1113 unsigned char *dtr_shadow;
1114 volatile unsigned char *ri_port;
1115 unsigned char *ri_shadow;
1116 volatile unsigned char *dsr_port;
1117 unsigned char *dsr_shadow;
1118 volatile unsigned char *cd_port;
1119 unsigned char *cd_shadow;
1121 unsigned char dtr_mask;
1122 unsigned char ri_mask;
1123 unsigned char dsr_mask;
1124 unsigned char cd_mask;
1127 static const struct control_pins e100_modem_pins[NR_PORTS] =
1129 /* Ser 0 */
1131 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1132 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1133 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1134 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1135 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1136 E100_STRUCT_MASK(0,DTR),
1137 E100_STRUCT_MASK(0,RI),
1138 E100_STRUCT_MASK(0,DSR),
1139 E100_STRUCT_MASK(0,CD)
1140 #else
1141 CONTROL_PINS_PORT_NOT_USED(0)
1142 #endif
1145 /* Ser 1 */
1147 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1148 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1149 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1150 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1151 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1152 E100_STRUCT_MASK(1,DTR),
1153 E100_STRUCT_MASK(1,RI),
1154 E100_STRUCT_MASK(1,DSR),
1155 E100_STRUCT_MASK(1,CD)
1156 #else
1157 CONTROL_PINS_PORT_NOT_USED(1)
1158 #endif
1161 /* Ser 2 */
1163 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1164 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1165 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1166 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1167 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1168 E100_STRUCT_MASK(2,DTR),
1169 E100_STRUCT_MASK(2,RI),
1170 E100_STRUCT_MASK(2,DSR),
1171 E100_STRUCT_MASK(2,CD)
1172 #else
1173 CONTROL_PINS_PORT_NOT_USED(2)
1174 #endif
1177 /* Ser 3 */
1179 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1180 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1181 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1182 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1183 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1184 E100_STRUCT_MASK(3,DTR),
1185 E100_STRUCT_MASK(3,RI),
1186 E100_STRUCT_MASK(3,DSR),
1187 E100_STRUCT_MASK(3,CD)
1188 #else
1189 CONTROL_PINS_PORT_NOT_USED(3)
1190 #endif
1193 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1195 /* All pins are on either PA or PB for each serial port */
1196 #define CONTROL_PINS_PORT_NOT_USED(line) \
1197 &dummy_ser[line], &dummy_ser[line], \
1198 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1201 struct control_pins
1203 volatile unsigned char *port;
1204 unsigned char *shadow;
1206 unsigned char dtr_mask;
1207 unsigned char ri_mask;
1208 unsigned char dsr_mask;
1209 unsigned char cd_mask;
1212 #define dtr_port port
1213 #define dtr_shadow shadow
1214 #define ri_port port
1215 #define ri_shadow shadow
1216 #define dsr_port port
1217 #define dsr_shadow shadow
1218 #define cd_port port
1219 #define cd_shadow shadow
1221 static const struct control_pins e100_modem_pins[NR_PORTS] =
1223 /* Ser 0 */
1225 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1226 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1227 E100_STRUCT_MASK(0,DTR),
1228 E100_STRUCT_MASK(0,RI),
1229 E100_STRUCT_MASK(0,DSR),
1230 E100_STRUCT_MASK(0,CD)
1231 #else
1232 CONTROL_PINS_PORT_NOT_USED(0)
1233 #endif
1236 /* Ser 1 */
1238 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1239 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1240 E100_STRUCT_MASK(1,DTR),
1241 E100_STRUCT_MASK(1,RI),
1242 E100_STRUCT_MASK(1,DSR),
1243 E100_STRUCT_MASK(1,CD)
1244 #else
1245 CONTROL_PINS_PORT_NOT_USED(1)
1246 #endif
1249 /* Ser 2 */
1251 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1252 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1253 E100_STRUCT_MASK(2,DTR),
1254 E100_STRUCT_MASK(2,RI),
1255 E100_STRUCT_MASK(2,DSR),
1256 E100_STRUCT_MASK(2,CD)
1257 #else
1258 CONTROL_PINS_PORT_NOT_USED(2)
1259 #endif
1262 /* Ser 3 */
1264 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1265 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1266 E100_STRUCT_MASK(3,DTR),
1267 E100_STRUCT_MASK(3,RI),
1268 E100_STRUCT_MASK(3,DSR),
1269 E100_STRUCT_MASK(3,CD)
1270 #else
1271 CONTROL_PINS_PORT_NOT_USED(3)
1272 #endif
1275 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1277 #define E100_RTS_MASK 0x20
1278 #define E100_CTS_MASK 0x40
1280 /* All serial port signals are active low:
1281 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1282 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1284 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1287 /* Output */
1288 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1289 /* Input */
1290 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1292 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1293 /* Is an output */
1294 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1296 /* Normally inputs */
1297 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1298 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1300 /* Input */
1301 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1305 * tmp_buf is used as a temporary buffer by serial_write. We need to
1306 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1307 * and some other program tries to do a serial write at the same time.
1308 * Since the lock will only come under contention when the system is
1309 * swapping and available memory is low, it makes sense to share one
1310 * buffer across all the serial ports, since it significantly saves
1311 * memory if large numbers of serial ports are open.
1313 static unsigned char *tmp_buf;
1314 static DEFINE_MUTEX(tmp_buf_mutex);
1316 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1317 static void update_char_time(struct e100_serial * info)
1319 tcflag_t cflags = info->tty->termios->c_cflag;
1320 int bits;
1322 /* calc. number of bits / data byte */
1323 /* databits + startbit and 1 stopbit */
1324 if ((cflags & CSIZE) == CS7)
1325 bits = 9;
1326 else
1327 bits = 10;
1329 if (cflags & CSTOPB) /* 2 stopbits ? */
1330 bits++;
1332 if (cflags & PARENB) /* parity bit ? */
1333 bits++;
1335 /* calc timeout */
1336 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1337 info->flush_time_usec = 4*info->char_time_usec;
1338 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1339 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1344 * This function maps from the Bxxxx defines in asm/termbits.h into real
1345 * baud rates.
1348 static int
1349 cflag_to_baud(unsigned int cflag)
1351 static int baud_table[] = {
1352 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1353 4800, 9600, 19200, 38400 };
1355 static int ext_baud_table[] = {
1356 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1357 0, 0, 0, 0, 0, 0, 0, 0 };
1359 if (cflag & CBAUDEX)
1360 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1361 else
1362 return baud_table[cflag & CBAUD];
1365 /* and this maps to an etrax100 hardware baud constant */
1367 static unsigned char
1368 cflag_to_etrax_baud(unsigned int cflag)
1370 char retval;
1372 static char baud_table[] = {
1373 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1375 static char ext_baud_table[] = {
1376 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1378 if (cflag & CBAUDEX)
1379 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1380 else
1381 retval = baud_table[cflag & CBAUD];
1383 if (retval < 0) {
1384 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1385 retval = 5; /* choose default 9600 instead */
1388 return retval | (retval << 4); /* choose same for both TX and RX */
1392 /* Various static support functions */
1394 /* Functions to set or clear DTR/RTS on the requested line */
1395 /* It is complicated by the fact that RTS is a serial port register, while
1396 * DTR might not be implemented in the HW at all, and if it is, it can be on
1397 * any general port.
1401 static inline void
1402 e100_dtr(struct e100_serial *info, int set)
1404 #ifndef CONFIG_SVINTO_SIM
1405 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1407 #ifdef SERIAL_DEBUG_IO
1408 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1409 printk("ser%i shadow before 0x%02X get: %i\n",
1410 info->line, *e100_modem_pins[info->line].dtr_shadow,
1411 E100_DTR_GET(info));
1412 #endif
1413 /* DTR is active low */
1415 unsigned long flags;
1417 save_flags(flags);
1418 cli();
1419 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1420 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1421 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1422 restore_flags(flags);
1425 #ifdef SERIAL_DEBUG_IO
1426 printk("ser%i shadow after 0x%02X get: %i\n",
1427 info->line, *e100_modem_pins[info->line].dtr_shadow,
1428 E100_DTR_GET(info));
1429 #endif
1430 #endif
1433 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1434 * 0=0V , 1=3.3V
1436 static inline void
1437 e100_rts(struct e100_serial *info, int set)
1439 #ifndef CONFIG_SVINTO_SIM
1440 unsigned long flags;
1441 save_flags(flags);
1442 cli();
1443 info->rx_ctrl &= ~E100_RTS_MASK;
1444 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1445 info->port[REG_REC_CTRL] = info->rx_ctrl;
1446 restore_flags(flags);
1447 #ifdef SERIAL_DEBUG_IO
1448 printk("ser%i rts %i\n", info->line, set);
1449 #endif
1450 #endif
1454 /* If this behaves as a modem, RI and CD is an output */
1455 static inline void
1456 e100_ri_out(struct e100_serial *info, int set)
1458 #ifndef CONFIG_SVINTO_SIM
1459 /* RI is active low */
1461 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1462 unsigned long flags;
1464 save_flags(flags);
1465 cli();
1466 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1467 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1468 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1469 restore_flags(flags);
1471 #endif
1473 static inline void
1474 e100_cd_out(struct e100_serial *info, int set)
1476 #ifndef CONFIG_SVINTO_SIM
1477 /* CD is active low */
1479 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1480 unsigned long flags;
1482 save_flags(flags);
1483 cli();
1484 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1485 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1486 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1487 restore_flags(flags);
1489 #endif
1492 static inline void
1493 e100_disable_rx(struct e100_serial *info)
1495 #ifndef CONFIG_SVINTO_SIM
1496 /* disable the receiver */
1497 info->port[REG_REC_CTRL] =
1498 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1499 #endif
1502 static inline void
1503 e100_enable_rx(struct e100_serial *info)
1505 #ifndef CONFIG_SVINTO_SIM
1506 /* enable the receiver */
1507 info->port[REG_REC_CTRL] =
1508 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1509 #endif
1512 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1514 static inline void
1515 e100_disable_rxdma_irq(struct e100_serial *info)
1517 #ifdef SERIAL_DEBUG_INTR
1518 printk("rxdma_irq(%d): 0\n",info->line);
1519 #endif
1520 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1521 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1524 static inline void
1525 e100_enable_rxdma_irq(struct e100_serial *info)
1527 #ifdef SERIAL_DEBUG_INTR
1528 printk("rxdma_irq(%d): 1\n",info->line);
1529 #endif
1530 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1531 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1534 /* the tx DMA uses only dma_descr interrupt */
1536 static void e100_disable_txdma_irq(struct e100_serial *info)
1538 #ifdef SERIAL_DEBUG_INTR
1539 printk("txdma_irq(%d): 0\n",info->line);
1540 #endif
1541 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1542 *R_IRQ_MASK2_CLR = info->irq;
1545 static void e100_enable_txdma_irq(struct e100_serial *info)
1547 #ifdef SERIAL_DEBUG_INTR
1548 printk("txdma_irq(%d): 1\n",info->line);
1549 #endif
1550 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1551 *R_IRQ_MASK2_SET = info->irq;
1554 static void e100_disable_txdma_channel(struct e100_serial *info)
1556 unsigned long flags;
1558 /* Disable output DMA channel for the serial port in question
1559 * ( set to something other then serialX)
1561 save_flags(flags);
1562 cli();
1563 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1564 if (info->line == 0) {
1565 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1566 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1567 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1568 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1570 } else if (info->line == 1) {
1571 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1572 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1573 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1574 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1576 } else if (info->line == 2) {
1577 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1578 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1579 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1580 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1582 } else if (info->line == 3) {
1583 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1584 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1585 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1586 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1589 *R_GEN_CONFIG = genconfig_shadow;
1590 restore_flags(flags);
1594 static void e100_enable_txdma_channel(struct e100_serial *info)
1596 unsigned long flags;
1598 save_flags(flags);
1599 cli();
1600 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1601 /* Enable output DMA channel for the serial port in question */
1602 if (info->line == 0) {
1603 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1604 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1605 } else if (info->line == 1) {
1606 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1607 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1608 } else if (info->line == 2) {
1609 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1610 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1611 } else if (info->line == 3) {
1612 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1613 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1615 *R_GEN_CONFIG = genconfig_shadow;
1616 restore_flags(flags);
1619 static void e100_disable_rxdma_channel(struct e100_serial *info)
1621 unsigned long flags;
1623 /* Disable input DMA channel for the serial port in question
1624 * ( set to something other then serialX)
1626 save_flags(flags);
1627 cli();
1628 if (info->line == 0) {
1629 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1630 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1631 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1632 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1634 } else if (info->line == 1) {
1635 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1636 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1637 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1638 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1640 } else if (info->line == 2) {
1641 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1642 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1643 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1644 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1646 } else if (info->line == 3) {
1647 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1648 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1649 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1650 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1653 *R_GEN_CONFIG = genconfig_shadow;
1654 restore_flags(flags);
1658 static void e100_enable_rxdma_channel(struct e100_serial *info)
1660 unsigned long flags;
1662 save_flags(flags);
1663 cli();
1664 /* Enable input DMA channel for the serial port in question */
1665 if (info->line == 0) {
1666 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1667 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1668 } else if (info->line == 1) {
1669 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1670 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1671 } else if (info->line == 2) {
1672 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1673 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1674 } else if (info->line == 3) {
1675 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1676 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1678 *R_GEN_CONFIG = genconfig_shadow;
1679 restore_flags(flags);
1682 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1683 /* in order to detect and fix errors on the first byte
1684 we have to use the serial interrupts as well. */
1686 static inline void
1687 e100_disable_serial_data_irq(struct e100_serial *info)
1689 #ifdef SERIAL_DEBUG_INTR
1690 printk("ser_irq(%d): 0\n",info->line);
1691 #endif
1692 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1693 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1696 static inline void
1697 e100_enable_serial_data_irq(struct e100_serial *info)
1699 #ifdef SERIAL_DEBUG_INTR
1700 printk("ser_irq(%d): 1\n",info->line);
1701 printk("**** %d = %d\n",
1702 (8+2*info->line),
1703 (1U << (8+2*info->line)));
1704 #endif
1705 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1706 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1708 #endif
1710 static inline void
1711 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1713 #ifdef SERIAL_DEBUG_INTR
1714 printk("ser_tx_irq(%d): 0\n",info->line);
1715 #endif
1716 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1717 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1720 static inline void
1721 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1723 #ifdef SERIAL_DEBUG_INTR
1724 printk("ser_tx_irq(%d): 1\n",info->line);
1725 printk("**** %d = %d\n",
1726 (8+1+2*info->line),
1727 (1U << (8+1+2*info->line)));
1728 #endif
1729 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1730 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1733 static inline void e100_enable_rx_irq(struct e100_serial *info)
1735 if (info->uses_dma_in)
1736 e100_enable_rxdma_irq(info);
1737 else
1738 e100_enable_serial_data_irq(info);
1740 static inline void e100_disable_rx_irq(struct e100_serial *info)
1742 if (info->uses_dma_in)
1743 e100_disable_rxdma_irq(info);
1744 else
1745 e100_disable_serial_data_irq(info);
1748 #if defined(CONFIG_ETRAX_RS485)
1749 /* Enable RS-485 mode on selected port. This is UGLY. */
1750 static int
1751 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1753 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1755 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1756 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1757 #endif
1758 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1759 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1760 rs485_port_g_bit, 1);
1761 #endif
1762 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1763 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1764 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1765 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1766 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1767 #endif
1769 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1770 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1771 if (r->delay_rts_before_send >= 1000)
1772 info->rs485.delay_rts_before_send = 1000;
1773 else
1774 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1775 info->rs485.enabled = r->enabled;
1776 /* printk("rts: on send = %i, after = %i, enabled = %i",
1777 info->rs485.rts_on_send,
1778 info->rs485.rts_after_sent,
1779 info->rs485.enabled
1782 return 0;
1785 static int
1786 e100_write_rs485(struct tty_struct *tty, int from_user,
1787 const unsigned char *buf, int count)
1789 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1790 int old_enabled = info->rs485.enabled;
1792 /* rs485 is always implicitly enabled if we're using the ioctl()
1793 * but it doesn't have to be set in the rs485_control
1794 * (to be backward compatible with old apps)
1795 * So we store, set and restore it.
1797 info->rs485.enabled = 1;
1798 /* rs_write now deals with RS485 if enabled */
1799 count = rs_write(tty, from_user, buf, count);
1800 info->rs485.enabled = old_enabled;
1801 return count;
1804 #ifdef CONFIG_ETRAX_FAST_TIMER
1805 /* Timer function to toggle RTS when using FAST_TIMER */
1806 static void rs485_toggle_rts_timer_function(unsigned long data)
1808 struct e100_serial *info = (struct e100_serial *)data;
1810 fast_timers_rs485[info->line].function = NULL;
1811 e100_rts(info, info->rs485.rts_after_sent);
1812 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1813 e100_enable_rx(info);
1814 e100_enable_rx_irq(info);
1815 #endif
1817 #endif
1818 #endif /* CONFIG_ETRAX_RS485 */
1821 * ------------------------------------------------------------
1822 * rs_stop() and rs_start()
1824 * This routines are called before setting or resetting tty->stopped.
1825 * They enable or disable transmitter using the XOFF registers, as necessary.
1826 * ------------------------------------------------------------
1829 static void
1830 rs_stop(struct tty_struct *tty)
1832 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1833 if (info) {
1834 unsigned long flags;
1835 unsigned long xoff;
1837 save_flags(flags); cli();
1838 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1839 CIRC_CNT(info->xmit.head,
1840 info->xmit.tail,SERIAL_XMIT_SIZE)));
1842 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1843 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1844 if (tty->termios->c_iflag & IXON ) {
1845 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1848 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1849 restore_flags(flags);
1853 static void
1854 rs_start(struct tty_struct *tty)
1856 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1857 if (info) {
1858 unsigned long flags;
1859 unsigned long xoff;
1861 save_flags(flags); cli();
1862 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1863 CIRC_CNT(info->xmit.head,
1864 info->xmit.tail,SERIAL_XMIT_SIZE)));
1865 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1866 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1867 if (tty->termios->c_iflag & IXON ) {
1868 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1871 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1872 if (!info->uses_dma_out &&
1873 info->xmit.head != info->xmit.tail && info->xmit.buf)
1874 e100_enable_serial_tx_ready_irq(info);
1876 restore_flags(flags);
1881 * ----------------------------------------------------------------------
1883 * Here starts the interrupt handling routines. All of the following
1884 * subroutines are declared as inline and are folded into
1885 * rs_interrupt(). They were separated out for readability's sake.
1887 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1888 * runs with interrupts turned off. People who may want to modify
1889 * rs_interrupt() should try to keep the interrupt handler as fast as
1890 * possible. After you are done making modifications, it is not a bad
1891 * idea to do:
1893 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1895 * and look at the resulting assemble code in serial.s.
1897 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1898 * -----------------------------------------------------------------------
1902 * This routine is used by the interrupt handler to schedule
1903 * processing in the software interrupt portion of the driver.
1905 static void rs_sched_event(struct e100_serial *info, int event)
1907 if (info->event & (1 << event))
1908 return;
1909 info->event |= 1 << event;
1910 schedule_work(&info->work);
1913 /* The output DMA channel is free - use it to send as many chars as possible
1914 * NOTES:
1915 * We don't pay attention to info->x_char, which means if the TTY wants to
1916 * use XON/XOFF it will set info->x_char but we won't send any X char!
1918 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1919 * buffer containing the X char, and skip updating xmit. We'd also have to
1920 * check if the last sent char was the X char when we enter this function
1921 * the next time, to avoid updating xmit with the sent X value.
1924 static void
1925 transmit_chars_dma(struct e100_serial *info)
1927 unsigned int c, sentl;
1928 struct etrax_dma_descr *descr;
1930 #ifdef CONFIG_SVINTO_SIM
1931 /* This will output too little if tail is not 0 always since
1932 * we don't reloop to send the other part. Anyway this SHOULD be a
1933 * no-op - transmit_chars_dma would never really be called during sim
1934 * since rs_write does not write into the xmit buffer then.
1936 if (info->xmit.tail)
1937 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1938 if (info->xmit.head != info->xmit.tail) {
1939 SIMCOUT(info->xmit.buf + info->xmit.tail,
1940 CIRC_CNT(info->xmit.head,
1941 info->xmit.tail,
1942 SERIAL_XMIT_SIZE));
1943 info->xmit.head = info->xmit.tail; /* move back head */
1944 info->tr_running = 0;
1946 return;
1947 #endif
1948 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1949 *info->oclrintradr =
1950 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1951 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1953 #ifdef SERIAL_DEBUG_INTR
1954 if (info->line == SERIAL_DEBUG_LINE)
1955 printk("tc\n");
1956 #endif
1957 if (!info->tr_running) {
1958 /* weirdo... we shouldn't get here! */
1959 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1960 return;
1963 descr = &info->tr_descr;
1965 /* first get the amount of bytes sent during the last DMA transfer,
1966 and update xmit accordingly */
1968 /* if the stop bit was not set, all data has been sent */
1969 if (!(descr->status & d_stop)) {
1970 sentl = descr->sw_len;
1971 } else
1972 /* otherwise we find the amount of data sent here */
1973 sentl = descr->hw_len;
1975 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1977 /* update stats */
1978 info->icount.tx += sentl;
1980 /* update xmit buffer */
1981 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1983 /* if there is only a few chars left in the buf, wake up the blocked
1984 write if any */
1985 if (CIRC_CNT(info->xmit.head,
1986 info->xmit.tail,
1987 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1988 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1990 /* find out the largest amount of consecutive bytes we want to send now */
1992 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1994 /* Don't send all in one DMA transfer - divide it so we wake up
1995 * application before all is sent
1998 if (c >= 4*WAKEUP_CHARS)
1999 c = c/2;
2001 if (c <= 0) {
2002 /* our job here is done, don't schedule any new DMA transfer */
2003 info->tr_running = 0;
2005 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2006 if (info->rs485.enabled) {
2007 /* Set a short timer to toggle RTS */
2008 start_one_shot_timer(&fast_timers_rs485[info->line],
2009 rs485_toggle_rts_timer_function,
2010 (unsigned long)info,
2011 info->char_time_usec*2,
2012 "RS-485");
2014 #endif /* RS485 */
2015 return;
2018 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2019 /* set up the descriptor correctly for output */
2020 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2021 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2022 descr->sw_len = c;
2023 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2024 descr->status = 0;
2026 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2027 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2029 /* DMA is now running (hopefully) */
2030 } /* transmit_chars_dma */
2032 static void
2033 start_transmit(struct e100_serial *info)
2035 #if 0
2036 if (info->line == SERIAL_DEBUG_LINE)
2037 printk("x\n");
2038 #endif
2040 info->tr_descr.sw_len = 0;
2041 info->tr_descr.hw_len = 0;
2042 info->tr_descr.status = 0;
2043 info->tr_running = 1;
2044 if (info->uses_dma_out)
2045 transmit_chars_dma(info);
2046 else
2047 e100_enable_serial_tx_ready_irq(info);
2048 } /* start_transmit */
2050 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2051 static int serial_fast_timer_started = 0;
2052 static int serial_fast_timer_expired = 0;
2053 static void flush_timeout_function(unsigned long data);
2054 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2055 unsigned long timer_flags; \
2056 save_flags(timer_flags); \
2057 cli(); \
2058 if (fast_timers[info->line].function == NULL) { \
2059 serial_fast_timer_started++; \
2060 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2061 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2062 start_one_shot_timer(&fast_timers[info->line], \
2063 flush_timeout_function, \
2064 (unsigned long)info, \
2065 (usec), \
2066 string); \
2068 else { \
2069 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2071 restore_flags(timer_flags); \
2073 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2075 #else
2076 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2077 #define START_FLUSH_FAST_TIMER(info, string)
2078 #endif
2080 static struct etrax_recv_buffer *
2081 alloc_recv_buffer(unsigned int size)
2083 struct etrax_recv_buffer *buffer;
2085 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2086 return NULL;
2088 buffer->next = NULL;
2089 buffer->length = 0;
2090 buffer->error = TTY_NORMAL;
2092 return buffer;
2095 static void
2096 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2098 unsigned long flags;
2100 save_flags(flags);
2101 cli();
2103 if (!info->first_recv_buffer)
2104 info->first_recv_buffer = buffer;
2105 else
2106 info->last_recv_buffer->next = buffer;
2108 info->last_recv_buffer = buffer;
2110 info->recv_cnt += buffer->length;
2111 if (info->recv_cnt > info->max_recv_cnt)
2112 info->max_recv_cnt = info->recv_cnt;
2114 restore_flags(flags);
2117 static int
2118 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2120 struct etrax_recv_buffer *buffer;
2121 if (info->uses_dma_in) {
2122 if (!(buffer = alloc_recv_buffer(4)))
2123 return 0;
2125 buffer->length = 1;
2126 buffer->error = flag;
2127 buffer->buffer[0] = data;
2129 append_recv_buffer(info, buffer);
2131 info->icount.rx++;
2132 } else {
2133 struct tty_struct *tty = info->tty;
2134 *tty->flip.char_buf_ptr = data;
2135 *tty->flip.flag_buf_ptr = flag;
2136 tty->flip.flag_buf_ptr++;
2137 tty->flip.char_buf_ptr++;
2138 tty->flip.count++;
2139 info->icount.rx++;
2142 return 1;
2145 static unsigned int handle_descr_data(struct e100_serial *info,
2146 struct etrax_dma_descr *descr,
2147 unsigned int recvl)
2149 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2151 if (info->recv_cnt + recvl > 65536) {
2152 printk(KERN_CRIT
2153 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2154 return 0;
2157 buffer->length = recvl;
2159 if (info->errorcode == ERRCODE_SET_BREAK)
2160 buffer->error = TTY_BREAK;
2161 info->errorcode = 0;
2163 append_recv_buffer(info, buffer);
2165 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2166 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2168 descr->buf = virt_to_phys(buffer->buffer);
2170 return recvl;
2173 static unsigned int handle_all_descr_data(struct e100_serial *info)
2175 struct etrax_dma_descr *descr;
2176 unsigned int recvl;
2177 unsigned int ret = 0;
2179 while (1)
2181 descr = &info->rec_descr[info->cur_rec_descr];
2183 if (descr == phys_to_virt(*info->idescradr))
2184 break;
2186 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2187 info->cur_rec_descr = 0;
2189 /* find out how many bytes were read */
2191 /* if the eop bit was not set, all data has been received */
2192 if (!(descr->status & d_eop)) {
2193 recvl = descr->sw_len;
2194 } else {
2195 /* otherwise we find the amount of data received here */
2196 recvl = descr->hw_len;
2199 /* Reset the status information */
2200 descr->status = 0;
2202 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2203 if (info->tty->stopped) {
2204 unsigned char *buf = phys_to_virt(descr->buf);
2205 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2206 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2207 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2211 /* update stats */
2212 info->icount.rx += recvl;
2214 ret += handle_descr_data(info, descr, recvl);
2217 return ret;
2220 static void receive_chars_dma(struct e100_serial *info)
2222 struct tty_struct *tty;
2223 unsigned char rstat;
2225 #ifdef CONFIG_SVINTO_SIM
2226 /* No receive in the simulator. Will probably be when the rest of
2227 * the serial interface works, and this piece will just be removed.
2229 return;
2230 #endif
2232 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2233 *info->iclrintradr =
2234 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2235 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2237 tty = info->tty;
2238 if (!tty) /* Something wrong... */
2239 return;
2241 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2242 if (info->uses_dma_in)
2243 e100_enable_serial_data_irq(info);
2244 #endif
2246 if (info->errorcode == ERRCODE_INSERT_BREAK)
2247 add_char_and_flag(info, '\0', TTY_BREAK);
2249 handle_all_descr_data(info);
2251 /* Read the status register to detect errors */
2252 rstat = info->port[REG_STATUS];
2253 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2254 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2257 if (rstat & SER_ERROR_MASK) {
2258 /* If we got an error, we must reset it by reading the
2259 * data_in field
2261 unsigned char data = info->port[REG_DATA];
2263 PROCSTAT(ser_stat[info->line].errors_cnt++);
2264 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2265 ((rstat & SER_ERROR_MASK) << 8) | data);
2267 if (rstat & SER_PAR_ERR_MASK)
2268 add_char_and_flag(info, data, TTY_PARITY);
2269 else if (rstat & SER_OVERRUN_MASK)
2270 add_char_and_flag(info, data, TTY_OVERRUN);
2271 else if (rstat & SER_FRAMING_ERR_MASK)
2272 add_char_and_flag(info, data, TTY_FRAME);
2275 START_FLUSH_FAST_TIMER(info, "receive_chars");
2277 /* Restart the receiving DMA */
2278 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2281 static int start_recv_dma(struct e100_serial *info)
2283 struct etrax_dma_descr *descr = info->rec_descr;
2284 struct etrax_recv_buffer *buffer;
2285 int i;
2287 /* Set up the receiving descriptors */
2288 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2289 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2290 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2292 descr[i].ctrl = d_int;
2293 descr[i].buf = virt_to_phys(buffer->buffer);
2294 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2295 descr[i].hw_len = 0;
2296 descr[i].status = 0;
2297 descr[i].next = virt_to_phys(&descr[i+1]);
2300 /* Link the last descriptor to the first */
2301 descr[i-1].next = virt_to_phys(&descr[0]);
2303 /* Start with the first descriptor in the list */
2304 info->cur_rec_descr = 0;
2306 /* Start the DMA */
2307 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2308 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2310 /* Input DMA should be running now */
2311 return 1;
2314 static void
2315 start_receive(struct e100_serial *info)
2317 #ifdef CONFIG_SVINTO_SIM
2318 /* No receive in the simulator. Will probably be when the rest of
2319 * the serial interface works, and this piece will just be removed.
2321 return;
2322 #endif
2323 info->tty->flip.count = 0;
2324 if (info->uses_dma_in) {
2325 /* reset the input dma channel to be sure it works */
2327 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2328 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2329 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2331 start_recv_dma(info);
2336 /* the bits in the MASK2 register are laid out like this:
2337 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2338 where I is the input channel and O is the output channel for the port.
2339 info->irq is the bit number for the DMAO_DESCR so to check the others we
2340 shift info->irq to the left.
2343 /* dma output channel interrupt handler
2344 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2345 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2348 static irqreturn_t
2349 tr_interrupt(int irq, void *dev_id)
2351 struct e100_serial *info;
2352 unsigned long ireg;
2353 int i;
2354 int handled = 0;
2356 #ifdef CONFIG_SVINTO_SIM
2357 /* No receive in the simulator. Will probably be when the rest of
2358 * the serial interface works, and this piece will just be removed.
2361 const char *s = "What? tr_interrupt in simulator??\n";
2362 SIMCOUT(s,strlen(s));
2364 return IRQ_HANDLED;
2365 #endif
2367 /* find out the line that caused this irq and get it from rs_table */
2369 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2371 for (i = 0; i < NR_PORTS; i++) {
2372 info = rs_table + i;
2373 if (!info->enabled || !info->uses_dma_out)
2374 continue;
2375 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2376 if (ireg & info->irq) {
2377 handled = 1;
2378 /* we can send a new dma bunch. make it so. */
2379 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2380 /* Read jiffies_usec first,
2381 * we want this time to be as late as possible
2383 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2384 info->last_tx_active_usec = GET_JIFFIES_USEC();
2385 info->last_tx_active = jiffies;
2386 transmit_chars_dma(info);
2389 /* FIXME: here we should really check for a change in the
2390 status lines and if so call status_handle(info) */
2392 return IRQ_RETVAL(handled);
2393 } /* tr_interrupt */
2395 /* dma input channel interrupt handler */
2397 static irqreturn_t
2398 rec_interrupt(int irq, void *dev_id)
2400 struct e100_serial *info;
2401 unsigned long ireg;
2402 int i;
2403 int handled = 0;
2405 #ifdef CONFIG_SVINTO_SIM
2406 /* No receive in the simulator. Will probably be when the rest of
2407 * the serial interface works, and this piece will just be removed.
2410 const char *s = "What? rec_interrupt in simulator??\n";
2411 SIMCOUT(s,strlen(s));
2413 return IRQ_HANDLED;
2414 #endif
2416 /* find out the line that caused this irq and get it from rs_table */
2418 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2420 for (i = 0; i < NR_PORTS; i++) {
2421 info = rs_table + i;
2422 if (!info->enabled || !info->uses_dma_in)
2423 continue;
2424 /* check for both dma_eop and dma_descr for the input dma channel */
2425 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2426 handled = 1;
2427 /* we have received something */
2428 receive_chars_dma(info);
2431 /* FIXME: here we should really check for a change in the
2432 status lines and if so call status_handle(info) */
2434 return IRQ_RETVAL(handled);
2435 } /* rec_interrupt */
2437 static int force_eop_if_needed(struct e100_serial *info)
2439 /* We check data_avail bit to determine if data has
2440 * arrived since last time
2442 unsigned char rstat = info->port[REG_STATUS];
2444 /* error or datavail? */
2445 if (rstat & SER_ERROR_MASK) {
2446 /* Some error has occurred. If there has been valid data, an
2447 * EOP interrupt will be made automatically. If no data, the
2448 * normal ser_interrupt should be enabled and handle it.
2449 * So do nothing!
2451 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2452 rstat | (info->line << 8));
2453 return 0;
2456 if (rstat & SER_DATA_AVAIL_MASK) {
2457 /* Ok data, no error, count it */
2458 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2459 rstat | (info->line << 8)));
2460 /* Read data to clear status flags */
2461 (void)info->port[REG_DATA];
2463 info->forced_eop = 0;
2464 START_FLUSH_FAST_TIMER(info, "magic");
2465 return 0;
2468 /* hit the timeout, force an EOP for the input
2469 * dma channel if we haven't already
2471 if (!info->forced_eop) {
2472 info->forced_eop = 1;
2473 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2474 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2475 FORCE_EOP(info);
2478 return 1;
2481 static void flush_to_flip_buffer(struct e100_serial *info)
2483 struct tty_struct *tty;
2484 struct etrax_recv_buffer *buffer;
2485 unsigned int length;
2486 unsigned long flags;
2487 int max_flip_size;
2489 if (!info->first_recv_buffer)
2490 return;
2492 save_flags(flags);
2493 cli();
2495 if (!(tty = info->tty)) {
2496 restore_flags(flags);
2497 return;
2500 length = tty->flip.count;
2501 /* Don't flip more than the ldisc has room for.
2502 * The return value from ldisc.receive_room(tty) - might not be up to
2503 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2504 * processed and not accounted for yet.
2505 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2506 * Lets buffer data here and let flow control take care of it.
2507 * Since we normally flip large chunks, the ldisc don't react
2508 * with throttle until too late if we flip to much.
2510 max_flip_size = tty->ldisc.receive_room(tty);
2511 if (max_flip_size < 0)
2512 max_flip_size = 0;
2513 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2514 length + info->recv_cnt + /* We have this queued */
2515 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2516 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2517 /* check TTY_THROTTLED first so it indicates our state */
2518 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2519 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2520 rs_throttle(tty);
2522 #if 0
2523 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2524 length + info->recv_cnt + /* We have this queued */
2525 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2526 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2527 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2528 rs_throttle(tty);
2530 #endif
2533 if (max_flip_size > TTY_FLIPBUF_SIZE)
2534 max_flip_size = TTY_FLIPBUF_SIZE;
2536 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2537 unsigned int count = buffer->length;
2539 if (length + count > max_flip_size)
2540 count = max_flip_size - length;
2542 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2543 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2544 tty->flip.flag_buf_ptr[length] = buffer->error;
2546 length += count;
2547 info->recv_cnt -= count;
2548 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2550 if (count == buffer->length) {
2551 info->first_recv_buffer = buffer->next;
2552 kfree(buffer);
2553 } else {
2554 buffer->length -= count;
2555 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2556 buffer->error = TTY_NORMAL;
2560 if (!info->first_recv_buffer)
2561 info->last_recv_buffer = NULL;
2563 tty->flip.count = length;
2564 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2565 DEBUG_LOG(info->line, "ldisc %lu\n",
2566 tty->ldisc.chars_in_buffer(tty));
2567 DEBUG_LOG(info->line, "flip.count %lu\n",
2568 tty->flip.count);
2571 restore_flags(flags);
2573 DFLIP(
2574 if (1) {
2575 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2576 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2577 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2582 /* this includes a check for low-latency */
2583 tty_flip_buffer_push(tty);
2586 static void check_flush_timeout(struct e100_serial *info)
2588 /* Flip what we've got (if we can) */
2589 flush_to_flip_buffer(info);
2591 /* We might need to flip later, but not to fast
2592 * since the system is busy processing input... */
2593 if (info->first_recv_buffer)
2594 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2596 /* Force eop last, since data might have come while we're processing
2597 * and if we started the slow timer above, we won't start a fast
2598 * below.
2600 force_eop_if_needed(info);
2603 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2604 static void flush_timeout_function(unsigned long data)
2606 struct e100_serial *info = (struct e100_serial *)data;
2608 fast_timers[info->line].function = NULL;
2609 serial_fast_timer_expired++;
2610 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2611 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2612 check_flush_timeout(info);
2615 #else
2617 /* dma fifo/buffer timeout handler
2618 forces an end-of-packet for the dma input channel if no chars
2619 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2622 static struct timer_list flush_timer;
2624 static void
2625 timed_flush_handler(unsigned long ptr)
2627 struct e100_serial *info;
2628 int i;
2630 #ifdef CONFIG_SVINTO_SIM
2631 return;
2632 #endif
2634 for (i = 0; i < NR_PORTS; i++) {
2635 info = rs_table + i;
2636 if (info->uses_dma_in)
2637 check_flush_timeout(info);
2640 /* restart flush timer */
2641 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2643 #endif
2645 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2647 /* If there is an error (ie break) when the DMA is running and
2648 * there are no bytes in the fifo the DMA is stopped and we get no
2649 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2650 * transfer, and if it is without error we can turn the serial
2651 * interrupts off.
2655 BREAK handling on ETRAX 100:
2656 ETRAX will generate interrupt although there is no stop bit between the
2657 characters.
2659 Depending on how long the break sequence is, the end of the breaksequence
2660 will look differently:
2661 | indicates start/end of a character.
2663 B= Break character (0x00) with framing error.
2664 E= Error byte with parity error received after B characters.
2665 F= "Faked" valid byte received immediately after B characters.
2666 V= Valid byte
2669 B BL ___________________________ V
2670 .._|__________|__________| |valid data |
2672 Multiple frame errors with data == 0x00 (B),
2673 the timing matches up "perfectly" so no extra ending char is detected.
2674 The RXD pin is 1 in the last interrupt, in that case
2675 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2676 know if another byte will come and this really is case 2. below
2677 (e.g F=0xFF or 0xFE)
2678 If RXD pin is 0 we can expect another character (see 2. below).
2683 B B E or F__________________..__ V
2684 .._|__________|__________|______ | |valid data
2685 "valid" or
2686 parity error
2688 Multiple frame errors with data == 0x00 (B),
2689 but the part of the break trigs is interpreted as a start bit (and possibly
2690 some 0 bits followed by a number of 1 bits and a stop bit).
2691 Depending on parity settings etc. this last character can be either
2692 a fake "valid" char (F) or have a parity error (E).
2694 If the character is valid it will be put in the buffer,
2695 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2696 will set the flags so the tty will handle it,
2697 if it's an error byte it will not be put in the buffer
2698 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2700 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2701 of the last faulty char (B) and compares it with the current time:
2702 If the time elapsed time is less then 2*char_time_usec we will assume
2703 it's a faked F char and not a Valid char and set
2704 info->errorcode = ERRCODE_SET_BREAK.
2706 Flaws in the above solution:
2707 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2708 We use the timer to distinguish a F character from a V character,
2709 if a V character is to close after the break we might make the wrong decision.
2711 TODO: The break will be delayed until an F or V character is received.
2715 static
2716 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2718 unsigned long data_read;
2719 struct tty_struct *tty = info->tty;
2721 if (!tty) {
2722 printk("!NO TTY!\n");
2723 return info;
2725 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2726 /* check TTY_THROTTLED first so it indicates our state */
2727 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2728 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2729 rs_throttle(tty);
2732 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2733 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2734 tty->flip.work.func((void *) tty);
2735 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2736 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2737 return info; /* if TTY_DONT_FLIP is set */
2740 /* Read data and status at the same time */
2741 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2742 more_data:
2743 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2744 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2746 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2748 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2749 IO_MASK(R_SERIAL0_READ, par_err) |
2750 IO_MASK(R_SERIAL0_READ, overrun) )) {
2751 /* An error */
2752 info->last_rx_active_usec = GET_JIFFIES_USEC();
2753 info->last_rx_active = jiffies;
2754 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2755 DLOG_INT_TRIG(
2756 if (!log_int_trig1_pos) {
2757 log_int_trig1_pos = log_int_pos;
2758 log_int(rdpc(), 0, 0);
2763 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2764 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2765 /* Most likely a break, but we get interrupts over and
2766 * over again.
2769 if (!info->break_detected_cnt) {
2770 DEBUG_LOG(info->line, "#BRK start\n", 0);
2772 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2773 /* The RX pin is high now, so the break
2774 * must be over, but....
2775 * we can't really know if we will get another
2776 * last byte ending the break or not.
2777 * And we don't know if the byte (if any) will
2778 * have an error or look valid.
2780 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2781 info->errorcode = ERRCODE_INSERT_BREAK;
2783 info->break_detected_cnt++;
2784 } else {
2785 /* The error does not look like a break, but could be
2786 * the end of one
2788 if (info->break_detected_cnt) {
2789 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2790 info->errorcode = ERRCODE_INSERT_BREAK;
2791 } else {
2792 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2793 info->icount.brk++;
2794 *tty->flip.char_buf_ptr = 0;
2795 *tty->flip.flag_buf_ptr = TTY_BREAK;
2796 tty->flip.flag_buf_ptr++;
2797 tty->flip.char_buf_ptr++;
2798 tty->flip.count++;
2799 info->icount.rx++;
2801 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2803 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2804 info->icount.parity++;
2805 *tty->flip.flag_buf_ptr = TTY_PARITY;
2806 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2807 info->icount.overrun++;
2808 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2809 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2810 info->icount.frame++;
2811 *tty->flip.flag_buf_ptr = TTY_FRAME;
2813 info->errorcode = 0;
2815 info->break_detected_cnt = 0;
2817 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2818 /* No error */
2819 DLOG_INT_TRIG(
2820 if (!log_int_trig1_pos) {
2821 if (log_int_pos >= log_int_size) {
2822 log_int_pos = 0;
2824 log_int_trig0_pos = log_int_pos;
2825 log_int(rdpc(), 0, 0);
2828 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2829 *tty->flip.flag_buf_ptr = 0;
2830 } else {
2831 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2835 tty->flip.flag_buf_ptr++;
2836 tty->flip.char_buf_ptr++;
2837 tty->flip.count++;
2838 info->icount.rx++;
2839 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2840 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2841 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2842 goto more_data;
2845 tty_flip_buffer_push(info->tty);
2846 return info;
2849 static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2851 unsigned char rstat;
2853 #ifdef SERIAL_DEBUG_INTR
2854 printk("Interrupt from serport %d\n", i);
2855 #endif
2856 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2857 if (!info->uses_dma_in) {
2858 return handle_ser_rx_interrupt_no_dma(info);
2860 /* DMA is used */
2861 rstat = info->port[REG_STATUS];
2862 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2863 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2866 if (rstat & SER_ERROR_MASK) {
2867 unsigned char data;
2869 info->last_rx_active_usec = GET_JIFFIES_USEC();
2870 info->last_rx_active = jiffies;
2871 /* If we got an error, we must reset it by reading the
2872 * data_in field
2874 data = info->port[REG_DATA];
2875 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2876 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2877 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2878 /* Most likely a break, but we get interrupts over and
2879 * over again.
2882 if (!info->break_detected_cnt) {
2883 DEBUG_LOG(info->line, "#BRK start\n", 0);
2885 if (rstat & SER_RXD_MASK) {
2886 /* The RX pin is high now, so the break
2887 * must be over, but....
2888 * we can't really know if we will get another
2889 * last byte ending the break or not.
2890 * And we don't know if the byte (if any) will
2891 * have an error or look valid.
2893 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2894 info->errorcode = ERRCODE_INSERT_BREAK;
2896 info->break_detected_cnt++;
2897 } else {
2898 /* The error does not look like a break, but could be
2899 * the end of one
2901 if (info->break_detected_cnt) {
2902 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2903 info->errorcode = ERRCODE_INSERT_BREAK;
2904 } else {
2905 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2906 info->icount.brk++;
2907 add_char_and_flag(info, '\0', TTY_BREAK);
2910 if (rstat & SER_PAR_ERR_MASK) {
2911 info->icount.parity++;
2912 add_char_and_flag(info, data, TTY_PARITY);
2913 } else if (rstat & SER_OVERRUN_MASK) {
2914 info->icount.overrun++;
2915 add_char_and_flag(info, data, TTY_OVERRUN);
2916 } else if (rstat & SER_FRAMING_ERR_MASK) {
2917 info->icount.frame++;
2918 add_char_and_flag(info, data, TTY_FRAME);
2921 info->errorcode = 0;
2923 info->break_detected_cnt = 0;
2924 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2925 ((rstat & SER_ERROR_MASK) << 8) | data);
2927 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2928 } else { /* It was a valid byte, now let the DMA do the rest */
2929 unsigned long curr_time_u = GET_JIFFIES_USEC();
2930 unsigned long curr_time = jiffies;
2932 if (info->break_detected_cnt) {
2933 /* Detect if this character is a new valid char or the
2934 * last char in a break sequence: If LSBits are 0 and
2935 * MSBits are high AND the time is close to the
2936 * previous interrupt we should discard it.
2938 long elapsed_usec =
2939 (curr_time - info->last_rx_active) * (1000000/HZ) +
2940 curr_time_u - info->last_rx_active_usec;
2941 if (elapsed_usec < 2*info->char_time_usec) {
2942 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2943 /* Report as BREAK (error) and let
2944 * receive_chars_dma() handle it
2946 info->errorcode = ERRCODE_SET_BREAK;
2947 } else {
2948 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2950 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2953 #ifdef SERIAL_DEBUG_INTR
2954 printk("** OK, disabling ser_interrupts\n");
2955 #endif
2956 e100_disable_serial_data_irq(info);
2957 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2958 info->break_detected_cnt = 0;
2960 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2962 /* Restarting the DMA never hurts */
2963 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2964 START_FLUSH_FAST_TIMER(info, "ser_int");
2965 return info;
2966 } /* handle_ser_rx_interrupt */
2968 static void handle_ser_tx_interrupt(struct e100_serial *info)
2970 unsigned long flags;
2972 if (info->x_char) {
2973 unsigned char rstat;
2974 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2975 save_flags(flags); cli();
2976 rstat = info->port[REG_STATUS];
2977 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2979 info->port[REG_TR_DATA] = info->x_char;
2980 info->icount.tx++;
2981 info->x_char = 0;
2982 /* We must enable since it is disabled in ser_interrupt */
2983 e100_enable_serial_tx_ready_irq(info);
2984 restore_flags(flags);
2985 return;
2987 if (info->uses_dma_out) {
2988 unsigned char rstat;
2989 int i;
2990 /* We only use normal tx interrupt when sending x_char */
2991 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2992 save_flags(flags); cli();
2993 rstat = info->port[REG_STATUS];
2994 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2995 e100_disable_serial_tx_ready_irq(info);
2996 if (info->tty->stopped)
2997 rs_stop(info->tty);
2998 /* Enable the DMA channel and tell it to continue */
2999 e100_enable_txdma_channel(info);
3000 /* Wait 12 cycles before doing the DMA command */
3001 for(i = 6; i > 0; i--)
3002 nop();
3004 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3005 restore_flags(flags);
3006 return;
3008 /* Normal char-by-char interrupt */
3009 if (info->xmit.head == info->xmit.tail
3010 || info->tty->stopped
3011 || info->tty->hw_stopped) {
3012 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3013 e100_disable_serial_tx_ready_irq(info);
3014 info->tr_running = 0;
3015 return;
3017 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3018 /* Send a byte, rs485 timing is critical so turn of ints */
3019 save_flags(flags); cli();
3020 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3021 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3022 info->icount.tx++;
3023 if (info->xmit.head == info->xmit.tail) {
3024 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3025 if (info->rs485.enabled) {
3026 /* Set a short timer to toggle RTS */
3027 start_one_shot_timer(&fast_timers_rs485[info->line],
3028 rs485_toggle_rts_timer_function,
3029 (unsigned long)info,
3030 info->char_time_usec*2,
3031 "RS-485");
3033 #endif /* RS485 */
3034 info->last_tx_active_usec = GET_JIFFIES_USEC();
3035 info->last_tx_active = jiffies;
3036 e100_disable_serial_tx_ready_irq(info);
3037 info->tr_running = 0;
3038 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3039 } else {
3040 /* We must enable since it is disabled in ser_interrupt */
3041 e100_enable_serial_tx_ready_irq(info);
3043 restore_flags(flags);
3045 if (CIRC_CNT(info->xmit.head,
3046 info->xmit.tail,
3047 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3048 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3050 } /* handle_ser_tx_interrupt */
3052 /* result of time measurements:
3053 * RX duration 54-60 us when doing something, otherwise 6-9 us
3054 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3056 static irqreturn_t
3057 ser_interrupt(int irq, void *dev_id)
3059 static volatile int tx_started = 0;
3060 struct e100_serial *info;
3061 int i;
3062 unsigned long flags;
3063 unsigned long irq_mask1_rd;
3064 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3065 int handled = 0;
3066 static volatile unsigned long reentered_ready_mask = 0;
3068 save_flags(flags); cli();
3069 irq_mask1_rd = *R_IRQ_MASK1_RD;
3070 /* First handle all rx interrupts with ints disabled */
3071 info = rs_table;
3072 irq_mask1_rd &= e100_ser_int_mask;
3073 for (i = 0; i < NR_PORTS; i++) {
3074 /* Which line caused the data irq? */
3075 if (irq_mask1_rd & data_mask) {
3076 handled = 1;
3077 handle_ser_rx_interrupt(info);
3079 info += 1;
3080 data_mask <<= 2;
3082 /* Handle tx interrupts with interrupts enabled so we
3083 * can take care of new data interrupts while transmitting
3084 * We protect the tx part with the tx_started flag.
3085 * We disable the tr_ready interrupts we are about to handle and
3086 * unblock the serial interrupt so new serial interrupts may come.
3088 * If we get a new interrupt:
3089 * - it migth be due to synchronous serial ports.
3090 * - serial irq will be blocked by general irq handler.
3091 * - async data will be handled above (sync will be ignored).
3092 * - tx_started flag will prevent us from trying to send again and
3093 * we will exit fast - no need to unblock serial irq.
3094 * - Next (sync) serial interrupt handler will be runned with
3095 * disabled interrupt due to restore_flags() at end of function,
3096 * so sync handler will not be preempted or reentered.
3098 if (!tx_started) {
3099 unsigned long ready_mask;
3100 unsigned long
3101 tx_started = 1;
3102 /* Only the tr_ready interrupts left */
3103 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3104 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3105 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3106 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3107 while (irq_mask1_rd) {
3108 /* Disable those we are about to handle */
3109 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3110 /* Unblock the serial interrupt */
3111 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3113 sti();
3114 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3115 info = rs_table;
3116 for (i = 0; i < NR_PORTS; i++) {
3117 /* Which line caused the ready irq? */
3118 if (irq_mask1_rd & ready_mask) {
3119 handled = 1;
3120 handle_ser_tx_interrupt(info);
3122 info += 1;
3123 ready_mask <<= 2;
3125 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3126 cli();
3127 /* Handle reentered TX interrupt */
3128 irq_mask1_rd = reentered_ready_mask;
3130 cli();
3131 tx_started = 0;
3132 } else {
3133 unsigned long ready_mask;
3134 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3135 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3136 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3137 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3138 if (ready_mask) {
3139 reentered_ready_mask |= ready_mask;
3140 /* Disable those we are about to handle */
3141 *R_IRQ_MASK1_CLR = ready_mask;
3142 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3146 restore_flags(flags);
3147 return IRQ_RETVAL(handled);
3148 } /* ser_interrupt */
3149 #endif
3152 * -------------------------------------------------------------------
3153 * Here ends the serial interrupt routines.
3154 * -------------------------------------------------------------------
3158 * This routine is used to handle the "bottom half" processing for the
3159 * serial driver, known also the "software interrupt" processing.
3160 * This processing is done at the kernel interrupt level, after the
3161 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3162 * is where time-consuming activities which can not be done in the
3163 * interrupt driver proper are done; the interrupt driver schedules
3164 * them using rs_sched_event(), and they get done here.
3166 static void
3167 do_softint(void *private_)
3169 struct e100_serial *info = (struct e100_serial *) private_;
3170 struct tty_struct *tty;
3172 tty = info->tty;
3173 if (!tty)
3174 return;
3176 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
3177 tty_wakeup(tty);
3180 static int
3181 startup(struct e100_serial * info)
3183 unsigned long flags;
3184 unsigned long xmit_page;
3185 int i;
3187 xmit_page = get_zeroed_page(GFP_KERNEL);
3188 if (!xmit_page)
3189 return -ENOMEM;
3191 save_flags(flags);
3192 cli();
3194 /* if it was already initialized, skip this */
3196 if (info->flags & ASYNC_INITIALIZED) {
3197 restore_flags(flags);
3198 free_page(xmit_page);
3199 return 0;
3202 if (info->xmit.buf)
3203 free_page(xmit_page);
3204 else
3205 info->xmit.buf = (unsigned char *) xmit_page;
3207 #ifdef SERIAL_DEBUG_OPEN
3208 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3209 #endif
3211 #ifdef CONFIG_SVINTO_SIM
3212 /* Bits and pieces collected from below. Better to have them
3213 in one ifdef:ed clause than to mix in a lot of ifdefs,
3214 right? */
3215 if (info->tty)
3216 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3218 info->xmit.head = info->xmit.tail = 0;
3219 info->first_recv_buffer = info->last_recv_buffer = NULL;
3220 info->recv_cnt = info->max_recv_cnt = 0;
3222 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3223 info->rec_descr[i].buf = NULL;
3225 /* No real action in the simulator, but may set info important
3226 to ioctl. */
3227 change_speed(info);
3228 #else
3231 * Clear the FIFO buffers and disable them
3232 * (they will be reenabled in change_speed())
3236 * Reset the DMA channels and make sure their interrupts are cleared
3239 if (info->dma_in_enabled) {
3240 info->uses_dma_in = 1;
3241 e100_enable_rxdma_channel(info);
3243 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3245 /* Wait until reset cycle is complete */
3246 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3247 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3249 /* Make sure the irqs are cleared */
3250 *info->iclrintradr =
3251 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3252 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3253 } else {
3254 e100_disable_rxdma_channel(info);
3257 if (info->dma_out_enabled) {
3258 info->uses_dma_out = 1;
3259 e100_enable_txdma_channel(info);
3260 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3262 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3263 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3265 /* Make sure the irqs are cleared */
3266 *info->oclrintradr =
3267 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3268 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3269 } else {
3270 e100_disable_txdma_channel(info);
3273 if (info->tty)
3274 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3276 info->xmit.head = info->xmit.tail = 0;
3277 info->first_recv_buffer = info->last_recv_buffer = NULL;
3278 info->recv_cnt = info->max_recv_cnt = 0;
3280 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3281 info->rec_descr[i].buf = 0;
3284 * and set the speed and other flags of the serial port
3285 * this will start the rx/tx as well
3287 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3288 e100_enable_serial_data_irq(info);
3289 #endif
3290 change_speed(info);
3292 /* dummy read to reset any serial errors */
3294 (void)info->port[REG_DATA];
3296 /* enable the interrupts */
3297 if (info->uses_dma_out)
3298 e100_enable_txdma_irq(info);
3300 e100_enable_rx_irq(info);
3302 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3304 /* setup the dma input descriptor and start dma */
3306 start_receive(info);
3308 /* for safety, make sure the descriptors last result is 0 bytes written */
3310 info->tr_descr.sw_len = 0;
3311 info->tr_descr.hw_len = 0;
3312 info->tr_descr.status = 0;
3314 /* enable RTS/DTR last */
3316 e100_rts(info, 1);
3317 e100_dtr(info, 1);
3319 #endif /* CONFIG_SVINTO_SIM */
3321 info->flags |= ASYNC_INITIALIZED;
3323 restore_flags(flags);
3324 return 0;
3328 * This routine will shutdown a serial port; interrupts are disabled, and
3329 * DTR is dropped if the hangup on close termio flag is on.
3331 static void
3332 shutdown(struct e100_serial * info)
3334 unsigned long flags;
3335 struct etrax_dma_descr *descr = info->rec_descr;
3336 struct etrax_recv_buffer *buffer;
3337 int i;
3339 #ifndef CONFIG_SVINTO_SIM
3340 /* shut down the transmitter and receiver */
3341 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3342 e100_disable_rx(info);
3343 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3345 /* disable interrupts, reset dma channels */
3346 if (info->uses_dma_in) {
3347 e100_disable_rxdma_irq(info);
3348 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3349 info->uses_dma_in = 0;
3350 } else {
3351 e100_disable_serial_data_irq(info);
3354 if (info->uses_dma_out) {
3355 e100_disable_txdma_irq(info);
3356 info->tr_running = 0;
3357 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3358 info->uses_dma_out = 0;
3359 } else {
3360 e100_disable_serial_tx_ready_irq(info);
3361 info->tr_running = 0;
3364 #endif /* CONFIG_SVINTO_SIM */
3366 if (!(info->flags & ASYNC_INITIALIZED))
3367 return;
3369 #ifdef SERIAL_DEBUG_OPEN
3370 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3371 info->irq);
3372 #endif
3374 save_flags(flags);
3375 cli(); /* Disable interrupts */
3377 if (info->xmit.buf) {
3378 free_page((unsigned long)info->xmit.buf);
3379 info->xmit.buf = NULL;
3382 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3383 if (descr[i].buf) {
3384 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3385 kfree(buffer);
3386 descr[i].buf = 0;
3389 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3390 /* hang up DTR and RTS if HUPCL is enabled */
3391 e100_dtr(info, 0);
3392 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3395 if (info->tty)
3396 set_bit(TTY_IO_ERROR, &info->tty->flags);
3398 info->flags &= ~ASYNC_INITIALIZED;
3399 restore_flags(flags);
3403 /* change baud rate and other assorted parameters */
3405 static void
3406 change_speed(struct e100_serial *info)
3408 unsigned int cflag;
3409 unsigned long xoff;
3410 unsigned long flags;
3411 /* first some safety checks */
3413 if (!info->tty || !info->tty->termios)
3414 return;
3415 if (!info->port)
3416 return;
3418 cflag = info->tty->termios->c_cflag;
3420 /* possibly, the tx/rx should be disabled first to do this safely */
3422 /* change baud-rate and write it to the hardware */
3423 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3424 /* Special baudrate */
3425 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3426 unsigned long alt_source =
3427 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3428 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3429 /* R_ALT_SER_BAUDRATE selects the source */
3430 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3431 (unsigned long)info->baud_base, info->custom_divisor));
3432 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3433 /* 0, 2-65535 (0=65536) */
3434 u16 divisor = info->custom_divisor;
3435 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3436 /* baudrate is 3.125MHz/custom_divisor */
3437 alt_source =
3438 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3439 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3440 alt_source = 0x11;
3441 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3442 *R_SERIAL_PRESCALE = divisor;
3443 info->baud = SERIAL_PRESCALE_BASE/divisor;
3445 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3446 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3447 info->custom_divisor == 1) ||
3448 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3449 info->custom_divisor == 8)) {
3450 /* ext_clk selected */
3451 alt_source =
3452 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3453 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3454 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3455 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3458 #endif
3459 else
3461 /* Bad baudbase, we don't support using timer0
3462 * for baudrate.
3464 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3465 (unsigned long)info->baud_base, info->custom_divisor);
3467 r_alt_ser_baudrate_shadow &= ~mask;
3468 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3469 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3470 } else {
3471 /* Normal baudrate */
3472 /* Make sure we use normal baudrate */
3473 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3474 unsigned long alt_source =
3475 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3476 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3477 r_alt_ser_baudrate_shadow &= ~mask;
3478 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3479 #ifndef CONFIG_SVINTO_SIM
3480 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3481 #endif /* CONFIG_SVINTO_SIM */
3483 info->baud = cflag_to_baud(cflag);
3484 #ifndef CONFIG_SVINTO_SIM
3485 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3486 #endif /* CONFIG_SVINTO_SIM */
3489 #ifndef CONFIG_SVINTO_SIM
3490 /* start with default settings and then fill in changes */
3491 save_flags(flags);
3492 cli();
3493 /* 8 bit, no/even parity */
3494 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3495 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3496 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3498 /* 8 bit, no/even parity, 1 stop bit, no cts */
3499 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3500 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3501 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3502 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3503 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3505 if ((cflag & CSIZE) == CS7) {
3506 /* set 7 bit mode */
3507 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3508 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3511 if (cflag & CSTOPB) {
3512 /* set 2 stop bit mode */
3513 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3516 if (cflag & PARENB) {
3517 /* enable parity */
3518 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3519 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3522 if (cflag & CMSPAR) {
3523 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3524 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3525 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3527 if (cflag & PARODD) {
3528 /* set odd parity (or Mark if CMSPAR) */
3529 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3530 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3533 if (cflag & CRTSCTS) {
3534 /* enable automatic CTS handling */
3535 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3536 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3539 /* make sure the tx and rx are enabled */
3541 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3542 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3544 /* actually write the control regs to the hardware */
3546 info->port[REG_TR_CTRL] = info->tx_ctrl;
3547 info->port[REG_REC_CTRL] = info->rx_ctrl;
3548 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3549 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3550 if (info->tty->termios->c_iflag & IXON ) {
3551 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3552 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3555 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3556 restore_flags(flags);
3557 #endif /* !CONFIG_SVINTO_SIM */
3559 update_char_time(info);
3561 } /* change_speed */
3563 /* start transmitting chars NOW */
3565 static void
3566 rs_flush_chars(struct tty_struct *tty)
3568 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3569 unsigned long flags;
3571 if (info->tr_running ||
3572 info->xmit.head == info->xmit.tail ||
3573 tty->stopped ||
3574 tty->hw_stopped ||
3575 !info->xmit.buf)
3576 return;
3578 #ifdef SERIAL_DEBUG_FLOW
3579 printk("rs_flush_chars\n");
3580 #endif
3582 /* this protection might not exactly be necessary here */
3584 save_flags(flags);
3585 cli();
3586 start_transmit(info);
3587 restore_flags(flags);
3590 static int rs_raw_write(struct tty_struct * tty, int from_user,
3591 const unsigned char *buf, int count)
3593 int c, ret = 0;
3594 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3595 unsigned long flags;
3597 /* first some sanity checks */
3599 if (!tty || !info->xmit.buf || !tmp_buf)
3600 return 0;
3602 #ifdef SERIAL_DEBUG_DATA
3603 if (info->line == SERIAL_DEBUG_LINE)
3604 printk("rs_raw_write (%d), status %d\n",
3605 count, info->port[REG_STATUS]);
3606 #endif
3608 #ifdef CONFIG_SVINTO_SIM
3609 /* Really simple. The output is here and now. */
3610 SIMCOUT(buf, count);
3611 return count;
3612 #endif
3613 save_flags(flags);
3614 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3615 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3618 /* the cli/restore_flags pairs below are needed because the
3619 * DMA interrupt handler moves the info->xmit values. the memcpy
3620 * needs to be in the critical region unfortunately, because we
3621 * need to read xmit values, memcpy, write xmit values in one
3622 * atomic operation... this could perhaps be avoided by more clever
3623 * design.
3625 if (from_user) {
3626 mutex_lock(&tmp_buf_mutex);
3627 while (1) {
3628 int c1;
3629 c = CIRC_SPACE_TO_END(info->xmit.head,
3630 info->xmit.tail,
3631 SERIAL_XMIT_SIZE);
3632 if (count < c)
3633 c = count;
3634 if (c <= 0)
3635 break;
3637 c -= copy_from_user(tmp_buf, buf, c);
3638 if (!c) {
3639 if (!ret)
3640 ret = -EFAULT;
3641 break;
3643 cli();
3644 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3645 info->xmit.tail,
3646 SERIAL_XMIT_SIZE);
3647 if (c1 < c)
3648 c = c1;
3649 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3650 info->xmit.head = ((info->xmit.head + c) &
3651 (SERIAL_XMIT_SIZE-1));
3652 restore_flags(flags);
3653 buf += c;
3654 count -= c;
3655 ret += c;
3657 mutex_unlock(&tmp_buf_mutex);
3658 } else {
3659 cli();
3660 while (count) {
3661 c = CIRC_SPACE_TO_END(info->xmit.head,
3662 info->xmit.tail,
3663 SERIAL_XMIT_SIZE);
3665 if (count < c)
3666 c = count;
3667 if (c <= 0)
3668 break;
3670 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3671 info->xmit.head = (info->xmit.head + c) &
3672 (SERIAL_XMIT_SIZE-1);
3673 buf += c;
3674 count -= c;
3675 ret += c;
3677 restore_flags(flags);
3680 /* enable transmitter if not running, unless the tty is stopped
3681 * this does not need IRQ protection since if tr_running == 0
3682 * the IRQ's are not running anyway for this port.
3684 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3686 if (info->xmit.head != info->xmit.tail &&
3687 !tty->stopped &&
3688 !tty->hw_stopped &&
3689 !info->tr_running) {
3690 start_transmit(info);
3693 return ret;
3694 } /* raw_raw_write() */
3696 static int
3697 rs_write(struct tty_struct * tty, int from_user,
3698 const unsigned char *buf, int count)
3700 #if defined(CONFIG_ETRAX_RS485)
3701 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3703 if (info->rs485.enabled)
3705 /* If we are in RS-485 mode, we need to toggle RTS and disable
3706 * the receiver before initiating a DMA transfer
3708 #ifdef CONFIG_ETRAX_FAST_TIMER
3709 /* Abort any started timer */
3710 fast_timers_rs485[info->line].function = NULL;
3711 del_fast_timer(&fast_timers_rs485[info->line]);
3712 #endif
3713 e100_rts(info, info->rs485.rts_on_send);
3714 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3715 e100_disable_rx(info);
3716 e100_enable_rx_irq(info);
3717 #endif
3719 if (info->rs485.delay_rts_before_send > 0)
3720 msleep(info->rs485.delay_rts_before_send);
3722 #endif /* CONFIG_ETRAX_RS485 */
3724 count = rs_raw_write(tty, from_user, buf, count);
3726 #if defined(CONFIG_ETRAX_RS485)
3727 if (info->rs485.enabled)
3729 unsigned int val;
3730 /* If we are in RS-485 mode the following has to be done:
3731 * wait until DMA is ready
3732 * wait on transmit shift register
3733 * toggle RTS
3734 * enable the receiver
3737 /* Sleep until all sent */
3738 tty_wait_until_sent(tty, 0);
3739 #ifdef CONFIG_ETRAX_FAST_TIMER
3740 /* Now sleep a little more so that shift register is empty */
3741 schedule_usleep(info->char_time_usec * 2);
3742 #endif
3743 /* wait on transmit shift register */
3745 get_lsr_info(info, &val);
3746 }while (!(val & TIOCSER_TEMT));
3748 e100_rts(info, info->rs485.rts_after_sent);
3750 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3751 e100_enable_rx(info);
3752 e100_enable_rxdma_irq(info);
3753 #endif
3755 #endif /* CONFIG_ETRAX_RS485 */
3757 return count;
3758 } /* rs_write */
3761 /* how much space is available in the xmit buffer? */
3763 static int
3764 rs_write_room(struct tty_struct *tty)
3766 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3768 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3771 /* How many chars are in the xmit buffer?
3772 * This does not include any chars in the transmitter FIFO.
3773 * Use wait_until_sent for waiting for FIFO drain.
3776 static int
3777 rs_chars_in_buffer(struct tty_struct *tty)
3779 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3781 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3784 /* discard everything in the xmit buffer */
3786 static void
3787 rs_flush_buffer(struct tty_struct *tty)
3789 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3790 unsigned long flags;
3792 save_flags(flags);
3793 cli();
3794 info->xmit.head = info->xmit.tail = 0;
3795 restore_flags(flags);
3797 tty_wakeup(tty);
3801 * This function is used to send a high-priority XON/XOFF character to
3802 * the device
3804 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3805 * but we do it in handle_ser_tx_interrupt().
3806 * We disable DMA channel and enable tx ready interrupt and write the
3807 * character when possible.
3809 static void rs_send_xchar(struct tty_struct *tty, char ch)
3811 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3812 unsigned long flags;
3813 save_flags(flags); cli();
3814 if (info->uses_dma_out) {
3815 /* Put the DMA on hold and disable the channel */
3816 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3817 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3818 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3819 e100_disable_txdma_channel(info);
3822 /* Must make sure transmitter is not stopped before we can transmit */
3823 if (tty->stopped)
3824 rs_start(tty);
3826 /* Enable manual transmit interrupt and send from there */
3827 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3828 info->x_char = ch;
3829 e100_enable_serial_tx_ready_irq(info);
3830 restore_flags(flags);
3834 * ------------------------------------------------------------
3835 * rs_throttle()
3837 * This routine is called by the upper-layer tty layer to signal that
3838 * incoming characters should be throttled.
3839 * ------------------------------------------------------------
3841 static void
3842 rs_throttle(struct tty_struct * tty)
3844 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3845 #ifdef SERIAL_DEBUG_THROTTLE
3846 char buf[64];
3848 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3849 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3850 #endif
3851 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3853 /* Do RTS before XOFF since XOFF might take some time */
3854 if (tty->termios->c_cflag & CRTSCTS) {
3855 /* Turn off RTS line */
3856 e100_rts(info, 0);
3858 if (I_IXOFF(tty))
3859 rs_send_xchar(tty, STOP_CHAR(tty));
3863 static void
3864 rs_unthrottle(struct tty_struct * tty)
3866 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3867 #ifdef SERIAL_DEBUG_THROTTLE
3868 char buf[64];
3870 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3871 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3872 #endif
3873 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3874 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3875 /* Do RTS before XOFF since XOFF might take some time */
3876 if (tty->termios->c_cflag & CRTSCTS) {
3877 /* Assert RTS line */
3878 e100_rts(info, 1);
3881 if (I_IXOFF(tty)) {
3882 if (info->x_char)
3883 info->x_char = 0;
3884 else
3885 rs_send_xchar(tty, START_CHAR(tty));
3891 * ------------------------------------------------------------
3892 * rs_ioctl() and friends
3893 * ------------------------------------------------------------
3896 static int
3897 get_serial_info(struct e100_serial * info,
3898 struct serial_struct * retinfo)
3900 struct serial_struct tmp;
3902 /* this is all probably wrong, there are a lot of fields
3903 * here that we don't have in e100_serial and maybe we
3904 * should set them to something else than 0.
3907 if (!retinfo)
3908 return -EFAULT;
3909 memset(&tmp, 0, sizeof(tmp));
3910 tmp.type = info->type;
3911 tmp.line = info->line;
3912 tmp.port = (int)info->port;
3913 tmp.irq = info->irq;
3914 tmp.flags = info->flags;
3915 tmp.baud_base = info->baud_base;
3916 tmp.close_delay = info->close_delay;
3917 tmp.closing_wait = info->closing_wait;
3918 tmp.custom_divisor = info->custom_divisor;
3919 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3920 return -EFAULT;
3921 return 0;
3924 static int
3925 set_serial_info(struct e100_serial *info,
3926 struct serial_struct *new_info)
3928 struct serial_struct new_serial;
3929 struct e100_serial old_info;
3930 int retval = 0;
3932 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3933 return -EFAULT;
3935 old_info = *info;
3937 if (!capable(CAP_SYS_ADMIN)) {
3938 if ((new_serial.type != info->type) ||
3939 (new_serial.close_delay != info->close_delay) ||
3940 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3941 (info->flags & ~ASYNC_USR_MASK)))
3942 return -EPERM;
3943 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3944 (new_serial.flags & ASYNC_USR_MASK));
3945 goto check_and_exit;
3948 if (info->count > 1)
3949 return -EBUSY;
3952 * OK, past this point, all the error checking has been done.
3953 * At this point, we start making changes.....
3956 info->baud_base = new_serial.baud_base;
3957 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3958 (new_serial.flags & ASYNC_FLAGS));
3959 info->custom_divisor = new_serial.custom_divisor;
3960 info->type = new_serial.type;
3961 info->close_delay = new_serial.close_delay;
3962 info->closing_wait = new_serial.closing_wait;
3963 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3965 check_and_exit:
3966 if (info->flags & ASYNC_INITIALIZED) {
3967 change_speed(info);
3968 } else
3969 retval = startup(info);
3970 return retval;
3974 * get_lsr_info - get line status register info
3976 * Purpose: Let user call ioctl() to get info when the UART physically
3977 * is emptied. On bus types like RS485, the transmitter must
3978 * release the bus after transmitting. This must be done when
3979 * the transmit shift register is empty, not be done when the
3980 * transmit holding register is empty. This functionality
3981 * allows an RS485 driver to be written in user space.
3983 static int
3984 get_lsr_info(struct e100_serial * info, unsigned int *value)
3986 unsigned int result = TIOCSER_TEMT;
3987 #ifndef CONFIG_SVINTO_SIM
3988 unsigned long curr_time = jiffies;
3989 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3990 unsigned long elapsed_usec =
3991 (curr_time - info->last_tx_active) * 1000000/HZ +
3992 curr_time_usec - info->last_tx_active_usec;
3994 if (info->xmit.head != info->xmit.tail ||
3995 elapsed_usec < 2*info->char_time_usec) {
3996 result = 0;
3998 #endif
4000 if (copy_to_user(value, &result, sizeof(int)))
4001 return -EFAULT;
4002 return 0;
4005 #ifdef SERIAL_DEBUG_IO
4006 struct state_str
4008 int state;
4009 const char *str;
4012 const struct state_str control_state_str[] = {
4013 {TIOCM_DTR, "DTR" },
4014 {TIOCM_RTS, "RTS"},
4015 {TIOCM_ST, "ST?" },
4016 {TIOCM_SR, "SR?" },
4017 {TIOCM_CTS, "CTS" },
4018 {TIOCM_CD, "CD" },
4019 {TIOCM_RI, "RI" },
4020 {TIOCM_DSR, "DSR" },
4021 {0, NULL }
4024 char *get_control_state_str(int MLines, char *s)
4026 int i = 0;
4028 s[0]='\0';
4029 while (control_state_str[i].str != NULL) {
4030 if (MLines & control_state_str[i].state) {
4031 if (s[0] != '\0') {
4032 strcat(s, ", ");
4034 strcat(s, control_state_str[i].str);
4036 i++;
4038 return s;
4040 #endif
4042 static int
4043 get_modem_info(struct e100_serial * info, unsigned int *value)
4045 unsigned int result;
4046 /* Polarity isn't verified */
4047 #if 0 /*def SERIAL_DEBUG_IO */
4049 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4050 E100_RTS_GET(info),
4051 E100_DTR_GET(info),
4052 E100_CD_GET(info),
4053 E100_RI_GET(info),
4054 E100_DSR_GET(info),
4055 E100_CTS_GET(info));
4056 #endif
4058 result =
4059 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4060 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4061 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4062 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4063 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4064 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4066 #ifdef SERIAL_DEBUG_IO
4067 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4069 char s[100];
4071 get_control_state_str(result, s);
4072 printk("state: %s\n", s);
4074 #endif
4075 if (copy_to_user(value, &result, sizeof(int)))
4076 return -EFAULT;
4077 return 0;
4081 static int
4082 set_modem_info(struct e100_serial * info, unsigned int cmd,
4083 unsigned int *value)
4085 unsigned int arg;
4087 if (copy_from_user(&arg, value, sizeof(int)))
4088 return -EFAULT;
4090 switch (cmd) {
4091 case TIOCMBIS:
4092 if (arg & TIOCM_RTS) {
4093 e100_rts(info, 1);
4095 if (arg & TIOCM_DTR) {
4096 e100_dtr(info, 1);
4098 /* Handle FEMALE behaviour */
4099 if (arg & TIOCM_RI) {
4100 e100_ri_out(info, 1);
4102 if (arg & TIOCM_CD) {
4103 e100_cd_out(info, 1);
4105 break;
4106 case TIOCMBIC:
4107 if (arg & TIOCM_RTS) {
4108 e100_rts(info, 0);
4110 if (arg & TIOCM_DTR) {
4111 e100_dtr(info, 0);
4113 /* Handle FEMALE behaviour */
4114 if (arg & TIOCM_RI) {
4115 e100_ri_out(info, 0);
4117 if (arg & TIOCM_CD) {
4118 e100_cd_out(info, 0);
4120 break;
4121 case TIOCMSET:
4122 e100_rts(info, arg & TIOCM_RTS);
4123 e100_dtr(info, arg & TIOCM_DTR);
4124 /* Handle FEMALE behaviour */
4125 e100_ri_out(info, arg & TIOCM_RI);
4126 e100_cd_out(info, arg & TIOCM_CD);
4127 break;
4128 default:
4129 return -EINVAL;
4131 return 0;
4135 static void
4136 rs_break(struct tty_struct *tty, int break_state)
4138 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4139 unsigned long flags;
4141 if (!info->port)
4142 return;
4144 save_flags(flags);
4145 cli();
4146 if (break_state == -1) {
4147 /* Go to manual mode and set the txd pin to 0 */
4148 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4149 } else {
4150 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4152 info->port[REG_TR_CTRL] = info->tx_ctrl;
4153 restore_flags(flags);
4156 static int
4157 rs_ioctl(struct tty_struct *tty, struct file * file,
4158 unsigned int cmd, unsigned long arg)
4160 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4162 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4163 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4164 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4165 if (tty->flags & (1 << TTY_IO_ERROR))
4166 return -EIO;
4169 switch (cmd) {
4170 case TIOCMGET:
4171 return get_modem_info(info, (unsigned int *) arg);
4172 case TIOCMBIS:
4173 case TIOCMBIC:
4174 case TIOCMSET:
4175 return set_modem_info(info, cmd, (unsigned int *) arg);
4176 case TIOCGSERIAL:
4177 return get_serial_info(info,
4178 (struct serial_struct *) arg);
4179 case TIOCSSERIAL:
4180 return set_serial_info(info,
4181 (struct serial_struct *) arg);
4182 case TIOCSERGETLSR: /* Get line status register */
4183 return get_lsr_info(info, (unsigned int *) arg);
4185 case TIOCSERGSTRUCT:
4186 if (copy_to_user((struct e100_serial *) arg,
4187 info, sizeof(struct e100_serial)))
4188 return -EFAULT;
4189 return 0;
4191 #if defined(CONFIG_ETRAX_RS485)
4192 case TIOCSERSETRS485:
4194 struct rs485_control rs485ctrl;
4195 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4196 return -EFAULT;
4198 return e100_enable_rs485(tty, &rs485ctrl);
4201 case TIOCSERWRRS485:
4203 struct rs485_write rs485wr;
4204 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4205 return -EFAULT;
4207 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4209 #endif
4211 default:
4212 return -ENOIOCTLCMD;
4214 return 0;
4217 static void
4218 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
4220 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4222 if (tty->termios->c_cflag == old_termios->c_cflag &&
4223 tty->termios->c_iflag == old_termios->c_iflag)
4224 return;
4226 change_speed(info);
4228 /* Handle turning off CRTSCTS */
4229 if ((old_termios->c_cflag & CRTSCTS) &&
4230 !(tty->termios->c_cflag & CRTSCTS)) {
4231 tty->hw_stopped = 0;
4232 rs_start(tty);
4237 /* In debugport.c - register a console write function that uses the normal
4238 * serial driver
4240 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4242 extern debugport_write_function debug_write_function;
4244 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4246 int cnt;
4247 int written = 0;
4248 struct tty_struct *tty;
4249 static int recurse_cnt = 0;
4251 tty = rs_table[i].tty;
4252 if (tty) {
4253 unsigned long flags;
4254 if (recurse_cnt > 5) /* We skip this debug output */
4255 return 1;
4257 local_irq_save(flags);
4258 recurse_cnt++;
4259 local_irq_restore(flags);
4260 do {
4261 cnt = rs_write(tty, 0, buf + written, len);
4262 if (cnt >= 0) {
4263 written += cnt;
4264 buf += cnt;
4265 len -= cnt;
4266 } else
4267 len = cnt;
4268 } while(len > 0);
4269 local_irq_save(flags);
4270 recurse_cnt--;
4271 local_irq_restore(flags);
4272 return 1;
4274 return 0;
4278 * ------------------------------------------------------------
4279 * rs_close()
4281 * This routine is called when the serial port gets closed. First, we
4282 * wait for the last remaining data to be sent. Then, we unlink its
4283 * S structure from the interrupt chain if necessary, and we free
4284 * that IRQ if nothing is left in the chain.
4285 * ------------------------------------------------------------
4287 static void
4288 rs_close(struct tty_struct *tty, struct file * filp)
4290 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4291 unsigned long flags;
4293 if (!info)
4294 return;
4296 /* interrupts are disabled for this entire function */
4298 save_flags(flags);
4299 cli();
4301 if (tty_hung_up_p(filp)) {
4302 restore_flags(flags);
4303 return;
4306 #ifdef SERIAL_DEBUG_OPEN
4307 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4308 info->line, info->count);
4309 #endif
4310 if ((tty->count == 1) && (info->count != 1)) {
4312 * Uh, oh. tty->count is 1, which means that the tty
4313 * structure will be freed. Info->count should always
4314 * be one in these conditions. If it's greater than
4315 * one, we've got real problems, since it means the
4316 * serial port won't be shutdown.
4318 printk(KERN_CRIT
4319 "rs_close: bad serial port count; tty->count is 1, "
4320 "info->count is %d\n", info->count);
4321 info->count = 1;
4323 if (--info->count < 0) {
4324 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4325 info->line, info->count);
4326 info->count = 0;
4328 if (info->count) {
4329 restore_flags(flags);
4330 return;
4332 info->flags |= ASYNC_CLOSING;
4334 * Save the termios structure, since this port may have
4335 * separate termios for callout and dialin.
4337 if (info->flags & ASYNC_NORMAL_ACTIVE)
4338 info->normal_termios = *tty->termios;
4340 * Now we wait for the transmit buffer to clear; and we notify
4341 * the line discipline to only process XON/XOFF characters.
4343 tty->closing = 1;
4344 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4345 tty_wait_until_sent(tty, info->closing_wait);
4347 * At this point we stop accepting input. To do this, we
4348 * disable the serial receiver and the DMA receive interrupt.
4350 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4351 e100_disable_serial_data_irq(info);
4352 #endif
4354 #ifndef CONFIG_SVINTO_SIM
4355 e100_disable_rx(info);
4356 e100_disable_rx_irq(info);
4358 if (info->flags & ASYNC_INITIALIZED) {
4360 * Before we drop DTR, make sure the UART transmitter
4361 * has completely drained; this is especially
4362 * important as we have a transmit FIFO!
4364 rs_wait_until_sent(tty, HZ);
4366 #endif
4368 shutdown(info);
4369 if (tty->driver->flush_buffer)
4370 tty->driver->flush_buffer(tty);
4371 if (tty->ldisc.flush_buffer)
4372 tty->ldisc.flush_buffer(tty);
4373 tty->closing = 0;
4374 info->event = 0;
4375 info->tty = 0;
4376 if (info->blocked_open) {
4377 if (info->close_delay)
4378 schedule_timeout_interruptible(info->close_delay);
4379 wake_up_interruptible(&info->open_wait);
4381 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4382 wake_up_interruptible(&info->close_wait);
4383 restore_flags(flags);
4385 /* port closed */
4387 #if defined(CONFIG_ETRAX_RS485)
4388 if (info->rs485.enabled) {
4389 info->rs485.enabled = 0;
4390 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4391 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4392 #endif
4393 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4394 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4395 rs485_port_g_bit, 0);
4396 #endif
4397 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4398 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4399 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4400 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4401 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4402 #endif
4404 #endif
4408 * rs_wait_until_sent() --- wait until the transmitter is empty
4410 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4412 unsigned long orig_jiffies;
4413 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4414 unsigned long curr_time = jiffies;
4415 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4416 long elapsed_usec =
4417 (curr_time - info->last_tx_active) * (1000000/HZ) +
4418 curr_time_usec - info->last_tx_active_usec;
4421 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4422 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4424 orig_jiffies = jiffies;
4425 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4426 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4427 (elapsed_usec < 2*info->char_time_usec)) {
4428 schedule_timeout_interruptible(1);
4429 if (signal_pending(current))
4430 break;
4431 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4432 break;
4433 curr_time = jiffies;
4434 curr_time_usec = GET_JIFFIES_USEC();
4435 elapsed_usec =
4436 (curr_time - info->last_tx_active) * (1000000/HZ) +
4437 curr_time_usec - info->last_tx_active_usec;
4439 set_current_state(TASK_RUNNING);
4443 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4445 void
4446 rs_hangup(struct tty_struct *tty)
4448 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4450 rs_flush_buffer(tty);
4451 shutdown(info);
4452 info->event = 0;
4453 info->count = 0;
4454 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4455 info->tty = 0;
4456 wake_up_interruptible(&info->open_wait);
4460 * ------------------------------------------------------------
4461 * rs_open() and friends
4462 * ------------------------------------------------------------
4464 static int
4465 block_til_ready(struct tty_struct *tty, struct file * filp,
4466 struct e100_serial *info)
4468 DECLARE_WAITQUEUE(wait, current);
4469 unsigned long flags;
4470 int retval;
4471 int do_clocal = 0, extra_count = 0;
4474 * If the device is in the middle of being closed, then block
4475 * until it's done, and then try again.
4477 if (tty_hung_up_p(filp) ||
4478 (info->flags & ASYNC_CLOSING)) {
4479 if (info->flags & ASYNC_CLOSING)
4480 interruptible_sleep_on(&info->close_wait);
4481 #ifdef SERIAL_DO_RESTART
4482 if (info->flags & ASYNC_HUP_NOTIFY)
4483 return -EAGAIN;
4484 else
4485 return -ERESTARTSYS;
4486 #else
4487 return -EAGAIN;
4488 #endif
4492 * If non-blocking mode is set, or the port is not enabled,
4493 * then make the check up front and then exit.
4495 if ((filp->f_flags & O_NONBLOCK) ||
4496 (tty->flags & (1 << TTY_IO_ERROR))) {
4497 info->flags |= ASYNC_NORMAL_ACTIVE;
4498 return 0;
4501 if (tty->termios->c_cflag & CLOCAL) {
4502 do_clocal = 1;
4506 * Block waiting for the carrier detect and the line to become
4507 * free (i.e., not in use by the callout). While we are in
4508 * this loop, info->count is dropped by one, so that
4509 * rs_close() knows when to free things. We restore it upon
4510 * exit, either normal or abnormal.
4512 retval = 0;
4513 add_wait_queue(&info->open_wait, &wait);
4514 #ifdef SERIAL_DEBUG_OPEN
4515 printk("block_til_ready before block: ttyS%d, count = %d\n",
4516 info->line, info->count);
4517 #endif
4518 save_flags(flags);
4519 cli();
4520 if (!tty_hung_up_p(filp)) {
4521 extra_count++;
4522 info->count--;
4524 restore_flags(flags);
4525 info->blocked_open++;
4526 while (1) {
4527 save_flags(flags);
4528 cli();
4529 /* assert RTS and DTR */
4530 e100_rts(info, 1);
4531 e100_dtr(info, 1);
4532 restore_flags(flags);
4533 set_current_state(TASK_INTERRUPTIBLE);
4534 if (tty_hung_up_p(filp) ||
4535 !(info->flags & ASYNC_INITIALIZED)) {
4536 #ifdef SERIAL_DO_RESTART
4537 if (info->flags & ASYNC_HUP_NOTIFY)
4538 retval = -EAGAIN;
4539 else
4540 retval = -ERESTARTSYS;
4541 #else
4542 retval = -EAGAIN;
4543 #endif
4544 break;
4546 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4547 /* && (do_clocal || DCD_IS_ASSERTED) */
4548 break;
4549 if (signal_pending(current)) {
4550 retval = -ERESTARTSYS;
4551 break;
4553 #ifdef SERIAL_DEBUG_OPEN
4554 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4555 info->line, info->count);
4556 #endif
4557 schedule();
4559 set_current_state(TASK_RUNNING);
4560 remove_wait_queue(&info->open_wait, &wait);
4561 if (extra_count)
4562 info->count++;
4563 info->blocked_open--;
4564 #ifdef SERIAL_DEBUG_OPEN
4565 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4566 info->line, info->count);
4567 #endif
4568 if (retval)
4569 return retval;
4570 info->flags |= ASYNC_NORMAL_ACTIVE;
4571 return 0;
4575 * This routine is called whenever a serial port is opened.
4576 * It performs the serial-specific initialization for the tty structure.
4578 static int
4579 rs_open(struct tty_struct *tty, struct file * filp)
4581 struct e100_serial *info;
4582 int retval, line;
4583 unsigned long page;
4585 /* find which port we want to open */
4587 line = tty->index;
4589 if (line < 0 || line >= NR_PORTS)
4590 return -ENODEV;
4592 /* find the corresponding e100_serial struct in the table */
4593 info = rs_table + line;
4595 /* don't allow the opening of ports that are not enabled in the HW config */
4596 if (!info->enabled)
4597 return -ENODEV;
4599 #ifdef SERIAL_DEBUG_OPEN
4600 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4601 info->count);
4602 #endif
4604 info->count++;
4605 tty->driver_data = info;
4606 info->tty = tty;
4608 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4610 if (!tmp_buf) {
4611 page = get_zeroed_page(GFP_KERNEL);
4612 if (!page) {
4613 return -ENOMEM;
4615 if (tmp_buf)
4616 free_page(page);
4617 else
4618 tmp_buf = (unsigned char *) page;
4622 * If the port is in the middle of closing, bail out now
4624 if (tty_hung_up_p(filp) ||
4625 (info->flags & ASYNC_CLOSING)) {
4626 if (info->flags & ASYNC_CLOSING)
4627 interruptible_sleep_on(&info->close_wait);
4628 #ifdef SERIAL_DO_RESTART
4629 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4630 -EAGAIN : -ERESTARTSYS);
4631 #else
4632 return -EAGAIN;
4633 #endif
4637 * Start up the serial port
4640 retval = startup(info);
4641 if (retval)
4642 return retval;
4644 retval = block_til_ready(tty, filp, info);
4645 if (retval) {
4646 #ifdef SERIAL_DEBUG_OPEN
4647 printk("rs_open returning after block_til_ready with %d\n",
4648 retval);
4649 #endif
4650 return retval;
4653 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4654 *tty->termios = info->normal_termios;
4655 change_speed(info);
4658 #ifdef SERIAL_DEBUG_OPEN
4659 printk("rs_open ttyS%d successful...\n", info->line);
4660 #endif
4661 DLOG_INT_TRIG( log_int_pos = 0);
4663 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4664 info->icount.rx = 0;
4665 } );
4667 return 0;
4671 * /proc fs routines....
4674 static int line_info(char *buf, struct e100_serial *info)
4676 char stat_buf[30];
4677 int ret;
4678 unsigned long tmp;
4680 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4681 info->line, (unsigned long)info->port, info->irq);
4683 if (!info->port || (info->type == PORT_UNKNOWN)) {
4684 ret += sprintf(buf+ret, "\n");
4685 return ret;
4688 stat_buf[0] = 0;
4689 stat_buf[1] = 0;
4690 if (!E100_RTS_GET(info))
4691 strcat(stat_buf, "|RTS");
4692 if (!E100_CTS_GET(info))
4693 strcat(stat_buf, "|CTS");
4694 if (!E100_DTR_GET(info))
4695 strcat(stat_buf, "|DTR");
4696 if (!E100_DSR_GET(info))
4697 strcat(stat_buf, "|DSR");
4698 if (!E100_CD_GET(info))
4699 strcat(stat_buf, "|CD");
4700 if (!E100_RI_GET(info))
4701 strcat(stat_buf, "|RI");
4703 ret += sprintf(buf+ret, " baud:%d", info->baud);
4705 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4706 (unsigned long)info->icount.tx,
4707 (unsigned long)info->icount.rx);
4708 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4709 if (tmp) {
4710 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4711 (unsigned long)tmp,
4712 (unsigned long)SERIAL_XMIT_SIZE);
4715 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4716 (unsigned long)info->recv_cnt,
4717 (unsigned long)info->max_recv_cnt);
4719 #if 1
4720 if (info->tty) {
4722 if (info->tty->stopped)
4723 ret += sprintf(buf+ret, " stopped:%i",
4724 (int)info->tty->stopped);
4725 if (info->tty->hw_stopped)
4726 ret += sprintf(buf+ret, " hw_stopped:%i",
4727 (int)info->tty->hw_stopped);
4731 unsigned char rstat = info->port[REG_STATUS];
4732 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4733 ret += sprintf(buf+ret, " xoff_detect:1");
4736 #endif
4741 if (info->icount.frame)
4742 ret += sprintf(buf+ret, " fe:%lu",
4743 (unsigned long)info->icount.frame);
4745 if (info->icount.parity)
4746 ret += sprintf(buf+ret, " pe:%lu",
4747 (unsigned long)info->icount.parity);
4749 if (info->icount.brk)
4750 ret += sprintf(buf+ret, " brk:%lu",
4751 (unsigned long)info->icount.brk);
4753 if (info->icount.overrun)
4754 ret += sprintf(buf+ret, " oe:%lu",
4755 (unsigned long)info->icount.overrun);
4758 * Last thing is the RS-232 status lines
4760 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4761 return ret;
4764 int rs_read_proc(char *page, char **start, off_t off, int count,
4765 int *eof, void *data)
4767 int i, len = 0, l;
4768 off_t begin = 0;
4770 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4771 serial_version);
4772 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4773 if (!rs_table[i].enabled)
4774 continue;
4775 l = line_info(page + len, &rs_table[i]);
4776 len += l;
4777 if (len+begin > off+count)
4778 goto done;
4779 if (len+begin < off) {
4780 begin += len;
4781 len = 0;
4784 #ifdef DEBUG_LOG_INCLUDED
4785 for (i = 0; i < debug_log_pos; i++) {
4786 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4787 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4788 if (len+begin > off+count)
4789 goto done;
4790 if (len+begin < off) {
4791 begin += len;
4792 len = 0;
4795 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4796 i, DEBUG_LOG_SIZE, begin+len);
4797 debug_log_pos = 0;
4798 #endif
4800 *eof = 1;
4801 done:
4802 if (off >= len+begin)
4803 return 0;
4804 *start = page + (off-begin);
4805 return ((count < begin+len-off) ? count : begin+len-off);
4808 /* Finally, routines used to initialize the serial driver. */
4810 static void
4811 show_serial_version(void)
4813 printk(KERN_INFO
4814 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4815 &serial_version[11]); /* "$Revision: x.yy" */
4818 /* rs_init inits the driver at boot (using the module_init chain) */
4820 static const struct tty_operations rs_ops = {
4821 .open = rs_open,
4822 .close = rs_close,
4823 .write = rs_write,
4824 .flush_chars = rs_flush_chars,
4825 .write_room = rs_write_room,
4826 .chars_in_buffer = rs_chars_in_buffer,
4827 .flush_buffer = rs_flush_buffer,
4828 .ioctl = rs_ioctl,
4829 .throttle = rs_throttle,
4830 .unthrottle = rs_unthrottle,
4831 .set_termios = rs_set_termios,
4832 .stop = rs_stop,
4833 .start = rs_start,
4834 .hangup = rs_hangup,
4835 .break_ctl = rs_break,
4836 .send_xchar = rs_send_xchar,
4837 .wait_until_sent = rs_wait_until_sent,
4838 .read_proc = rs_read_proc,
4841 static int __init
4842 rs_init(void)
4844 int i;
4845 struct e100_serial *info;
4846 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4848 if (!driver)
4849 return -ENOMEM;
4851 show_serial_version();
4853 /* Setup the timed flush handler system */
4855 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4856 init_timer(&flush_timer);
4857 flush_timer.function = timed_flush_handler;
4858 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4859 #endif
4861 /* Initialize the tty_driver structure */
4863 driver->driver_name = "serial";
4864 driver->name = "ttyS";
4865 driver->major = TTY_MAJOR;
4866 driver->minor_start = 64;
4867 driver->type = TTY_DRIVER_TYPE_SERIAL;
4868 driver->subtype = SERIAL_TYPE_NORMAL;
4869 driver->init_termios = tty_std_termios;
4870 driver->init_termios.c_cflag =
4871 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4872 driver->init_termios.c_ispeed = 115200;
4873 driver->init_termios.c_ospeed = 115200;
4874 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4875 driver->termios = serial_termios;
4876 driver->termios_locked = serial_termios_locked;
4878 tty_set_operations(driver, &rs_ops);
4879 serial_driver = driver;
4880 if (tty_register_driver(driver))
4881 panic("Couldn't register serial driver\n");
4882 /* do some initializing for the separate ports */
4884 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4885 info->uses_dma_in = 0;
4886 info->uses_dma_out = 0;
4887 info->line = i;
4888 info->tty = 0;
4889 info->type = PORT_ETRAX;
4890 info->tr_running = 0;
4891 info->forced_eop = 0;
4892 info->baud_base = DEF_BAUD_BASE;
4893 info->custom_divisor = 0;
4894 info->flags = 0;
4895 info->close_delay = 5*HZ/10;
4896 info->closing_wait = 30*HZ;
4897 info->x_char = 0;
4898 info->event = 0;
4899 info->count = 0;
4900 info->blocked_open = 0;
4901 info->normal_termios = driver->init_termios;
4902 init_waitqueue_head(&info->open_wait);
4903 init_waitqueue_head(&info->close_wait);
4904 info->xmit.buf = NULL;
4905 info->xmit.tail = info->xmit.head = 0;
4906 info->first_recv_buffer = info->last_recv_buffer = NULL;
4907 info->recv_cnt = info->max_recv_cnt = 0;
4908 info->last_tx_active_usec = 0;
4909 info->last_tx_active = 0;
4911 #if defined(CONFIG_ETRAX_RS485)
4912 /* Set sane defaults */
4913 info->rs485.rts_on_send = 0;
4914 info->rs485.rts_after_sent = 1;
4915 info->rs485.delay_rts_before_send = 0;
4916 info->rs485.enabled = 0;
4917 #endif
4918 INIT_WORK(&info->work, do_softint, info);
4920 if (info->enabled) {
4921 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4922 serial_driver->name, info->line, (unsigned int)info->port);
4925 #ifdef CONFIG_ETRAX_FAST_TIMER
4926 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4927 memset(fast_timers, 0, sizeof(fast_timers));
4928 #endif
4929 #ifdef CONFIG_ETRAX_RS485
4930 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4931 #endif
4932 fast_timer_init();
4933 #endif
4935 #ifndef CONFIG_SVINTO_SIM
4936 /* Not needed in simulator. May only complicate stuff. */
4937 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4939 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", NULL))
4940 panic("irq8");
4942 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4943 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4944 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 0 dma tr", NULL))
4945 panic("irq22");
4946 #endif
4947 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4948 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 0 dma rec", NULL))
4949 panic("irq23");
4950 #endif
4951 #endif
4953 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4954 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4955 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 1 dma tr", NULL))
4956 panic("irq24");
4957 #endif
4958 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4959 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 1 dma rec", NULL))
4960 panic("irq25");
4961 #endif
4962 #endif
4963 #ifdef CONFIG_ETRAX_SERIAL_PORT2
4964 /* DMA Shared with par0 (and SCSI0 and ATA) */
4965 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
4966 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma tr", NULL))
4967 panic("irq18");
4968 #endif
4969 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
4970 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma rec", NULL))
4971 panic("irq19");
4972 #endif
4973 #endif
4974 #ifdef CONFIG_ETRAX_SERIAL_PORT3
4975 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
4976 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
4977 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma tr", NULL))
4978 panic("irq20");
4979 #endif
4980 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
4981 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma rec", NULL))
4982 panic("irq21");
4983 #endif
4984 #endif
4986 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
4987 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, IRQF_SHARED | IRQF_DISABLED,
4988 "fast serial dma timeout", NULL)) {
4989 printk(KERN_CRIT "err: timer1 irq\n");
4991 #endif
4992 #endif /* CONFIG_SVINTO_SIM */
4993 debug_write_function = rs_debug_write_function;
4994 return 0;
4997 /* this makes sure that rs_init is called during kernel boot */
4999 module_init(rs_init);