arch/cris/arch-v32/kernel/kgdb.c

   1 /*
   2  *  arch/cris/arch-v32/kernel/kgdb.c
   3  *
   4  *  CRIS v32 version by Orjan Friberg, Axis Communications AB.
   5  *
   6  *  S390 version
   7  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   8  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
   9  *
  10  *  Originally written by Glenn Engel, Lake Stevens Instrument Division
  11  *
  12  *  Contributed by HP Systems
  13  *
  14  *  Modified for SPARC by Stu Grossman, Cygnus Support.
  15  *
  16  *  Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
  17  *  Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
  18  *
  19  *  Copyright (C) 1995 Andreas Busse
  20  */
  21
  22 /* FIXME: Check the documentation. */
  23
  24 /*
  25  *  kgdb usage notes:
  26  *  -----------------
  27  *
  28  * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
  29  * built with different gcc flags: "-g" is added to get debug infos, and
  30  * "-fomit-frame-pointer" is omitted to make debugging easier. Since the
  31  * resulting kernel will be quite big (approx. > 7 MB), it will be stripped
  32  * before compresion. Such a kernel will behave just as usually, except if
  33  * given a "debug=<device>" command line option. (Only serial devices are
  34  * allowed for <device>, i.e. no printers or the like; possible values are
  35  * machine depedend and are the same as for the usual debug device, the one
  36  * for logging kernel messages.) If that option is given and the device can be
  37  * initialized, the kernel will connect to the remote gdb in trap_init(). The
  38  * serial parameters are fixed to 8N1 and 115200 bps, for easyness of
  39  * implementation.
  40  *
  41  * To start a debugging session, start that gdb with the debugging kernel
  42  * image (the one with the symbols, vmlinux.debug) named on the command line.
  43  * This file will be used by gdb to get symbol and debugging infos about the
  44  * kernel. Next, select remote debug mode by
  45  *    target remote <device>
  46  * where <device> is the name of the serial device over which the debugged
  47  * machine is connected. Maybe you have to adjust the baud rate by
  48  *    set remotebaud <rate>
  49  * or also other parameters with stty:
  50  *    shell stty ... </dev/...
  51  * If the kernel to debug has already booted, it waited for gdb and now
  52  * connects, and you'll see a breakpoint being reported. If the kernel isn't
  53  * running yet, start it now. The order of gdb and the kernel doesn't matter.
  54  * Another thing worth knowing about in the getting-started phase is how to
  55  * debug the remote protocol itself. This is activated with
  56  *    set remotedebug 1
  57  * gdb will then print out each packet sent or received. You'll also get some
  58  * messages about the gdb stub on the console of the debugged machine.
  59  *
  60  * If all that works, you can use lots of the usual debugging techniques on
  61  * the kernel, e.g. inspecting and changing variables/memory, setting
  62  * breakpoints, single stepping and so on. It's also possible to interrupt the
  63  * debugged kernel by pressing C-c in gdb. Have fun! :-)
  64  *
  65  * The gdb stub is entered (and thus the remote gdb gets control) in the
  66  * following situations:
  67  *
  68  *  - If breakpoint() is called. This is just after kgdb initialization, or if
  69  *    a breakpoint() call has been put somewhere into the kernel source.
  70  *    (Breakpoints can of course also be set the usual way in gdb.)
  71  *    In eLinux, we call breakpoint() in init/main.c after IRQ initialization.
  72  *
  73  *  - If there is a kernel exception, i.e. bad_super_trap() or die_if_kernel()
  74  *    are entered. All the CPU exceptions are mapped to (more or less..., see
  75  *    the hard_trap_info array below) appropriate signal, which are reported
  76  *    to gdb. die_if_kernel() is usually called after some kind of access
  77  *    error and thus is reported as SIGSEGV.
  78  *
  79  *  - When panic() is called. This is reported as SIGABRT.
  80  *
  81  *  - If C-c is received over the serial line, which is treated as
  82  *    SIGINT.
  83  *
  84  * Of course, all these signals are just faked for gdb, since there is no
  85  * signal concept as such for the kernel. It also isn't possible --obviously--
  86  * to set signal handlers from inside gdb, or restart the kernel with a
  87  * signal.
  88  *
  89  * Current limitations:
  90  *
  91  *  - While the kernel is stopped, interrupts are disabled for safety reasons
  92  *    (i.e., variables not changing magically or the like). But this also
  93  *    means that the clock isn't running anymore, and that interrupts from the
  94  *    hardware may get lost/not be served in time. This can cause some device
  95  *    errors...
  96  *
  97  *  - When single-stepping, only one instruction of the current thread is
  98  *    executed, but interrupts are allowed for that time and will be serviced
  99  *    if pending. Be prepared for that.
 100  *
 101  *  - All debugging happens in kernel virtual address space. There's no way to
 102  *    access physical memory not mapped in kernel space, or to access user
 103  *    space. A way to work around this is using get_user_long & Co. in gdb
 104  *    expressions, but only for the current process.
 105  *
 106  *  - Interrupting the kernel only works if interrupts are currently allowed,
 107  *    and the interrupt of the serial line isn't blocked by some other means
 108  *    (IPL too high, disabled, ...)
 109  *
 110  *  - The gdb stub is currently not reentrant, i.e. errors that happen therein
 111  *    (e.g. accessing invalid memory) may not be caught correctly. This could
 112  *    be removed in future by introducing a stack of struct registers.
 113  *
 114  */
 115
 116 /*
 117  *  To enable debugger support, two things need to happen.  One, a
 118  *  call to kgdb_init() is necessary in order to allow any breakpoints
 119  *  or error conditions to be properly intercepted and reported to gdb.
 120  *  Two, a breakpoint needs to be generated to begin communication.  This
 121  *  is most easily accomplished by a call to breakpoint().
 122  *
 123  *    The following gdb commands are supported:
 124  *
 125  * command          function                               Return value
 126  *
 127  *    g             return the value of the CPU registers  hex data or ENN
 128  *    G             set the value of the CPU registers     OK or ENN
 129  *
 130  *    mAA..AA,LLLL  Read LLLL bytes at address AA..AA      hex data or ENN
 131  *    MAA..AA,LLLL: Write LLLL bytes at address AA.AA      OK or ENN
 132  *
 133  *    c             Resume at current address              SNN   ( signal NN)
 134  *    cAA..AA       Continue at address AA..AA             SNN
 135  *
 136  *    s             Step one instruction                   SNN
 137  *    sAA..AA       Step one instruction from AA..AA       SNN
 138  *
 139  *    k             kill
 140  *
 141  *    ?             What was the last sigval ?             SNN   (signal NN)
 142  *
 143  *    bBB..BB       Set baud rate to BB..BB                OK or BNN, then sets
 144  *                                                         baud rate
 145  *
 146  * All commands and responses are sent with a packet which includes a
 147  * checksum.  A packet consists of
 148  *
 149  * $<packet info>#<checksum>.
 150  *
 151  * where
 152  * <packet info> :: <characters representing the command or response>
 153  * <checksum>    :: < two hex digits computed as modulo 256 sum of <packetinfo>>
 154  *
 155  * When a packet is received, it is first acknowledged with either '+' or '-'.
 156  * '+' indicates a successful transfer.  '-' indicates a failed transfer.
 157  *
 158  * Example:
 159  *
 160  * Host:                  Reply:
 161  * $m0,10#2a               +$00010203040506070809101112131415#42
 162  *
 163  */
 164
 165
 166 #include <linux/string.h>
 167 #include <linux/signal.h>
 168 #include <linux/kernel.h>
 169 #include <linux/delay.h>
 170 #include <linux/linkage.h>
 171 #include <linux/reboot.h>
 172
 173 #include <asm/setup.h>
 174 #include <asm/ptrace.h>
 175
 176 #include <asm/irq.h>
 177 #include <asm/arch/hwregs/reg_map.h>
 178 #include <asm/arch/hwregs/reg_rdwr.h>
 179 #include <asm/arch/hwregs/intr_vect_defs.h>
 180 #include <asm/arch/hwregs/ser_defs.h>
 181
 182 /* From entry.S. */
 183 extern void gdb_handle_exception(void);
 184 /* From kgdb_asm.S. */
 185 extern void kgdb_handle_exception(void);
 186
 187 static int kgdb_started = 0;
 188
 189 /********************************* Register image ****************************/
 190
 191 typedef
 192 struct register_image
 193 {
 194                               /* Offset */
 195         unsigned int   r0;    /* 0x00 */
 196         unsigned int   r1;    /* 0x04 */
 197         unsigned int   r2;    /* 0x08 */
 198         unsigned int   r3;    /* 0x0C */
 199         unsigned int   r4;    /* 0x10 */
 200         unsigned int   r5;    /* 0x14 */
 201         unsigned int   r6;    /* 0x18 */
 202         unsigned int   r7;    /* 0x1C */
 203         unsigned int   r8;    /* 0x20; Frame pointer (if any) */
 204         unsigned int   r9;    /* 0x24 */
 205         unsigned int   r10;   /* 0x28 */
 206         unsigned int   r11;   /* 0x2C */
 207         unsigned int   r12;   /* 0x30 */
 208         unsigned int   r13;   /* 0x34 */
 209         unsigned int   sp;    /* 0x38; R14, Stack pointer */
 210         unsigned int   acr;   /* 0x3C; R15, Address calculation register. */
 211
 212         unsigned char  bz;    /* 0x40; P0, 8-bit zero register */
 213         unsigned char  vr;    /* 0x41; P1, Version register (8-bit) */
 214         unsigned int   pid;   /* 0x42; P2, Process ID */
 215         unsigned char  srs;   /* 0x46; P3, Support register select (8-bit) */
 216         unsigned short wz;    /* 0x47; P4, 16-bit zero register */
 217         unsigned int   exs;   /* 0x49; P5, Exception status */
 218         unsigned int   eda;   /* 0x4D; P6, Exception data address */
 219         unsigned int   mof;   /* 0x51; P7, Multiply overflow register */
 220         unsigned int   dz;    /* 0x55; P8, 32-bit zero register */
 221         unsigned int   ebp;   /* 0x59; P9, Exception base pointer */
 222         unsigned int   erp;   /* 0x5D; P10, Exception return pointer. Contains the PC we are interested in. */
 223         unsigned int   srp;   /* 0x61; P11, Subroutine return pointer */
 224         unsigned int   nrp;   /* 0x65; P12, NMI return pointer */
 225         unsigned int   ccs;   /* 0x69; P13, Condition code stack */
 226         unsigned int   usp;   /* 0x6D; P14, User mode stack pointer */
 227         unsigned int   spc;   /* 0x71; P15, Single step PC */
 228         unsigned int   pc;    /* 0x75; Pseudo register (for the most part set to ERP). */
 229
 230 } registers;
 231
 232 typedef
 233 struct bp_register_image
 234 {
 235         /* Support register bank 0. */
 236         unsigned int   s0_0;
 237         unsigned int   s1_0;
 238         unsigned int   s2_0;
 239         unsigned int   s3_0;
 240         unsigned int   s4_0;
 241         unsigned int   s5_0;
 242         unsigned int   s6_0;
 243         unsigned int   s7_0;
 244         unsigned int   s8_0;
 245         unsigned int   s9_0;
 246         unsigned int   s10_0;
 247         unsigned int   s11_0;
 248         unsigned int   s12_0;
 249         unsigned int   s13_0;
 250         unsigned int   s14_0;
 251         unsigned int   s15_0;
 252
 253         /* Support register bank 1. */
 254         unsigned int   s0_1;
 255         unsigned int   s1_1;
 256         unsigned int   s2_1;
 257         unsigned int   s3_1;
 258         unsigned int   s4_1;
 259         unsigned int   s5_1;
 260         unsigned int   s6_1;
 261         unsigned int   s7_1;
 262         unsigned int   s8_1;
 263         unsigned int   s9_1;
 264         unsigned int   s10_1;
 265         unsigned int   s11_1;
 266         unsigned int   s12_1;
 267         unsigned int   s13_1;
 268         unsigned int   s14_1;
 269         unsigned int   s15_1;
 270
 271         /* Support register bank 2. */
 272         unsigned int   s0_2;
 273         unsigned int   s1_2;
 274         unsigned int   s2_2;
 275         unsigned int   s3_2;
 276         unsigned int   s4_2;
 277         unsigned int   s5_2;
 278         unsigned int   s6_2;
 279         unsigned int   s7_2;
 280         unsigned int   s8_2;
 281         unsigned int   s9_2;
 282         unsigned int   s10_2;
 283         unsigned int   s11_2;
 284         unsigned int   s12_2;
 285         unsigned int   s13_2;
 286         unsigned int   s14_2;
 287         unsigned int   s15_2;
 288
 289         /* Support register bank 3. */
 290         unsigned int   s0_3; /* BP_CTRL */
 291         unsigned int   s1_3; /* BP_I0_START */
 292         unsigned int   s2_3; /* BP_I0_END */
 293         unsigned int   s3_3; /* BP_D0_START */
 294         unsigned int   s4_3; /* BP_D0_END */
 295         unsigned int   s5_3; /* BP_D1_START */
 296         unsigned int   s6_3; /* BP_D1_END */
 297         unsigned int   s7_3; /* BP_D2_START */
 298         unsigned int   s8_3; /* BP_D2_END */
 299         unsigned int   s9_3; /* BP_D3_START */
 300         unsigned int   s10_3; /* BP_D3_END */
 301         unsigned int   s11_3; /* BP_D4_START */
 302         unsigned int   s12_3; /* BP_D4_END */
 303         unsigned int   s13_3; /* BP_D5_START */
 304         unsigned int   s14_3; /* BP_D5_END */
 305         unsigned int   s15_3; /* BP_RESERVED */
 306
 307 } support_registers;
 308
 309 enum register_name
 310 {
 311         R0,  R1,  R2,  R3,
 312         R4,  R5,  R6,  R7,
 313         R8,  R9,  R10, R11,
 314         R12, R13, SP,  ACR,
 315
 316         BZ,  VR,  PID, SRS,
 317         WZ,  EXS, EDA, MOF,
 318         DZ,  EBP, ERP, SRP,
 319         NRP, CCS, USP, SPC,
 320         PC,
 321
 322         S0,  S1,  S2,  S3,
 323         S4,  S5,  S6,  S7,
 324         S8,  S9,  S10, S11,
 325         S12, S13, S14, S15
 326
 327 };
 328
 329 /* The register sizes of the registers in register_name. An unimplemented register
 330    is designated by size 0 in this array. */
 331 static int register_size[] =
 332 {
 333         4, 4, 4, 4,
 334         4, 4, 4, 4,
 335         4, 4, 4, 4,
 336         4, 4, 4, 4,
 337
 338         1, 1, 4, 1,
 339         2, 4, 4, 4,
 340         4, 4, 4, 4,
 341         4, 4, 4, 4,
 342
 343         4,
 344
 345         4, 4, 4, 4,
 346         4, 4, 4, 4,
 347         4, 4, 4, 4,
 348         4, 4, 4
 349
 350 };
 351
 352 /* Contains the register image of the kernel.
 353    (Global so that they can be reached from assembler code.) */
 354 registers reg;
 355 support_registers sreg;
 356
 357 /************** Prototypes for local library functions ***********************/
 358
 359 /* Copy of strcpy from libc. */
 360 static char *gdb_cris_strcpy(char *s1, const char *s2);
 361
 362 /* Copy of strlen from libc. */
 363 static int gdb_cris_strlen(const char *s);
 364
 365 /* Copy of memchr from libc. */
 366 static void *gdb_cris_memchr(const void *s, int c, int n);
 367
 368 /* Copy of strtol from libc. Does only support base 16. */
 369 static int gdb_cris_strtol(const char *s, char **endptr, int base);
 370
 371 /********************** Prototypes for local functions. **********************/
 372
 373 /* Write a value to a specified register regno in the register image
 374    of the current thread. */
 375 static int write_register(int regno, char *val);
 376
 377 /* Read a value from a specified register in the register image. Returns the
 378    status of the read operation. The register value is returned in valptr. */
 379 static int read_register(char regno, unsigned int *valptr);
 380
 381 /* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
 382 int getDebugChar(void);
 383
 384 #ifdef CONFIG_ETRAXFS_SIM
 385 int getDebugChar(void)
 386 {
 387   return socketread();
 388 }
 389 #endif
 390
 391 /* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
 392 void putDebugChar(int val);
 393
 394 #ifdef CONFIG_ETRAXFS_SIM
 395 void putDebugChar(int val)
 396 {
 397   socketwrite((char *)&val, 1);
 398 }
 399 #endif
 400
 401 /* Returns the character equivalent of a nibble, bit 7, 6, 5, and 4 of a byte,
 402    represented by int x. */
 403 static char highhex(int x);
 404
 405 /* Returns the character equivalent of a nibble, bit 3, 2, 1, and 0 of a byte,
 406    represented by int x. */
 407 static char lowhex(int x);
 408
 409 /* Returns the integer equivalent of a hexadecimal character. */
 410 static int hex(char ch);
 411
 412 /* Convert the memory, pointed to by mem into hexadecimal representation.
 413    Put the result in buf, and return a pointer to the last character
 414    in buf (null). */
 415 static char *mem2hex(char *buf, unsigned char *mem, int count);
 416
 417 /* Convert the array, in hexadecimal representation, pointed to by buf into
 418    binary representation. Put the result in mem, and return a pointer to
 419    the character after the last byte written. */
 420 static unsigned char *hex2mem(unsigned char *mem, char *buf, int count);
 421
 422 /* Put the content of the array, in binary representation, pointed to by buf
 423    into memory pointed to by mem, and return a pointer to
 424    the character after the last byte written. */
 425 static unsigned char *bin2mem(unsigned char *mem, unsigned char *buf, int count);
 426
 427 /* Await the sequence $<data>#<checksum> and store <data> in the array buffer
 428    returned. */
 429 static void getpacket(char *buffer);
 430
 431 /* Send $<data>#<checksum> from the <data> in the array buffer. */
 432 static void putpacket(char *buffer);
 433
 434 /* Build and send a response packet in order to inform the host the
 435    stub is stopped. */
 436 static void stub_is_stopped(int sigval);
 437
 438 /* All expected commands are sent from remote.c. Send a response according
 439    to the description in remote.c. Not static since it needs to be reached
 440    from assembler code. */
 441 void handle_exception(int sigval);
 442
 443 /* Performs a complete re-start from scratch. ETRAX specific. */
 444 static void kill_restart(void);
 445
 446 /******************** Prototypes for global functions. ***********************/
 447
 448 /* The string str is prepended with the GDB printout token and sent. */
 449 void putDebugString(const unsigned char *str, int len);
 450
 451 /* A static breakpoint to be used at startup. */
 452 void breakpoint(void);
 453
 454 /* Avoid warning as the internal_stack is not used in the C-code. */
 455 #define USEDVAR(name)    { if (name) { ; } }
 456 #define USEDFUN(name) { void (*pf)(void) = (void *)name; USEDVAR(pf) }
 457
 458 /********************************** Packet I/O ******************************/
 459 /* BUFMAX defines the maximum number of characters in
 460    inbound/outbound buffers */
 461 /* FIXME: How do we know it's enough? */
 462 #define BUFMAX 512
 463
 464 /* Run-length encoding maximum length. Send 64 at most. */
 465 #define RUNLENMAX 64
 466
 467 /* Definition of all valid hexadecimal characters */
 468 static const char hexchars[] = "0123456789abcdef";
 469
 470 /* The inbound/outbound buffers used in packet I/O */
 471 static char input_buffer[BUFMAX];
 472 static char output_buffer[BUFMAX];
 473
 474 /* Error and warning messages. */
 475 enum error_type
 476 {
 477         SUCCESS, E01, E02, E03, E04, E05, E06,
 478 };
 479
 480 static char *error_message[] =
 481 {
 482         "",
 483         "E01 Set current or general thread - H[c,g] - internal error.",
 484         "E02 Change register content - P - cannot change read-only register.",
 485         "E03 Thread is not alive.", /* T, not used. */
 486         "E04 The command is not supported - [s,C,S,!,R,d,r] - internal error.",
 487         "E05 Change register content - P - the register is not implemented..",
 488         "E06 Change memory content - M - internal error.",
 489 };
 490
 491 /********************************** Breakpoint *******************************/
 492 /* Use an internal stack in the breakpoint and interrupt response routines.
 493    FIXME: How do we know the size of this stack is enough?
 494    Global so it can be reached from assembler code. */
 495 #define INTERNAL_STACK_SIZE 1024
 496 char internal_stack[INTERNAL_STACK_SIZE];
 497
 498 /* Due to the breakpoint return pointer, a state variable is needed to keep
 499    track of whether it is a static (compiled) or dynamic (gdb-invoked)
 500    breakpoint to be handled. A static breakpoint uses the content of register
 501    ERP as it is whereas a dynamic breakpoint requires subtraction with 2
 502    in order to execute the instruction. The first breakpoint is static; all
 503    following are assumed to be dynamic. */
 504 static int dynamic_bp = 0;
 505
 506 /********************************* String library ****************************/
 507 /* Single-step over library functions creates trap loops. */
 508
 509 /* Copy char s2[] to s1[]. */
 510 static char*
 511 gdb_cris_strcpy(char *s1, const char *s2)
 512 {
 513         char *s = s1;
 514
 515         for (s = s1; (*s++ = *s2++) != '\0'; )
 516                 ;
 517         return s1;
 518 }
 519
 520 /* Find length of s[]. */
 521 static int
 522 gdb_cris_strlen(const char *s)
 523 {
 524         const char *sc;
 525
 526         for (sc = s; *sc != '\0'; sc++)
 527                 ;
 528         return (sc - s);
 529 }
 530
 531 /* Find first occurrence of c in s[n]. */
 532 static void*
 533 gdb_cris_memchr(const void *s, int c, int n)
 534 {
 535         const unsigned char uc = c;
 536         const unsigned char *su;
 537
 538         for (su = s; 0 < n; ++su, --n)
 539                 if (*su == uc)
 540                         return (void *)su;
 541         return NULL;
 542 }
 543 /******************************* Standard library ****************************/
 544 /* Single-step over library functions creates trap loops. */
 545 /* Convert string to long. */
 546 static int
 547 gdb_cris_strtol(const char *s, char **endptr, int base)
 548 {
 549         char *s1;
 550         char *sd;
 551         int x = 0;
 552
 553         for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1)
 554                 x = x * base + (sd - hexchars);
 555
 556         if (endptr) {
 557                 /* Unconverted suffix is stored in endptr unless endptr is NULL. */
 558                 *endptr = s1;
 559         }
 560
 561         return x;
 562 }
 563
 564 /********************************* Register image ****************************/
 565
 566 /* Write a value to a specified register in the register image of the current
 567    thread. Returns status code SUCCESS, E02 or E05. */
 568 static int
 569 write_register(int regno, char *val)
 570 {
 571         int status = SUCCESS;
 572
 573         if (regno >= R0 && regno <= ACR) {
 574                 /* Consecutive 32-bit registers. */
 575                 hex2mem((unsigned char *)&reg.r0 + (regno - R0) * sizeof(unsigned int),
 576                         val, sizeof(unsigned int));
 577
 578         } else if (regno == BZ || regno == VR || regno == WZ || regno == DZ) {
 579                 /* Read-only registers. */
 580                 status = E02;
 581
 582         } else if (regno == PID) {
 583                 /* 32-bit register. (Even though we already checked SRS and WZ, we cannot
 584                    combine this with the EXS - SPC write since SRS and WZ have different size.) */
 585                 hex2mem((unsigned char *)&reg.pid, val, sizeof(unsigned int));
 586
 587         } else if (regno == SRS) {
 588                 /* 8-bit register. */
 589                 hex2mem((unsigned char *)&reg.srs, val, sizeof(unsigned char));
 590
 591         } else if (regno >= EXS && regno <= SPC) {
 592                 /* Consecutive 32-bit registers. */
 593                 hex2mem((unsigned char *)&reg.exs + (regno - EXS) * sizeof(unsigned int),
 594                          val, sizeof(unsigned int));
 595
 596        } else if (regno == PC) {
 597                /* Pseudo-register. Treat as read-only. */
 598                status = E02;
 599
 600        } else if (regno >= S0 && regno <= S15) {
 601                /* 32-bit registers. */
 602                hex2mem((unsigned char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int), val, sizeof(unsigned int));
 603         } else {
 604                 /* Non-existing register. */
 605                 status = E05;
 606         }
 607         return status;
 608 }
 609
 610 /* Read a value from a specified register in the register image. Returns the
 611    value in the register or -1 for non-implemented registers. */
 612 static int
 613 read_register(char regno, unsigned int *valptr)
 614 {
 615         int status = SUCCESS;
 616
 617         /* We read the zero registers from the register struct (instead of just returning 0)
 618            to catch errors. */
 619
 620         if (regno >= R0 && regno <= ACR) {
 621                 /* Consecutive 32-bit registers. */
 622                 *valptr = *(unsigned int *)((char *)&reg.r0 + (regno - R0) * sizeof(unsigned int));
 623
 624         } else if (regno == BZ || regno == VR) {
 625                 /* Consecutive 8-bit registers. */
 626                 *valptr = (unsigned int)(*(unsigned char *)
 627                                          ((char *)&reg.bz + (regno - BZ) * sizeof(char)));
 628
 629         } else if (regno == PID) {
 630                 /* 32-bit register. */
 631                 *valptr =  *(unsigned int *)((char *)&reg.pid);
 632
 633         } else if (regno == SRS) {
 634                 /* 8-bit register. */
 635                 *valptr = (unsigned int)(*(unsigned char *)((char *)&reg.srs));
 636
 637         } else if (regno == WZ) {
 638                 /* 16-bit register. */
 639                 *valptr = (unsigned int)(*(unsigned short *)(char *)&reg.wz);
 640
 641         } else if (regno >= EXS && regno <= PC) {
 642                 /* Consecutive 32-bit registers. */
 643                 *valptr = *(unsigned int *)((char *)&reg.exs + (regno - EXS) * sizeof(unsigned int));
 644
 645         } else if (regno >= S0 && regno <= S15) {
 646                 /* Consecutive 32-bit registers, located elsewhere. */
 647                 *valptr = *(unsigned int *)((char *)&sreg.s0_0 + (reg.srs * 16 * sizeof(unsigned int)) + (regno - S0) * sizeof(unsigned int));
 648
 649         } else {
 650                 /* Non-existing register. */
 651                 status = E05;
 652         }
 653         return status;
 654
 655 }
 656
 657 /********************************** Packet I/O ******************************/
 658 /* Returns the character equivalent of a nibble, bit 7, 6, 5, and 4 of a byte,
 659    represented by int x. */
 660 static inline char
 661 highhex(int x)
 662 {
 663         return hexchars[(x >> 4) & 0xf];
 664 }
 665
 666 /* Returns the character equivalent of a nibble, bit 3, 2, 1, and 0 of a byte,
 667    represented by int x. */
 668 static inline char
 669 lowhex(int x)
 670 {
 671         return hexchars[x & 0xf];
 672 }
 673
 674 /* Returns the integer equivalent of a hexadecimal character. */
 675 static int
 676 hex(char ch)
 677 {
 678         if ((ch >= 'a') && (ch <= 'f'))
 679                 return (ch - 'a' + 10);
 680         if ((ch >= '0') && (ch <= '9'))
 681                 return (ch - '0');
 682         if ((ch >= 'A') && (ch <= 'F'))
 683                 return (ch - 'A' + 10);
 684         return -1;
 685 }
 686
 687 /* Convert the memory, pointed to by mem into hexadecimal representation.
 688    Put the result in buf, and return a pointer to the last character
 689    in buf (null). */
 690
 691 static char *
 692 mem2hex(char *buf, unsigned char *mem, int count)
 693 {
 694         int i;
 695         int ch;
 696
 697         if (mem == NULL) {
 698                 /* Invalid address, caught by 'm' packet handler. */
 699                 for (i = 0; i < count; i++) {
 700                         *buf++ = '0';
 701                         *buf++ = '0';
 702                 }
 703         } else {
 704                 /* Valid mem address. */
 705                 for (i = 0; i < count; i++) {
 706                         ch = *mem++;
 707                         *buf++ = highhex (ch);
 708                         *buf++ = lowhex (ch);
 709                 }
 710         }
 711         /* Terminate properly. */
 712         *buf = '\0';
 713         return buf;
 714 }
 715
 716 /* Same as mem2hex, but puts it in network byte order. */
 717 static char *
 718 mem2hex_nbo(char *buf, unsigned char *mem, int count)
 719 {
 720         int i;
 721         int ch;
 722
 723         mem += count - 1;
 724         for (i = 0; i < count; i++) {
 725                 ch = *mem--;
 726                 *buf++ = highhex (ch);
 727                 *buf++ = lowhex (ch);
 728         }
 729
 730         /* Terminate properly. */
 731         *buf = '\0';
 732         return buf;
 733 }
 734
 735 /* Convert the array, in hexadecimal representation, pointed to by buf into
 736    binary representation. Put the result in mem, and return a pointer to
 737    the character after the last byte written. */
 738 static unsigned char*
 739 hex2mem(unsigned char *mem, char *buf, int count)
 740 {
 741         int i;
 742         unsigned char ch;
 743         for (i = 0; i < count; i++) {
 744                 ch = hex (*buf++) << 4;
 745                 ch = ch + hex (*buf++);
 746                 *mem++ = ch;
 747         }
 748         return mem;
 749 }
 750
 751 /* Put the content of the array, in binary representation, pointed to by buf
 752    into memory pointed to by mem, and return a pointer to the character after
 753    the last byte written.
 754    Gdb will escape $, #, and the escape char (0x7d). */
 755 static unsigned char*
 756 bin2mem(unsigned char *mem, unsigned char *buf, int count)
 757 {
 758         int i;
 759         unsigned char *next;
 760         for (i = 0; i < count; i++) {
 761                 /* Check for any escaped characters. Be paranoid and
 762                    only unescape chars that should be escaped. */
 763                 if (*buf == 0x7d) {
 764                         next = buf + 1;
 765                         if (*next == 0x3 || *next == 0x4 || *next == 0x5D) {
 766                                  /* #, $, ESC */
 767                                 buf++;
 768                                 *buf += 0x20;
 769                         }
 770                 }
 771                 *mem++ = *buf++;
 772         }
 773         return mem;
 774 }
 775
 776 /* Await the sequence $<data>#<checksum> and store <data> in the array buffer
 777    returned. */
 778 static void
 779 getpacket(char *buffer)
 780 {
 781         unsigned char checksum;
 782         unsigned char xmitcsum;
 783         int i;
 784         int count;
 785         char ch;
 786
 787         do {
 788                 while((ch = getDebugChar ()) != '$')
 789                         /* Wait for the start character $ and ignore all other characters */;
 790                 checksum = 0;
 791                 xmitcsum = -1;
 792                 count = 0;
 793                 /* Read until a # or the end of the buffer is reached */
 794                 while (count < BUFMAX) {
 795                         ch = getDebugChar();
 796                         if (ch == '#')
 797                                 break;
 798                         checksum = checksum + ch;
 799                         buffer[count] = ch;
 800                         count = count + 1;
 801                 }
 802
 803                 if (count >= BUFMAX)
 804                         continue;
 805
 806                 buffer[count] = 0;
 807
 808                 if (ch == '#') {
 809                         xmitcsum = hex(getDebugChar()) << 4;
 810                         xmitcsum += hex(getDebugChar());
 811                         if (checksum != xmitcsum) {
 812                                 /* Wrong checksum */
 813                                 putDebugChar('-');
 814                         } else {
 815                                 /* Correct checksum */
 816                                 putDebugChar('+');
 817                                 /* If sequence characters are received, reply with them */
 818                                 if (buffer[2] == ':') {
 819                                         putDebugChar(buffer[0]);
 820                                         putDebugChar(buffer[1]);
 821                                         /* Remove the sequence characters from the buffer */
 822                                         count = gdb_cris_strlen(buffer);
 823                                         for (i = 3; i <= count; i++)
 824                                                 buffer[i - 3] = buffer[i];
 825                                 }
 826                         }
 827                 }
 828         } while (checksum != xmitcsum);
 829 }
 830
 831 /* Send $<data>#<checksum> from the <data> in the array buffer. */
 832
 833 static void
 834 putpacket(char *buffer)
 835 {
 836         int checksum;
 837         int runlen;
 838         int encode;
 839
 840         do {
 841                 char *src = buffer;
 842                 putDebugChar('$');
 843                 checksum = 0;
 844                 while (*src) {
 845                         /* Do run length encoding */
 846                         putDebugChar(*src);
 847                         checksum += *src;
 848                         runlen = 0;
 849                         while (runlen < RUNLENMAX && *src == src[runlen]) {
 850                                 runlen++;
 851                         }
 852                         if (runlen > 3) {
 853                                 /* Got a useful amount */
 854                                 putDebugChar ('*');
 855                                 checksum += '*';
 856                                 encode = runlen + ' ' - 4;
 857                                 putDebugChar(encode);
 858                                 checksum += encode;
 859                                 src += runlen;
 860                         } else {
 861                                 src++;
 862                         }
 863                 }
 864                 putDebugChar('#');
 865                 putDebugChar(highhex (checksum));
 866                 putDebugChar(lowhex (checksum));
 867         } while(kgdb_started && (getDebugChar() != '+'));
 868 }
 869
 870 /* The string str is prepended with the GDB printout token and sent. Required
 871    in traditional implementations. */
 872 void
 873 putDebugString(const unsigned char *str, int len)
 874 {
 875         /* Move SPC forward if we are single-stepping. */
 876         asm("spchere:");
 877         asm("move $spc, $r10");
 878         asm("cmp.d spchere, $r10");
 879         asm("bne nosstep");
 880         asm("nop");
 881         asm("move.d spccont, $r10");
 882         asm("move $r10, $spc");
 883         asm("nosstep:");
 884
 885         output_buffer[0] = 'O';
 886         mem2hex(&output_buffer[1], (unsigned char *)str, len);
 887         putpacket(output_buffer);
 888
 889         asm("spccont:");
 890 }
 891
 892 /********************************** Handle exceptions ************************/
 893 /* Build and send a response packet in order to inform the host the
 894    stub is stopped. TAAn...:r...;n...:r...;n...:r...;
 895                     AA = signal number
 896                     n... = register number (hex)
 897                     r... = register contents
 898                     n... = `thread'
 899                     r... = thread process ID.  This is a hex integer.
 900                     n... = other string not starting with valid hex digit.
 901                     gdb should ignore this n,r pair and go on to the next.
 902                     This way we can extend the protocol. */
 903 static void
 904 stub_is_stopped(int sigval)
 905 {
 906         char *ptr = output_buffer;
 907         unsigned int reg_cont;
 908
 909         /* Send trap type (converted to signal) */
 910
 911         *ptr++ = 'T';
 912         *ptr++ = highhex(sigval);
 913         *ptr++ = lowhex(sigval);
 914
 915         if (((reg.exs & 0xff00) >> 8) == 0xc) {
 916
 917                 /* Some kind of hardware watchpoint triggered. Find which one
 918                    and determine its type (read/write/access).  */
 919                 int S, bp, trig_bits = 0, rw_bits = 0;
 920                 int trig_mask = 0;
 921                 unsigned int *bp_d_regs = &sreg.s3_3;
 922                 /* In a lot of cases, the stopped data address will simply be EDA.
 923                    In some cases, we adjust it to match the watched data range.
 924                    (We don't want to change the actual EDA though). */
 925                 unsigned int stopped_data_address;
 926                 /* The S field of EXS. */
 927                 S = (reg.exs & 0xffff0000) >> 16;
 928
 929                 if (S & 1) {
 930                         /* Instruction watchpoint. */
 931                         /* FIXME: Check against, and possibly adjust reported EDA. */
 932                 } else {
 933                         /* Data watchpoint.  Find the one that triggered. */
 934                         for (bp = 0; bp < 6; bp++) {
 935
 936                                 /* Dx_RD, Dx_WR in the S field of EXS for this BP. */
 937                                 int bitpos_trig = 1 + bp * 2;
 938                                 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
 939                                 int bitpos_config = 2 + bp * 4;
 940
 941                                 /* Get read/write trig bits for this BP. */
 942                                 trig_bits = (S & (3 << bitpos_trig)) >> bitpos_trig;
 943
 944                                 /* Read/write config bits for this BP. */
 945                                 rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
 946                                 if (trig_bits) {
 947                                         /* Sanity check: the BP shouldn't trigger for accesses
 948                                            that it isn't configured for. */
 949                                         if ((rw_bits == 0x1 && trig_bits != 0x1) ||
 950                                             (rw_bits == 0x2 && trig_bits != 0x2))
 951                                                 panic("Invalid r/w trigging for this BP");
 952
 953                                         /* Mark this BP as trigged for future reference. */
 954                                         trig_mask |= (1 << bp);
 955
 956                                         if (reg.eda >= bp_d_regs[bp * 2] &&
 957                                             reg.eda <= bp_d_regs[bp * 2 + 1]) {
 958                                                 /* EDA withing range for this BP; it must be the one
 959                                                    we're looking for. */
 960                                                 stopped_data_address = reg.eda;
 961                                                 break;
 962                                         }
 963                                 }
 964                         }
 965                         if (bp < 6) {
 966                                 /* Found a trigged BP with EDA within its configured data range. */
 967                         } else if (trig_mask) {
 968                                 /* Something triggered, but EDA doesn't match any BP's range. */
 969                                 for (bp = 0; bp < 6; bp++) {
 970                                         /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
 971                                         int bitpos_config = 2 + bp * 4;
 972
 973                                         /* Read/write config bits for this BP (needed later). */
 974                                         rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
 975
 976                                         if (trig_mask & (1 << bp)) {
 977                                                 /* EDA within 31 bytes of the configured start address? */
 978                                                 if (reg.eda + 31 >= bp_d_regs[bp * 2]) {
 979                                                         /* Changing the reported address to match
 980                                                            the start address of the first applicable BP. */
 981                                                         stopped_data_address = bp_d_regs[bp * 2];
 982                                                         break;
 983                                                 } else {
 984                                                         /* We continue since we might find another useful BP. */
 985                                                         printk("EDA doesn't match trigged BP's range");
 986                                                 }
 987                                         }
 988                                 }
 989                         }
 990
 991                         /* No match yet? */
 992                         BUG_ON(bp >= 6);
 993                         /* Note that we report the type according to what the BP is configured
 994                            for (otherwise we'd never report an 'awatch'), not according to how
 995                            it trigged. We did check that the trigged bits match what the BP is
 996                            configured for though. */
 997                         if (rw_bits == 0x1) {
 998                                 /* read */
 999                                 strncpy(ptr, "rwatch", 6);
1000                                 ptr += 6;
1001                         } else if (rw_bits == 0x2) {
1002                                 /* write */
1003                                 strncpy(ptr, "watch", 5);
1004                                 ptr += 5;
1005                         } else if (rw_bits == 0x3) {
1006                                 /* access */
1007                                 strncpy(ptr, "awatch", 6);
1008                                 ptr += 6;
1009                         } else {
1010                                 panic("Invalid r/w bits for this BP.");
1011                         }
1012
1013                         *ptr++ = ':';
1014                         /* Note that we don't read_register(EDA, ...) */
1015                         ptr = mem2hex_nbo(ptr, (unsigned char *)&stopped_data_address, register_size[EDA]);
1016                         *ptr++ = ';';
1017                 }
1018         }
1019         /* Only send PC, frame and stack pointer. */
1020         read_register(PC, &reg_cont);
1021         *ptr++ = highhex(PC);
1022         *ptr++ = lowhex(PC);
1023         *ptr++ = ':';
1024         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[PC]);
1025         *ptr++ = ';';
1026
1027         read_register(R8, &reg_cont);
1028         *ptr++ = highhex(R8);
1029         *ptr++ = lowhex(R8);
1030         *ptr++ = ':';
1031         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[R8]);
1032         *ptr++ = ';';
1033
1034         read_register(SP, &reg_cont);
1035         *ptr++ = highhex(SP);
1036         *ptr++ = lowhex(SP);
1037         *ptr++ = ':';
1038         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[SP]);
1039         *ptr++ = ';';
1040
1041         /* Send ERP as well; this will save us an entire register fetch in some cases. */
1042         read_register(ERP, &reg_cont);
1043         *ptr++ = highhex(ERP);
1044         *ptr++ = lowhex(ERP);
1045         *ptr++ = ':';
1046         ptr = mem2hex(ptr, (unsigned char *)&reg_cont, register_size[ERP]);
1047         *ptr++ = ';';
1048
1049         /* null-terminate and send it off */
1050         *ptr = 0;
1051         putpacket(output_buffer);
1052 }
1053
1054 /* Returns the size of an instruction that has a delay slot. */
1055
1056 int insn_size(unsigned long pc)
1057 {
1058         unsigned short opcode = *(unsigned short *)pc;
1059         int size = 0;
1060
1061         switch ((opcode & 0x0f00) >> 8) {
1062         case 0x0:
1063         case 0x9:
1064         case 0xb:
1065                 size = 2;
1066                 break;
1067         case 0xe:
1068         case 0xf:
1069                 size = 6;
1070                 break;
1071         case 0xd:
1072                 /* Could be 4 or 6; check more bits. */
1073                 if ((opcode & 0xff) == 0xff)
1074                         size = 4;
1075                 else
1076                         size = 6;
1077                 break;
1078         default:
1079                 panic("Couldn't find size of opcode 0x%x at 0x%lx\n", opcode, pc);
1080         }
1081
1082         return size;
1083 }
1084
1085 void register_fixup(int sigval)
1086 {
1087         /* Compensate for ACR push at the beginning of exception handler. */
1088         reg.sp += 4;
1089
1090         /* Standard case. */
1091         reg.pc = reg.erp;
1092         if (reg.erp & 0x1) {
1093                 /* Delay slot bit set.  Report as stopped on proper instruction.  */
1094                 if (reg.spc) {
1095                         /* Rely on SPC if set. */
1096                         reg.pc = reg.spc;
1097                 } else {
1098                         /* Calculate the PC from the size of the instruction
1099                            that the delay slot we're in belongs to. */
1100                         reg.pc += insn_size(reg.erp & ~1) - 1 ;
1101                 }
1102         }
1103
1104         if ((reg.exs & 0x3) == 0x0) {
1105                 /* Bits 1 - 0 indicate the type of memory operation performed
1106                    by the interrupted instruction. 0 means no memory operation,
1107                    and EDA is undefined in that case. We zero it to avoid confusion. */
1108                 reg.eda = 0;
1109         }
1110
1111         if (sigval == SIGTRAP) {
1112                 /* Break 8, single step or hardware breakpoint exception. */
1113
1114                 /* Check IDX field of EXS. */
1115                 if (((reg.exs & 0xff00) >> 8) == 0x18) {
1116
1117                         /* Break 8. */
1118
1119                         /* Static (compiled) breakpoints must return to the next instruction
1120                            in order to avoid infinite loops (default value of ERP). Dynamic
1121                            (gdb-invoked) must subtract the size of the break instruction from
1122                            the ERP so that the instruction that was originally in the break
1123                            instruction's place will be run when we return from the exception. */
1124                         if (!dynamic_bp) {
1125                                 /* Assuming that all breakpoints are dynamic from now on. */
1126                                 dynamic_bp = 1;
1127                         } else {
1128
1129                                 /* Only if not in a delay slot. */
1130                                 if (!(reg.erp & 0x1)) {
1131                                         reg.erp -= 2;
1132                                         reg.pc -= 2;
1133                                 }
1134                         }
1135
1136                 } else if (((reg.exs & 0xff00) >> 8) == 0x3) {
1137                         /* Single step. */
1138                         /* Don't fiddle with S1. */
1139
1140                 } else if (((reg.exs & 0xff00) >> 8) == 0xc) {
1141
1142                         /* Hardware watchpoint exception. */
1143
1144                         /* SPC has been updated so that we will get a single step exception
1145                            when we return, but we don't want that. */
1146                         reg.spc = 0;
1147
1148                         /* Don't fiddle with S1. */
1149                 }
1150
1151         } else if (sigval == SIGINT) {
1152                 /* Nothing special. */
1153         }
1154 }
1155
1156 static void insert_watchpoint(char type, int addr, int len)
1157 {
1158         /* Breakpoint/watchpoint types (GDB terminology):
1159            0 = memory breakpoint for instructions
1160            (not supported; done via memory write instead)
1161            1 = hardware breakpoint for instructions (supported)
1162            2 = write watchpoint (supported)
1163            3 = read watchpoint (supported)
1164            4 = access watchpoint (supported) */
1165
1166         if (type < '1' || type > '4') {
1167                 output_buffer[0] = 0;
1168                 return;
1169         }
1170
1171         /* Read watchpoints are set as access watchpoints, because of GDB's
1172            inability to deal with pure read watchpoints. */
1173         if (type == '3')
1174                 type = '4';
1175
1176         if (type == '1') {
1177                 /* Hardware (instruction) breakpoint. */
1178                 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1179                 if (sreg.s0_3 & 0x1) {
1180                         /* Already in use. */
1181                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1182                         return;
1183                 }
1184                 /* Configure. */
1185                 sreg.s1_3 = addr;
1186                 sreg.s2_3 = (addr + len - 1);
1187                 sreg.s0_3 |= 1;
1188         } else {
1189                 int bp;
1190                 unsigned int *bp_d_regs = &sreg.s3_3;
1191
1192                 /* The watchpoint allocation scheme is the simplest possible.
1193                    For example, if a region is watched for read and
1194                    a write watch is requested, a new watchpoint will
1195                    be used. Also, if a watch for a region that is already
1196                    covered by one or more existing watchpoints, a new
1197                    watchpoint will be used. */
1198
1199                 /* First, find a free data watchpoint. */
1200                 for (bp = 0; bp < 6; bp++) {
1201                         /* Each data watchpoint's control registers occupy 2 bits
1202                            (hence the 3), starting at bit 2 for D0 (hence the 2)
1203                            with 4 bits between for each watchpoint (yes, the 4). */
1204                         if (!(sreg.s0_3 & (0x3 << (2 + (bp * 4))))) {
1205                                 break;
1206                         }
1207                 }
1208
1209                 if (bp > 5) {
1210                         /* We're out of watchpoints. */
1211                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1212                         return;
1213                 }
1214
1215                 /* Configure the control register first. */
1216                 if (type == '3' || type == '4') {
1217                         /* Trigger on read. */
1218                         sreg.s0_3 |= (1 << (2 + bp * 4));
1219                 }
1220                 if (type == '2' || type == '4') {
1221                         /* Trigger on write. */
1222                         sreg.s0_3 |= (2 << (2 + bp * 4));
1223                 }
1224
1225                 /* Ugly pointer arithmetics to configure the watched range. */
1226                 bp_d_regs[bp * 2] = addr;
1227                 bp_d_regs[bp * 2 + 1] = (addr + len - 1);
1228         }
1229
1230         /* Set the S1 flag to enable watchpoints. */
1231         reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1232         gdb_cris_strcpy(output_buffer, "OK");
1233 }
1234
1235 static void remove_watchpoint(char type, int addr, int len)
1236 {
1237         /* Breakpoint/watchpoint types:
1238            0 = memory breakpoint for instructions
1239            (not supported; done via memory write instead)
1240            1 = hardware breakpoint for instructions (supported)
1241            2 = write watchpoint (supported)
1242            3 = read watchpoint (supported)
1243            4 = access watchpoint (supported) */
1244         if (type < '1' || type > '4') {
1245                 output_buffer[0] = 0;
1246                 return;
1247         }
1248
1249         /* Read watchpoints are set as access watchpoints, because of GDB's
1250            inability to deal with pure read watchpoints. */
1251         if (type == '3')
1252                 type = '4';
1253
1254         if (type == '1') {
1255                 /* Hardware breakpoint. */
1256                 /* Bit 0 in BP_CTRL holds the configuration for I0. */
1257                 if (!(sreg.s0_3 & 0x1)) {
1258                         /* Not in use. */
1259                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1260                         return;
1261                 }
1262                 /* Deconfigure. */
1263                 sreg.s1_3 = 0;
1264                 sreg.s2_3 = 0;
1265                 sreg.s0_3 &= ~1;
1266         } else {
1267                 int bp;
1268                 unsigned int *bp_d_regs = &sreg.s3_3;
1269                 /* Try to find a watchpoint that is configured for the
1270                    specified range, then check that read/write also matches. */
1271
1272                 /* Ugly pointer arithmetic, since I cannot rely on a
1273                    single switch (addr) as there may be several watchpoints with
1274                    the same start address for example. */
1275
1276                 for (bp = 0; bp < 6; bp++) {
1277                         if (bp_d_regs[bp * 2] == addr &&
1278                             bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
1279                                 /* Matching range. */
1280                                 int bitpos = 2 + bp * 4;
1281                                 int rw_bits;
1282
1283                                 /* Read/write bits for this BP. */
1284                                 rw_bits = (sreg.s0_3 & (0x3 << bitpos)) >> bitpos;
1285
1286                                 if ((type == '3' && rw_bits == 0x1) ||
1287                                     (type == '2' && rw_bits == 0x2) ||
1288                                     (type == '4' && rw_bits == 0x3)) {
1289                                         /* Read/write matched. */
1290                                         break;
1291                                 }
1292                         }
1293                 }
1294
1295                 if (bp > 5) {
1296                         /* No watchpoint matched. */
1297                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1298                         return;
1299                 }
1300
1301                 /* Found a matching watchpoint. Now, deconfigure it by
1302                    both disabling read/write in bp_ctrl and zeroing its
1303                    start/end addresses. */
1304                 sreg.s0_3 &= ~(3 << (2 + (bp * 4)));
1305                 bp_d_regs[bp * 2] = 0;
1306                 bp_d_regs[bp * 2 + 1] = 0;
1307         }
1308
1309         /* Note that we don't clear the S1 flag here. It's done when continuing.  */
1310         gdb_cris_strcpy(output_buffer, "OK");
1311 }
1312
1313
1314
1315 /* All expected commands are sent from remote.c. Send a response according
1316    to the description in remote.c. */
1317 void
1318 handle_exception(int sigval)
1319 {
1320         /* Avoid warning of not used. */
1321
1322         USEDFUN(handle_exception);
1323         USEDVAR(internal_stack[0]);
1324
1325         register_fixup(sigval);
1326
1327         /* Send response. */
1328         stub_is_stopped(sigval);
1329
1330         for (;;) {
1331                 output_buffer[0] = '\0';
1332                 getpacket(input_buffer);
1333                 switch (input_buffer[0]) {
1334                         case 'g':
1335                                 /* Read registers: g
1336                                    Success: Each byte of register data is described by two hex digits.
1337                                    Registers are in the internal order for GDB, and the bytes
1338                                    in a register  are in the same order the machine uses.
1339                                    Failure: void. */
1340                         {
1341                                 char *buf;
1342                                 /* General and special registers. */
1343                                 buf = mem2hex(output_buffer, (char *)&reg, sizeof(registers));
1344                                 /* Support registers. */
1345                                 /* -1 because of the null termination that mem2hex adds. */
1346                                 mem2hex(buf,
1347                                         (char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1348                                         16 * sizeof(unsigned int));
1349                                 break;
1350                         }
1351                         case 'G':
1352                                 /* Write registers. GXX..XX
1353                                    Each byte of register data  is described by two hex digits.
1354                                    Success: OK
1355                                    Failure: void. */
1356                                 /* General and special registers. */
1357                                 hex2mem((char *)&reg, &input_buffer[1], sizeof(registers));
1358                                 /* Support registers. */
1359                                 hex2mem((char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
1360                                         &input_buffer[1] + sizeof(registers),
1361                                         16 * sizeof(unsigned int));
1362                                 gdb_cris_strcpy(output_buffer, "OK");
1363                                 break;
1364
1365                         case 'P':
1366                                 /* Write register. Pn...=r...
1367                                    Write register n..., hex value without 0x, with value r...,
1368                                    which contains a hex value without 0x and two hex digits
1369                                    for each byte in the register (target byte order). P1f=11223344 means
1370                                    set register 31 to 44332211.
1371                                    Success: OK
1372                                    Failure: E02, E05 */
1373                                 {
1374                                         char *suffix;
1375                                         int regno = gdb_cris_strtol(&input_buffer[1], &suffix, 16);
1376                                         int status;
1377
1378                                         status = write_register(regno, suffix+1);
1379
1380                                         switch (status) {
1381                                                 case E02:
1382                                                         /* Do not support read-only registers. */
1383                                                         gdb_cris_strcpy(output_buffer, error_message[E02]);
1384                                                         break;
1385                                                 case E05:
1386                                                         /* Do not support non-existing registers. */
1387                                                         gdb_cris_strcpy(output_buffer, error_message[E05]);
1388                                                         break;
1389                                                 default:
1390                                                         /* Valid register number. */
1391                                                         gdb_cris_strcpy(output_buffer, "OK");
1392                                                         break;
1393                                         }
1394                                 }
1395                                 break;
1396
1397                         case 'm':
1398                                 /* Read from memory. mAA..AA,LLLL
1399                                    AA..AA is the address and LLLL is the length.
1400                                    Success: XX..XX is the memory content.  Can be fewer bytes than
1401                                    requested if only part of the data may be read. m6000120a,6c means
1402                                    retrieve 108 byte from base address 6000120a.
1403                                    Failure: void. */
1404                                 {
1405                                         char *suffix;
1406                                         unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1407                                                                                                &suffix, 16);
1408                                         int len = gdb_cris_strtol(suffix+1, 0, 16);
1409
1410                                         /* Bogus read (i.e. outside the kernel's
1411                                            segment)? . */
1412                                         if (!((unsigned int)addr >= 0xc0000000 &&
1413                                               (unsigned int)addr < 0xd0000000))
1414                                                 addr = NULL;
1415
1416                                         mem2hex(output_buffer, addr, len);
1417                                 }
1418                                 break;
1419
1420                         case 'X':
1421                                 /* Write to memory. XAA..AA,LLLL:XX..XX
1422                                    AA..AA is the start address,  LLLL is the number of bytes, and
1423                                    XX..XX is the binary data.
1424                                    Success: OK
1425                                    Failure: void. */
1426                         case 'M':
1427                                 /* Write to memory. MAA..AA,LLLL:XX..XX
1428                                    AA..AA is the start address,  LLLL is the number of bytes, and
1429                                    XX..XX is the hexadecimal data.
1430                                    Success: OK
1431                                    Failure: void. */
1432                                 {
1433                                         char *lenptr;
1434                                         char *dataptr;
1435                                         unsigned char *addr = (unsigned char *)gdb_cris_strtol(&input_buffer[1],
1436                                                                                       &lenptr, 16);
1437                                         int len = gdb_cris_strtol(lenptr+1, &dataptr, 16);
1438                                         if (*lenptr == ',' && *dataptr == ':') {
1439                                                 if (input_buffer[0] == 'M') {
1440                                                         hex2mem(addr, dataptr + 1, len);
1441                                                 } else /* X */ {
1442                                                         bin2mem(addr, dataptr + 1, len);
1443                                                 }
1444                                                 gdb_cris_strcpy(output_buffer, "OK");
1445                                         }
1446                                         else {
1447                                                 gdb_cris_strcpy(output_buffer, error_message[E06]);
1448                                         }
1449                                 }
1450                                 break;
1451
1452                         case 'c':
1453                                 /* Continue execution. cAA..AA
1454                                    AA..AA is the address where execution is resumed. If AA..AA is
1455                                    omitted, resume at the present address.
1456                                    Success: return to the executing thread.
1457                                    Failure: will never know. */
1458
1459                                 if (input_buffer[1] != '\0') {
1460                                         /* FIXME: Doesn't handle address argument. */
1461                                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1462                                         break;
1463                                 }
1464
1465                                 /* Before continuing, make sure everything is set up correctly. */
1466
1467                                 /* Set the SPC to some unlikely value.  */
1468                                 reg.spc = 0;
1469                                 /* Set the S1 flag to 0 unless some watchpoint is enabled (since setting
1470                                    S1 to 0 would also disable watchpoints). (Note that bits 26-31 in BP_CTRL
1471                                    are reserved, so don't check against those). */
1472                                 if ((sreg.s0_3 & 0x3fff) == 0) {
1473                                         reg.ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
1474                                 }
1475
1476                                 return;
1477
1478                         case 's':
1479                                 /* Step. sAA..AA
1480                                    AA..AA is the address where execution is resumed. If AA..AA is
1481                                    omitted, resume at the present address. Success: return to the
1482                                    executing thread. Failure: will never know. */
1483
1484                                 if (input_buffer[1] != '\0') {
1485                                         /* FIXME: Doesn't handle address argument. */
1486                                         gdb_cris_strcpy(output_buffer, error_message[E04]);
1487                                         break;
1488                                 }
1489
1490                                 /* Set the SPC to PC, which is where we'll return
1491                                    (deduced previously). */
1492                                 reg.spc = reg.pc;
1493
1494                                 /* Set the S1 (first stacked, not current) flag, which will
1495                                    kick into action when we rfe. */
1496                                 reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
1497                                 return;
1498
1499                        case 'Z':
1500
1501                                /* Insert breakpoint or watchpoint, Ztype,addr,length.
1502                                   Remote protocol says: A remote target shall return an empty string
1503                                   for an unrecognized breakpoint or watchpoint packet type. */
1504                                {
1505                                        char *lenptr;
1506                                        char *dataptr;
1507                                        int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1508                                        int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1509                                        char type = input_buffer[1];
1510
1511                                        insert_watchpoint(type, addr, len);
1512                                        break;
1513                                }
1514
1515                        case 'z':
1516                                /* Remove breakpoint or watchpoint, Ztype,addr,length.
1517                                   Remote protocol says: A remote target shall return an empty string
1518                                   for an unrecognized breakpoint or watchpoint packet type. */
1519                                {
1520                                        char *lenptr;
1521                                        char *dataptr;
1522                                        int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
1523                                        int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
1524                                        char type = input_buffer[1];
1525
1526                                        remove_watchpoint(type, addr, len);
1527                                        break;
1528                                }
1529
1530
1531                         case '?':
1532                                 /* The last signal which caused a stop. ?
1533                                    Success: SAA, where AA is the signal number.
1534                                    Failure: void. */
1535                                 output_buffer[0] = 'S';
1536                                 output_buffer[1] = highhex(sigval);
1537                                 output_buffer[2] = lowhex(sigval);
1538                                 output_buffer[3] = 0;
1539                                 break;
1540
1541                         case 'D':
1542                                 /* Detach from host. D
1543                                    Success: OK, and return to the executing thread.
1544                                    Failure: will never know */
1545                                 putpacket("OK");
1546                                 return;
1547
1548                         case 'k':
1549                         case 'r':
1550                                 /* kill request or reset request.
1551                                    Success: restart of target.
1552                                    Failure: will never know. */
1553                                 kill_restart();
1554                                 break;
1555
1556                         case 'C':
1557                         case 'S':
1558                         case '!':
1559                         case 'R':
1560                         case 'd':
1561                                 /* Continue with signal sig. Csig;AA..AA
1562                                    Step with signal sig. Ssig;AA..AA
1563                                    Use the extended remote protocol. !
1564                                    Restart the target system. R0
1565                                    Toggle debug flag. d
1566                                    Search backwards. tAA:PP,MM
1567                                    Not supported: E04 */
1568
1569                                 /* FIXME: What's the difference between not supported
1570                                    and ignored (below)? */
1571                                 gdb_cris_strcpy(output_buffer, error_message[E04]);
1572                                 break;
1573
1574                         default:
1575                                 /* The stub should ignore other request and send an empty
1576                                    response ($#<checksum>). This way we can extend the protocol and GDB
1577                                    can tell whether the stub it is talking to uses the old or the new. */
1578                                 output_buffer[0] = 0;
1579                                 break;
1580                 }
1581                 putpacket(output_buffer);
1582         }
1583 }
1584
1585 void
1586 kgdb_init(void)
1587 {
1588         reg_intr_vect_rw_mask intr_mask;
1589         reg_ser_rw_intr_mask ser_intr_mask;
1590
1591         /* Configure the kgdb serial port. */
1592 #if defined(CONFIG_ETRAX_KGDB_PORT0)
1593         /* Note: no shortcut registered (not handled by multiple_interrupt).
1594            See entry.S.  */
1595         set_exception_vector(SER0_INTR_VECT, kgdb_handle_exception);
1596         /* Enable the ser irq in the global config. */
1597         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1598         intr_mask.ser0 = 1;
1599         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1600
1601         ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
1602         ser_intr_mask.data_avail = regk_ser_yes;
1603         REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
1604 #elif defined(CONFIG_ETRAX_KGDB_PORT1)
1605         /* Note: no shortcut registered (not handled by multiple_interrupt).
1606            See entry.S.  */
1607         set_exception_vector(SER1_INTR_VECT, kgdb_handle_exception);
1608         /* Enable the ser irq in the global config. */
1609         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1610         intr_mask.ser1 = 1;
1611         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1612
1613         ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
1614         ser_intr_mask.data_avail = regk_ser_yes;
1615         REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
1616 #elif defined(CONFIG_ETRAX_KGDB_PORT2)
1617         /* Note: no shortcut registered (not handled by multiple_interrupt).
1618            See entry.S.  */
1619         set_exception_vector(SER2_INTR_VECT, kgdb_handle_exception);
1620         /* Enable the ser irq in the global config. */
1621         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1622         intr_mask.ser2 = 1;
1623         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1624
1625         ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
1626         ser_intr_mask.data_avail = regk_ser_yes;
1627         REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
1628 #elif defined(CONFIG_ETRAX_KGDB_PORT3)
1629         /* Note: no shortcut registered (not handled by multiple_interrupt).
1630            See entry.S.  */
1631         set_exception_vector(SER3_INTR_VECT, kgdb_handle_exception);
1632         /* Enable the ser irq in the global config. */
1633         intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1634         intr_mask.ser3 = 1;
1635         REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1636
1637         ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
1638         ser_intr_mask.data_avail = regk_ser_yes;
1639         REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
1640 #endif
1641
1642 }
1643 /* Performs a complete re-start from scratch. */
1644 static void
1645 kill_restart(void)
1646 {
1647         machine_restart("");
1648 }
1649
1650 /* Use this static breakpoint in the start-up only. */
1651
1652 void
1653 breakpoint(void)
1654 {
1655         kgdb_started = 1;
1656         dynamic_bp = 0;     /* This is a static, not a dynamic breakpoint. */
1657         __asm__ volatile ("break 8"); /* Jump to kgdb_handle_breakpoint. */
1658 }
1659
1660 /****************************** End of file **********************************/