2 * linux/arch/arm/kernel/dma-isa.c
4 * Copyright (C) 1999-2000 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 * Taken from various sources, including:
12 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
13 * Written by Hennus Bergman, 1992.
14 * High DMA channel support & info by Hannu Savolainen and John Boyd,
16 * arch/arm/kernel/dma-ebsa285.c
17 * Copyright (C) 1998 Phil Blundell
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
26 #include <asm/mach/dma.h>
28 #define ISA_DMA_MODE_READ 0x44
29 #define ISA_DMA_MODE_WRITE 0x48
30 #define ISA_DMA_MODE_CASCADE 0xc0
31 #define ISA_DMA_AUTOINIT 0x10
33 #define ISA_DMA_MASK 0
34 #define ISA_DMA_MODE 1
35 #define ISA_DMA_CLRFF 2
36 #define ISA_DMA_PGHI 3
37 #define ISA_DMA_PGLO 4
38 #define ISA_DMA_ADDR 5
39 #define ISA_DMA_COUNT 6
41 static unsigned int isa_dma_port
[8][7] = {
42 /* MASK MODE CLRFF PAGE_HI PAGE_LO ADDR COUNT */
43 { 0x0a, 0x0b, 0x0c, 0x487, 0x087, 0x00, 0x01 },
44 { 0x0a, 0x0b, 0x0c, 0x483, 0x083, 0x02, 0x03 },
45 { 0x0a, 0x0b, 0x0c, 0x481, 0x081, 0x04, 0x05 },
46 { 0x0a, 0x0b, 0x0c, 0x482, 0x082, 0x06, 0x07 },
47 { 0xd4, 0xd6, 0xd8, 0x000, 0x000, 0xc0, 0xc2 },
48 { 0xd4, 0xd6, 0xd8, 0x48b, 0x08b, 0xc4, 0xc6 },
49 { 0xd4, 0xd6, 0xd8, 0x489, 0x089, 0xc8, 0xca },
50 { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce }
53 static int isa_get_dma_residue(dmach_t channel
, dma_t
*dma
)
55 unsigned int io_port
= isa_dma_port
[channel
][ISA_DMA_COUNT
];
58 count
= 1 + inb(io_port
);
59 count
|= inb(io_port
) << 8;
61 return channel
< 4 ? count
: (count
<< 1);
64 static void isa_enable_dma(dmach_t channel
, dma_t
*dma
)
67 unsigned long address
, length
;
69 enum dma_data_direction direction
;
72 switch (dma
->dma_mode
& DMA_MODE_MASK
) {
74 mode
|= ISA_DMA_MODE_READ
;
75 direction
= DMA_FROM_DEVICE
;
79 mode
|= ISA_DMA_MODE_WRITE
;
80 direction
= DMA_TO_DEVICE
;
83 case DMA_MODE_CASCADE
:
84 mode
|= ISA_DMA_MODE_CASCADE
;
85 direction
= DMA_BIDIRECTIONAL
;
95 * Cope with ISA-style drivers which expect cache
100 dma
->buf
.length
= dma
->count
;
101 dma
->buf
.dma_address
= dma_map_single(NULL
,
102 dma
->addr
, dma
->count
,
106 address
= dma
->buf
.dma_address
;
107 length
= dma
->buf
.length
- 1;
109 outb(address
>> 16, isa_dma_port
[channel
][ISA_DMA_PGLO
]);
110 outb(address
>> 24, isa_dma_port
[channel
][ISA_DMA_PGHI
]);
117 outb(0, isa_dma_port
[channel
][ISA_DMA_CLRFF
]);
119 outb(address
, isa_dma_port
[channel
][ISA_DMA_ADDR
]);
120 outb(address
>> 8, isa_dma_port
[channel
][ISA_DMA_ADDR
]);
122 outb(length
, isa_dma_port
[channel
][ISA_DMA_COUNT
]);
123 outb(length
>> 8, isa_dma_port
[channel
][ISA_DMA_COUNT
]);
125 if (dma
->dma_mode
& DMA_AUTOINIT
)
126 mode
|= ISA_DMA_AUTOINIT
;
128 outb(mode
, isa_dma_port
[channel
][ISA_DMA_MODE
]);
131 outb(channel
& 3, isa_dma_port
[channel
][ISA_DMA_MASK
]);
134 static void isa_disable_dma(dmach_t channel
, dma_t
*dma
)
136 outb(channel
| 4, isa_dma_port
[channel
][ISA_DMA_MASK
]);
139 static struct dma_ops isa_dma_ops
= {
141 .enable
= isa_enable_dma
,
142 .disable
= isa_disable_dma
,
143 .residue
= isa_get_dma_residue
,
146 static struct resource dma_resources
[] = { {
151 .name
= "dma low page",
159 .name
= "dma high page",
164 void __init
isa_init_dma(dma_t
*dma
)
167 * Try to autodetect presence of an ISA DMA controller.
168 * We do some minimal initialisation, and check that
169 * channel 0's DMA address registers are writeable.
175 * Write high and low address, and then read them back
181 if (inb(0) == 0x55 && inb(0) == 0xaa) {
184 for (channel
= 0; channel
< 8; channel
++) {
185 dma
[channel
].d_ops
= &isa_dma_ops
;
186 isa_disable_dma(channel
, NULL
);
205 * Is this correct? According to my documentation, it
206 * doesn't appear to be. It should be:
207 * outb(0x3f, 0x40b); outb(0x3f, 0x4d6);
217 request_dma(DMA_ISA_CASCADE
, "cascade");
219 for (i
= 0; i
< sizeof(dma_resources
) / sizeof(dma_resources
[0]); i
++)
220 request_resource(&ioport_resource
, dma_resources
+ i
);