e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / include / asm-cris / arch-v10 / ide.h
blob78b301ed7b126961fe4554f6a16a3d81e70596e3
1 /*
2 * linux/include/asm-cris/ide.h
4 * Copyright (C) 2000, 2001, 2002 Axis Communications AB
6 * Authors: Bjorn Wesen
8 */
11 * This file contains the ETRAX 100LX specific IDE code.
14 #ifndef __ASMCRIS_IDE_H
15 #define __ASMCRIS_IDE_H
17 #ifdef __KERNEL__
19 #include <asm/arch/svinto.h>
20 #include <asm/io.h>
21 #include <asm-generic/ide_iops.h>
24 /* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */
26 #define MAX_HWIFS 4
28 static inline int ide_default_irq(unsigned long base)
30 /* all IDE busses share the same IRQ, number 4.
31 * this has the side-effect that ide-probe.c will cluster our 4 interfaces
32 * together in a hwgroup, and will serialize accesses. this is good, because
33 * we can't access more than one interface at the same time on ETRAX100.
35 return 4;
38 static inline unsigned long ide_default_io_base(int index)
40 /* we have no real I/O base address per interface, since all go through the
41 * same register. but in a bitfield in that register, we have the i/f number.
42 * so we can use the io_base to remember that bitfield.
44 static const unsigned long io_bases[MAX_HWIFS] = {
45 IO_FIELD(R_ATA_CTRL_DATA, sel, 0),
46 IO_FIELD(R_ATA_CTRL_DATA, sel, 1),
47 IO_FIELD(R_ATA_CTRL_DATA, sel, 2),
48 IO_FIELD(R_ATA_CTRL_DATA, sel, 3)
50 return io_bases[index];
53 /* this is called once for each interface, to setup the port addresses. data_port is the result
54 * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us.
57 static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
59 int i;
61 /* fill in ports for ATA addresses 0 to 7 */
63 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
64 hw->io_ports[i] = data_port |
65 IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
66 IO_STATE(R_ATA_CTRL_DATA, cs0, active);
69 /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
71 hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
72 IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
73 IO_STATE(R_ATA_CTRL_DATA, cs1, active);
75 /* whats this for ? */
77 hw->io_ports[IDE_IRQ_OFFSET] = 0;
80 static inline void ide_init_default_hwifs(void)
82 hw_regs_t hw;
83 int index;
85 for(index = 0; index < MAX_HWIFS; index++) {
86 ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
87 hw.irq = ide_default_irq(ide_default_io_base(index));
88 ide_register_hw(&hw, NULL);
92 /* some configuration options we don't need */
94 #undef SUPPORT_VLB_SYNC
95 #define SUPPORT_VLB_SYNC 0
97 #endif /* __KERNEL__ */
99 #endif /* __ASMCRIS_IDE_H */