e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / include / asm-cris / arch-v10 / user.h
blob9303ea77c915b54e37f90991203a12af02a6268e
1 #ifndef __ASM_CRIS_ARCH_USER_H
2 #define __ASM_CRIS_ARCH_USER_H
4 /* User mode registers, used for core dumps. In order to keep ELF_NGREG
5 sensible we let all registers be 32 bits. The csr registers are included
6 for future use. */
7 struct user_regs_struct {
8 unsigned long r0; /* General registers. */
9 unsigned long r1;
10 unsigned long r2;
11 unsigned long r3;
12 unsigned long r4;
13 unsigned long r5;
14 unsigned long r6;
15 unsigned long r7;
16 unsigned long r8;
17 unsigned long r9;
18 unsigned long r10;
19 unsigned long r11;
20 unsigned long r12;
21 unsigned long r13;
22 unsigned long sp; /* Stack pointer. */
23 unsigned long pc; /* Program counter. */
24 unsigned long p0; /* Constant zero (only 8 bits). */
25 unsigned long vr; /* Version register (only 8 bits). */
26 unsigned long p2; /* Reserved. */
27 unsigned long p3; /* Reserved. */
28 unsigned long p4; /* Constant zero (only 16 bits). */
29 unsigned long ccr; /* Condition code register (only 16 bits). */
30 unsigned long p6; /* Reserved. */
31 unsigned long mof; /* Multiply overflow register. */
32 unsigned long p8; /* Constant zero. */
33 unsigned long ibr; /* Not accessible. */
34 unsigned long irp; /* Not accessible. */
35 unsigned long srp; /* Subroutine return pointer. */
36 unsigned long bar; /* Not accessible. */
37 unsigned long dccr; /* Dword condition code register. */
38 unsigned long brp; /* Not accessible. */
39 unsigned long usp; /* User-mode stack pointer. Same as sp when
40 in user mode. */
41 unsigned long csrinstr; /* Internal status registers. */
42 unsigned long csraddr;
43 unsigned long csrdata;
46 #endif