Do not allow AIO to be inited multiple times
[qemu-kvm/fedora.git] / hw / pckbd.c
blob0845c9649729cc44259efaae402ad5acc6cf084e
1 /*
2 * QEMU PC keyboard emulation
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw.h"
25 #include "isa.h"
26 #include "pc.h"
27 #include "ps2.h"
28 #include "sysemu.h"
30 /* debug PC keyboard */
31 //#define DEBUG_KBD
33 /* Keyboard Controller Commands */
34 #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
35 #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
36 #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
37 #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
38 #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
39 #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
40 #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
41 #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
42 #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
43 #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
44 #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */
45 #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */
46 #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */
47 #define KBD_CCMD_WRITE_OBUF 0xD2
48 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
49 initiated by the auxiliary device */
50 #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
51 #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */
52 #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */
53 #define KBD_CCMD_RESET 0xFE
55 /* Keyboard Commands */
56 #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
57 #define KBD_CMD_ECHO 0xEE
58 #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */
59 #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
60 #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
61 #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */
62 #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */
63 #define KBD_CMD_RESET 0xFF /* Reset */
65 /* Keyboard Replies */
66 #define KBD_REPLY_POR 0xAA /* Power on reset */
67 #define KBD_REPLY_ACK 0xFA /* Command ACK */
68 #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
70 /* Status Register Bits */
71 #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
72 #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
73 #define KBD_STAT_SELFTEST 0x04 /* Self test successful */
74 #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
75 #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
76 #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
77 #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
78 #define KBD_STAT_PERR 0x80 /* Parity error */
80 /* Controller Mode Register Bits */
81 #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
82 #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
83 #define KBD_MODE_SYS 0x04 /* The system flag (?) */
84 #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
85 #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
86 #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
87 #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
88 #define KBD_MODE_RFU 0x80
90 /* Mouse Commands */
91 #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
92 #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
93 #define AUX_SET_RES 0xE8 /* Set resolution */
94 #define AUX_GET_SCALE 0xE9 /* Get scaling factor */
95 #define AUX_SET_STREAM 0xEA /* Set stream mode */
96 #define AUX_POLL 0xEB /* Poll */
97 #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */
98 #define AUX_SET_WRAP 0xEE /* Set wrap mode */
99 #define AUX_SET_REMOTE 0xF0 /* Set remote mode */
100 #define AUX_GET_TYPE 0xF2 /* Get type */
101 #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
102 #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
103 #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
104 #define AUX_SET_DEFAULT 0xF6
105 #define AUX_RESET 0xFF /* Reset aux device */
106 #define AUX_ACK 0xFA /* Command byte ACK. */
108 #define MOUSE_STATUS_REMOTE 0x40
109 #define MOUSE_STATUS_ENABLED 0x20
110 #define MOUSE_STATUS_SCALE21 0x10
112 #define KBD_QUEUE_SIZE 256
114 #define KBD_PENDING_KBD 1
115 #define KBD_PENDING_AUX 2
117 typedef struct KBDState {
118 uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
119 uint8_t status;
120 uint8_t mode;
121 /* Bitmask of devices with data available. */
122 uint8_t pending;
123 void *kbd;
124 void *mouse;
126 qemu_irq irq_kbd;
127 qemu_irq irq_mouse;
128 target_phys_addr_t base;
129 int it_shift;
130 } KBDState;
132 KBDState kbd_state;
134 /* update irq and KBD_STAT_[MOUSE_]OBF */
135 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
136 incorrect, but it avoids having to simulate exact delays */
137 static void kbd_update_irq(KBDState *s)
139 int irq_kbd_level, irq_mouse_level;
141 irq_kbd_level = 0;
142 irq_mouse_level = 0;
143 s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
144 if (s->pending) {
145 s->status |= KBD_STAT_OBF;
146 /* kbd data takes priority over aux data. */
147 if (s->pending == KBD_PENDING_AUX) {
148 s->status |= KBD_STAT_MOUSE_OBF;
149 if (s->mode & KBD_MODE_MOUSE_INT)
150 irq_mouse_level = 1;
151 } else {
152 if ((s->mode & KBD_MODE_KBD_INT) &&
153 !(s->mode & KBD_MODE_DISABLE_KBD))
154 irq_kbd_level = 1;
157 qemu_set_irq(s->irq_kbd, irq_kbd_level);
158 qemu_set_irq(s->irq_mouse, irq_mouse_level);
161 static void kbd_update_kbd_irq(void *opaque, int level)
163 KBDState *s = (KBDState *)opaque;
165 if (level)
166 s->pending |= KBD_PENDING_KBD;
167 else
168 s->pending &= ~KBD_PENDING_KBD;
169 kbd_update_irq(s);
172 static void kbd_update_aux_irq(void *opaque, int level)
174 KBDState *s = (KBDState *)opaque;
176 if (level)
177 s->pending |= KBD_PENDING_AUX;
178 else
179 s->pending &= ~KBD_PENDING_AUX;
180 kbd_update_irq(s);
183 static uint32_t kbd_read_status(void *opaque, uint32_t addr)
185 KBDState *s = opaque;
186 int val;
187 val = s->status;
188 #if defined(DEBUG_KBD)
189 printf("kbd: read status=0x%02x\n", val);
190 #endif
191 return val;
194 static void kbd_queue(KBDState *s, int b, int aux)
196 if (aux)
197 ps2_queue(s->mouse, b);
198 else
199 ps2_queue(s->kbd, b);
202 static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
204 KBDState *s = opaque;
206 #ifdef DEBUG_KBD
207 printf("kbd: write cmd=0x%02x\n", val);
208 #endif
209 switch(val) {
210 case KBD_CCMD_READ_MODE:
211 kbd_queue(s, s->mode, 0);
212 break;
213 case KBD_CCMD_WRITE_MODE:
214 case KBD_CCMD_WRITE_OBUF:
215 case KBD_CCMD_WRITE_AUX_OBUF:
216 case KBD_CCMD_WRITE_MOUSE:
217 case KBD_CCMD_WRITE_OUTPORT:
218 s->write_cmd = val;
219 break;
220 case KBD_CCMD_MOUSE_DISABLE:
221 s->mode |= KBD_MODE_DISABLE_MOUSE;
222 break;
223 case KBD_CCMD_MOUSE_ENABLE:
224 s->mode &= ~KBD_MODE_DISABLE_MOUSE;
225 break;
226 case KBD_CCMD_TEST_MOUSE:
227 kbd_queue(s, 0x00, 0);
228 break;
229 case KBD_CCMD_SELF_TEST:
230 s->status |= KBD_STAT_SELFTEST;
231 kbd_queue(s, 0x55, 0);
232 break;
233 case KBD_CCMD_KBD_TEST:
234 kbd_queue(s, 0x00, 0);
235 break;
236 case KBD_CCMD_KBD_DISABLE:
237 s->mode |= KBD_MODE_DISABLE_KBD;
238 kbd_update_irq(s);
239 break;
240 case KBD_CCMD_KBD_ENABLE:
241 s->mode &= ~KBD_MODE_DISABLE_KBD;
242 kbd_update_irq(s);
243 break;
244 case KBD_CCMD_READ_INPORT:
245 kbd_queue(s, 0x00, 0);
246 break;
247 case KBD_CCMD_READ_OUTPORT:
248 /* XXX: check that */
249 #ifdef TARGET_I386
250 val = 0x01 | (ioport_get_a20() << 1);
251 #else
252 val = 0x01;
253 #endif
254 if (s->status & KBD_STAT_OBF)
255 val |= 0x10;
256 if (s->status & KBD_STAT_MOUSE_OBF)
257 val |= 0x20;
258 kbd_queue(s, val, 0);
259 break;
260 #ifdef TARGET_I386
261 case KBD_CCMD_ENABLE_A20:
262 ioport_set_a20(1);
263 break;
264 case KBD_CCMD_DISABLE_A20:
265 ioport_set_a20(0);
266 break;
267 #endif
268 case KBD_CCMD_RESET:
269 qemu_system_reset_request();
270 break;
271 case 0xff:
272 /* ignore that - I don't know what is its use */
273 break;
274 default:
275 fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
276 break;
280 static uint32_t kbd_read_data(void *opaque, uint32_t addr)
282 KBDState *s = opaque;
283 uint32_t val;
285 if (s->pending == KBD_PENDING_AUX)
286 val = ps2_read_data(s->mouse);
287 else
288 val = ps2_read_data(s->kbd);
290 #if defined(DEBUG_KBD)
291 printf("kbd: read data=0x%02x\n", val);
292 #endif
293 return val;
296 static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
298 KBDState *s = opaque;
300 #ifdef DEBUG_KBD
301 printf("kbd: write data=0x%02x\n", val);
302 #endif
304 switch(s->write_cmd) {
305 case 0:
306 ps2_write_keyboard(s->kbd, val);
307 break;
308 case KBD_CCMD_WRITE_MODE:
309 s->mode = val;
310 ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
311 /* ??? */
312 kbd_update_irq(s);
313 break;
314 case KBD_CCMD_WRITE_OBUF:
315 kbd_queue(s, val, 0);
316 break;
317 case KBD_CCMD_WRITE_AUX_OBUF:
318 kbd_queue(s, val, 1);
319 break;
320 case KBD_CCMD_WRITE_OUTPORT:
321 #ifdef TARGET_I386
322 ioport_set_a20((val >> 1) & 1);
323 #endif
324 if (!(val & 1)) {
325 qemu_system_reset_request();
327 break;
328 case KBD_CCMD_WRITE_MOUSE:
329 ps2_write_mouse(s->mouse, val);
330 break;
331 default:
332 break;
334 s->write_cmd = 0;
337 static void kbd_reset(void *opaque)
339 KBDState *s = opaque;
341 s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
342 s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
345 static void kbd_save(QEMUFile* f, void* opaque)
347 KBDState *s = (KBDState*)opaque;
349 qemu_put_8s(f, &s->write_cmd);
350 qemu_put_8s(f, &s->status);
351 qemu_put_8s(f, &s->mode);
352 qemu_put_8s(f, &s->pending);
355 static int kbd_load(QEMUFile* f, void* opaque, int version_id)
357 KBDState *s = (KBDState*)opaque;
359 if (version_id != 3)
360 return -EINVAL;
361 qemu_get_8s(f, &s->write_cmd);
362 qemu_get_8s(f, &s->status);
363 qemu_get_8s(f, &s->mode);
364 qemu_get_8s(f, &s->pending);
365 return 0;
368 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
370 KBDState *s = &kbd_state;
372 s->irq_kbd = kbd_irq;
373 s->irq_mouse = mouse_irq;
375 kbd_reset(s);
376 register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
377 register_ioport_read(io_base, 1, 1, kbd_read_data, s);
378 register_ioport_write(io_base, 1, 1, kbd_write_data, s);
379 register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
380 register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);
382 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
383 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
384 #ifdef TARGET_I386
385 vmmouse_init(s->mouse);
386 #endif
387 qemu_register_reset(kbd_reset, s);
390 /* Memory mapped interface */
391 static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
393 KBDState *s = opaque;
395 switch ((addr - s->base) >> s->it_shift) {
396 case 0:
397 return kbd_read_data(s, 0) & 0xff;
398 case 1:
399 return kbd_read_status(s, 0) & 0xff;
400 default:
401 return 0xff;
405 static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
407 KBDState *s = opaque;
409 switch ((addr - s->base) >> s->it_shift) {
410 case 0:
411 kbd_write_data(s, 0, value & 0xff);
412 break;
413 case 1:
414 kbd_write_command(s, 0, value & 0xff);
415 break;
419 static CPUReadMemoryFunc *kbd_mm_read[] = {
420 &kbd_mm_readb,
421 &kbd_mm_readb,
422 &kbd_mm_readb,
425 static CPUWriteMemoryFunc *kbd_mm_write[] = {
426 &kbd_mm_writeb,
427 &kbd_mm_writeb,
428 &kbd_mm_writeb,
431 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
432 target_phys_addr_t base, int it_shift)
434 KBDState *s = &kbd_state;
435 int s_io_memory;
437 s->irq_kbd = kbd_irq;
438 s->irq_mouse = mouse_irq;
439 s->base = base;
440 s->it_shift = it_shift;
442 kbd_reset(s);
443 register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
444 s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
445 cpu_register_physical_memory(base, 2 << it_shift, s_io_memory);
447 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
448 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
449 #ifdef TARGET_I386
450 vmmouse_init(s->mouse);
451 #endif
452 qemu_register_reset(kbd_reset, s);