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kvm: testsuite: add register compare helper for realmode tests
[qemu-kvm/fedora.git] / linux-user / main.c
blob8387b16414ce27b7a9382b721326839ab9595635
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29 /* For tb_lock */
30 #include "exec-all.h"
31
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
33
34 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
35 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
36 const char *cpu_vendor_string = NULL;
37
38 #if defined(__i386__) && !defined(CONFIG_STATIC)
39 /* Force usage of an ELF interpreter even if it is an ELF shared
40 object ! */
41 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
42 #endif
43
44 /* for recent libc, we add these dummy symbols which are not declared
45 when generating a linked object (bug in ld ?) */
46 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
47 asm(".globl __preinit_array_start\n"
48 ".globl __preinit_array_end\n"
49 ".globl __init_array_start\n"
50 ".globl __init_array_end\n"
51 ".globl __fini_array_start\n"
52 ".globl __fini_array_end\n"
53 ".section \".rodata\"\n"
54 "__preinit_array_start:\n"
55 "__preinit_array_end:\n"
56 "__init_array_start:\n"
57 "__init_array_end:\n"
58 "__fini_array_start:\n"
59 "__fini_array_end:\n"
60 ".long 0\n"
61 ".previous\n");
62 #endif
63
64 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
65 we allocate a bigger stack. Need a better solution, for example
66 by remapping the process stack directly at the right place */
67 unsigned long x86_stack_size = 512 * 1024;
68
69 void gemu_log(const char *fmt, ...)
70 {
71 va_list ap;
72
73 va_start(ap, fmt);
74 vfprintf(stderr, fmt, ap);
75 va_end(ap);
76 }
77
78 void cpu_outb(CPUState *env, int addr, int val)
79 {
80 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
81 }
82
83 void cpu_outw(CPUState *env, int addr, int val)
84 {
85 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
86 }
87
88 void cpu_outl(CPUState *env, int addr, int val)
89 {
90 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
91 }
92
93 int cpu_inb(CPUState *env, int addr)
94 {
95 fprintf(stderr, "inb: port=0x%04x\n", addr);
96 return 0;
97 }
98
99 int cpu_inw(CPUState *env, int addr)
100 {
101 fprintf(stderr, "inw: port=0x%04x\n", addr);
102 return 0;
103 }
104
105 int cpu_inl(CPUState *env, int addr)
106 {
107 fprintf(stderr, "inl: port=0x%04x\n", addr);
108 return 0;
109 }
110
111 int cpu_get_pic_interrupt(CPUState *env)
112 {
113 return -1;
114 }
115
116 /* timers for rdtsc */
117
118 #if 0
119
120 static uint64_t emu_time;
121
122 int64_t cpu_get_real_ticks(void)
123 {
124 return emu_time++;
125 }
126
127 #endif
128
129 #if defined(USE_NPTL)
130 /***********************************************************/
131 /* Helper routines for implementing atomic operations. */
132
133 /* To implement exclusive operations we force all cpus to syncronise.
134 We don't require a full sync, only that no cpus are executing guest code.
135 The alternative is to map target atomic ops onto host equivalents,
136 which requires quite a lot of per host/target work. */
137 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
138 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
139 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
140 static int pending_cpus;
141
142 /* Make sure everything is in a consistent state for calling fork(). */
143 void fork_start(void)
144 {
145 mmap_fork_start();
146 pthread_mutex_lock(&tb_lock);
147 pthread_mutex_lock(&exclusive_lock);
148 }
149
150 void fork_end(int child)
151 {
152 if (child) {
153 /* Child processes created by fork() only have a single thread.
154 Discard information about the parent threads. */
155 first_cpu = thread_env;
156 thread_env->next_cpu = NULL;
157 pending_cpus = 0;
158 pthread_mutex_init(&exclusive_lock, NULL);
159 pthread_cond_init(&exclusive_cond, NULL);
160 pthread_cond_init(&exclusive_resume, NULL);
161 pthread_mutex_init(&tb_lock, NULL);
162 } else {
163 pthread_mutex_unlock(&exclusive_lock);
164 pthread_mutex_unlock(&tb_lock);
165 }
166 mmap_fork_end(child);
167 }
168
169 /* Wait for pending exclusive operations to complete. The exclusive lock
170 must be held. */
171 static inline void exclusive_idle(void)
172 {
173 while (pending_cpus) {
174 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
175 }
176 }
177
178 /* Start an exclusive operation.
179 Must only be called from outside cpu_arm_exec. */
180 static inline void start_exclusive(void)
181 {
182 CPUState *other;
183 pthread_mutex_lock(&exclusive_lock);
184 exclusive_idle();
185
186 pending_cpus = 1;
187 /* Make all other cpus stop executing. */
188 for (other = first_cpu; other; other = other->next_cpu) {
189 if (other->running) {
190 pending_cpus++;
191 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
192 }
193 }
194 if (pending_cpus > 1) {
195 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
196 }
197 }
198
199 /* Finish an exclusive operation. */
200 static inline void end_exclusive(void)
201 {
202 pending_cpus = 0;
203 pthread_cond_broadcast(&exclusive_resume);
204 pthread_mutex_unlock(&exclusive_lock);
205 }
206
207 /* Wait for exclusive ops to finish, and begin cpu execution. */
208 static inline void cpu_exec_start(CPUState *env)
209 {
210 pthread_mutex_lock(&exclusive_lock);
211 exclusive_idle();
212 env->running = 1;
213 pthread_mutex_unlock(&exclusive_lock);
214 }
215
216 /* Mark cpu as not executing, and release pending exclusive ops. */
217 static inline void cpu_exec_end(CPUState *env)
218 {
219 pthread_mutex_lock(&exclusive_lock);
220 env->running = 0;
221 if (pending_cpus > 1) {
222 pending_cpus--;
223 if (pending_cpus == 1) {
224 pthread_cond_signal(&exclusive_cond);
225 }
226 }
227 exclusive_idle();
228 pthread_mutex_unlock(&exclusive_lock);
229 }
230 #else /* if !USE_NPTL */
231 /* These are no-ops because we are not threadsafe. */
232 static inline void cpu_exec_start(CPUState *env)
233 {
234 }
235
236 static inline void cpu_exec_end(CPUState *env)
237 {
238 }
239
240 static inline void start_exclusive(void)
241 {
242 }
243
244 static inline void end_exclusive(void)
245 {
246 }
247
248 void fork_start(void)
249 {
250 }
251
252 void fork_end(int child)
253 {
254 }
255 #endif
256
257
258 #ifdef TARGET_I386
259 /***********************************************************/
260 /* CPUX86 core interface */
261
262 void cpu_smm_update(CPUState *env)
263 {
264 }
265
266 uint64_t cpu_get_tsc(CPUX86State *env)
267 {
268 return cpu_get_real_ticks();
269 }
270
271 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
272 int flags)
273 {
274 unsigned int e1, e2;
275 uint32_t *p;
276 e1 = (addr << 16) | (limit & 0xffff);
277 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
278 e2 |= flags;
279 p = ptr;
280 p[0] = tswapl(e1);
281 p[1] = tswapl(e2);
282 }
283
284 #if TARGET_X86_64
285 uint64_t idt_table[512];
286
287 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
288 uint64_t addr, unsigned int sel)
289 {
290 uint32_t *p, e1, e2;
291 e1 = (addr & 0xffff) | (sel << 16);
292 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
293 p = ptr;
294 p[0] = tswap32(e1);
295 p[1] = tswap32(e2);
296 p[2] = tswap32(addr >> 32);
297 p[3] = 0;
298 }
299 /* only dpl matters as we do only user space emulation */
300 static void set_idt(int n, unsigned int dpl)
301 {
302 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
303 }
304 #else
305 uint64_t idt_table[256];
306
307 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
308 uint32_t addr, unsigned int sel)
309 {
310 uint32_t *p, e1, e2;
311 e1 = (addr & 0xffff) | (sel << 16);
312 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
313 p = ptr;
314 p[0] = tswap32(e1);
315 p[1] = tswap32(e2);
316 }
317
318 /* only dpl matters as we do only user space emulation */
319 static void set_idt(int n, unsigned int dpl)
320 {
321 set_gate(idt_table + n, 0, dpl, 0, 0);
322 }
323 #endif
324
325 void cpu_loop(CPUX86State *env)
326 {
327 int trapnr;
328 abi_ulong pc;
329 target_siginfo_t info;
330
331 for(;;) {
332 trapnr = cpu_x86_exec(env);
333 switch(trapnr) {
334 case 0x80:
335 /* linux syscall from int $0x80 */
336 env->regs[R_EAX] = do_syscall(env,
337 env->regs[R_EAX],
338 env->regs[R_EBX],
339 env->regs[R_ECX],
340 env->regs[R_EDX],
341 env->regs[R_ESI],
342 env->regs[R_EDI],
343 env->regs[R_EBP]);
344 break;
345 #ifndef TARGET_ABI32
346 case EXCP_SYSCALL:
347 /* linux syscall from syscall intruction */
348 env->regs[R_EAX] = do_syscall(env,
349 env->regs[R_EAX],
350 env->regs[R_EDI],
351 env->regs[R_ESI],
352 env->regs[R_EDX],
353 env->regs[10],
354 env->regs[8],
355 env->regs[9]);
356 env->eip = env->exception_next_eip;
357 break;
358 #endif
359 case EXCP0B_NOSEG:
360 case EXCP0C_STACK:
361 info.si_signo = SIGBUS;
362 info.si_errno = 0;
363 info.si_code = TARGET_SI_KERNEL;
364 info._sifields._sigfault._addr = 0;
365 queue_signal(env, info.si_signo, &info);
366 break;
367 case EXCP0D_GPF:
368 /* XXX: potential problem if ABI32 */
369 #ifndef TARGET_X86_64
370 if (env->eflags & VM_MASK) {
371 handle_vm86_fault(env);
372 } else
373 #endif
374 {
375 info.si_signo = SIGSEGV;
376 info.si_errno = 0;
377 info.si_code = TARGET_SI_KERNEL;
378 info._sifields._sigfault._addr = 0;
379 queue_signal(env, info.si_signo, &info);
380 }
381 break;
382 case EXCP0E_PAGE:
383 info.si_signo = SIGSEGV;
384 info.si_errno = 0;
385 if (!(env->error_code & 1))
386 info.si_code = TARGET_SEGV_MAPERR;
387 else
388 info.si_code = TARGET_SEGV_ACCERR;
389 info._sifields._sigfault._addr = env->cr[2];
390 queue_signal(env, info.si_signo, &info);
391 break;
392 case EXCP00_DIVZ:
393 #ifndef TARGET_X86_64
394 if (env->eflags & VM_MASK) {
395 handle_vm86_trap(env, trapnr);
396 } else
397 #endif
398 {
399 /* division by zero */
400 info.si_signo = SIGFPE;
401 info.si_errno = 0;
402 info.si_code = TARGET_FPE_INTDIV;
403 info._sifields._sigfault._addr = env->eip;
404 queue_signal(env, info.si_signo, &info);
405 }
406 break;
407 case EXCP01_SSTP:
408 case EXCP03_INT3:
409 #ifndef TARGET_X86_64
410 if (env->eflags & VM_MASK) {
411 handle_vm86_trap(env, trapnr);
412 } else
413 #endif
414 {
415 info.si_signo = SIGTRAP;
416 info.si_errno = 0;
417 if (trapnr == EXCP01_SSTP) {
418 info.si_code = TARGET_TRAP_BRKPT;
419 info._sifields._sigfault._addr = env->eip;
420 } else {
421 info.si_code = TARGET_SI_KERNEL;
422 info._sifields._sigfault._addr = 0;
423 }
424 queue_signal(env, info.si_signo, &info);
425 }
426 break;
427 case EXCP04_INTO:
428 case EXCP05_BOUND:
429 #ifndef TARGET_X86_64
430 if (env->eflags & VM_MASK) {
431 handle_vm86_trap(env, trapnr);
432 } else
433 #endif
434 {
435 info.si_signo = SIGSEGV;
436 info.si_errno = 0;
437 info.si_code = TARGET_SI_KERNEL;
438 info._sifields._sigfault._addr = 0;
439 queue_signal(env, info.si_signo, &info);
440 }
441 break;
442 case EXCP06_ILLOP:
443 info.si_signo = SIGILL;
444 info.si_errno = 0;
445 info.si_code = TARGET_ILL_ILLOPN;
446 info._sifields._sigfault._addr = env->eip;
447 queue_signal(env, info.si_signo, &info);
448 break;
449 case EXCP_INTERRUPT:
450 /* just indicate that signals should be handled asap */
451 break;
452 case EXCP_DEBUG:
453 {
454 int sig;
455
456 sig = gdb_handlesig (env, TARGET_SIGTRAP);
457 if (sig)
458 {
459 info.si_signo = sig;
460 info.si_errno = 0;
461 info.si_code = TARGET_TRAP_BRKPT;
462 queue_signal(env, info.si_signo, &info);
463 }
464 }
465 break;
466 default:
467 pc = env->segs[R_CS].base + env->eip;
468 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
469 (long)pc, trapnr);
470 abort();
471 }
472 process_pending_signals(env);
473 }
474 }
475 #endif
476
477 #ifdef TARGET_ARM
478
479 /* XXX: find a better solution */
480 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
481
482 static void arm_cache_flush(abi_ulong start, abi_ulong last)
483 {
484 abi_ulong addr, last1;
485
486 if (last < start)
487 return;
488 addr = start;
489 for(;;) {
490 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
491 if (last1 > last)
492 last1 = last;
493 tb_invalidate_page_range(addr, last1 + 1);
494 if (last1 == last)
495 break;
496 addr = last1 + 1;
497 }
498 }
499
500 /* Handle a jump to the kernel code page. */
501 static int
502 do_kernel_trap(CPUARMState *env)
503 {
504 uint32_t addr;
505 uint32_t cpsr;
506 uint32_t val;
507
508 switch (env->regs[15]) {
509 case 0xffff0fa0: /* __kernel_memory_barrier */
510 /* ??? No-op. Will need to do better for SMP. */
511 break;
512 case 0xffff0fc0: /* __kernel_cmpxchg */
513 /* XXX: This only works between threads, not between processes.
514 It's probably possible to implement this with native host
515 operations. However things like ldrex/strex are much harder so
516 there's not much point trying. */
517 start_exclusive();
518 cpsr = cpsr_read(env);
519 addr = env->regs[2];
520 /* FIXME: This should SEGV if the access fails. */
521 if (get_user_u32(val, addr))
522 val = ~env->regs[0];
523 if (val == env->regs[0]) {
524 val = env->regs[1];
525 /* FIXME: Check for segfaults. */
526 put_user_u32(val, addr);
527 env->regs[0] = 0;
528 cpsr |= CPSR_C;
529 } else {
530 env->regs[0] = -1;
531 cpsr &= ~CPSR_C;
532 }
533 cpsr_write(env, cpsr, CPSR_C);
534 end_exclusive();
535 break;
536 case 0xffff0fe0: /* __kernel_get_tls */
537 env->regs[0] = env->cp15.c13_tls2;
538 break;
539 default:
540 return 1;
541 }
542 /* Jump back to the caller. */
543 addr = env->regs[14];
544 if (addr & 1) {
545 env->thumb = 1;
546 addr &= ~1;
547 }
548 env->regs[15] = addr;
549
550 return 0;
551 }
552
553 void cpu_loop(CPUARMState *env)
554 {
555 int trapnr;
556 unsigned int n, insn;
557 target_siginfo_t info;
558 uint32_t addr;
559
560 for(;;) {
561 cpu_exec_start(env);
562 trapnr = cpu_arm_exec(env);
563 cpu_exec_end(env);
564 switch(trapnr) {
565 case EXCP_UDEF:
566 {
567 TaskState *ts = env->opaque;
568 uint32_t opcode;
569 int rc;
570
571 /* we handle the FPU emulation here, as Linux */
572 /* we get the opcode */
573 /* FIXME - what to do if get_user() fails? */
574 get_user_u32(opcode, env->regs[15]);
575
576 rc = EmulateAll(opcode, &ts->fpa, env);
577 if (rc == 0) { /* illegal instruction */
578 info.si_signo = SIGILL;
579 info.si_errno = 0;
580 info.si_code = TARGET_ILL_ILLOPN;
581 info._sifields._sigfault._addr = env->regs[15];
582 queue_signal(env, info.si_signo, &info);
583 } else if (rc < 0) { /* FP exception */
584 int arm_fpe=0;
585
586 /* translate softfloat flags to FPSR flags */
587 if (-rc & float_flag_invalid)
588 arm_fpe |= BIT_IOC;
589 if (-rc & float_flag_divbyzero)
590 arm_fpe |= BIT_DZC;
591 if (-rc & float_flag_overflow)
592 arm_fpe |= BIT_OFC;
593 if (-rc & float_flag_underflow)
594 arm_fpe |= BIT_UFC;
595 if (-rc & float_flag_inexact)
596 arm_fpe |= BIT_IXC;
597
598 FPSR fpsr = ts->fpa.fpsr;
599 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
600
601 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
602 info.si_signo = SIGFPE;
603 info.si_errno = 0;
604
605 /* ordered by priority, least first */
606 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
607 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
608 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
609 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
610 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
611
612 info._sifields._sigfault._addr = env->regs[15];
613 queue_signal(env, info.si_signo, &info);
614 } else {
615 env->regs[15] += 4;
616 }
617
618 /* accumulate unenabled exceptions */
619 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
620 fpsr |= BIT_IXC;
621 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
622 fpsr |= BIT_UFC;
623 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
624 fpsr |= BIT_OFC;
625 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
626 fpsr |= BIT_DZC;
627 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
628 fpsr |= BIT_IOC;
629 ts->fpa.fpsr=fpsr;
630 } else { /* everything OK */
631 /* increment PC */
632 env->regs[15] += 4;
633 }
634 }
635 break;
636 case EXCP_SWI:
637 case EXCP_BKPT:
638 {
639 env->eabi = 1;
640 /* system call */
641 if (trapnr == EXCP_BKPT) {
642 if (env->thumb) {
643 /* FIXME - what to do if get_user() fails? */
644 get_user_u16(insn, env->regs[15]);
645 n = insn & 0xff;
646 env->regs[15] += 2;
647 } else {
648 /* FIXME - what to do if get_user() fails? */
649 get_user_u32(insn, env->regs[15]);
650 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
651 env->regs[15] += 4;
652 }
653 } else {
654 if (env->thumb) {
655 /* FIXME - what to do if get_user() fails? */
656 get_user_u16(insn, env->regs[15] - 2);
657 n = insn & 0xff;
658 } else {
659 /* FIXME - what to do if get_user() fails? */
660 get_user_u32(insn, env->regs[15] - 4);
661 n = insn & 0xffffff;
662 }
663 }
664
665 if (n == ARM_NR_cacheflush) {
666 arm_cache_flush(env->regs[0], env->regs[1]);
667 } else if (n == ARM_NR_semihosting
668 || n == ARM_NR_thumb_semihosting) {
669 env->regs[0] = do_arm_semihosting (env);
670 } else if (n == 0 || n >= ARM_SYSCALL_BASE
671 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
672 /* linux syscall */
673 if (env->thumb || n == 0) {
674 n = env->regs[7];
675 } else {
676 n -= ARM_SYSCALL_BASE;
677 env->eabi = 0;
678 }
679 if ( n > ARM_NR_BASE) {
680 switch (n) {
681 case ARM_NR_cacheflush:
682 arm_cache_flush(env->regs[0], env->regs[1]);
683 break;
684 case ARM_NR_set_tls:
685 cpu_set_tls(env, env->regs[0]);
686 env->regs[0] = 0;
687 break;
688 default:
689 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
690 n);
691 env->regs[0] = -TARGET_ENOSYS;
692 break;
693 }
694 } else {
695 env->regs[0] = do_syscall(env,
696 n,
697 env->regs[0],
698 env->regs[1],
699 env->regs[2],
700 env->regs[3],
701 env->regs[4],
702 env->regs[5]);
703 }
704 } else {
705 goto error;
706 }
707 }
708 break;
709 case EXCP_INTERRUPT:
710 /* just indicate that signals should be handled asap */
711 break;
712 case EXCP_PREFETCH_ABORT:
713 addr = env->cp15.c6_insn;
714 goto do_segv;
715 case EXCP_DATA_ABORT:
716 addr = env->cp15.c6_data;
717 goto do_segv;
718 do_segv:
719 {
720 info.si_signo = SIGSEGV;
721 info.si_errno = 0;
722 /* XXX: check env->error_code */
723 info.si_code = TARGET_SEGV_MAPERR;
724 info._sifields._sigfault._addr = addr;
725 queue_signal(env, info.si_signo, &info);
726 }
727 break;
728 case EXCP_DEBUG:
729 {
730 int sig;
731
732 sig = gdb_handlesig (env, TARGET_SIGTRAP);
733 if (sig)
734 {
735 info.si_signo = sig;
736 info.si_errno = 0;
737 info.si_code = TARGET_TRAP_BRKPT;
738 queue_signal(env, info.si_signo, &info);
739 }
740 }
741 break;
742 case EXCP_KERNEL_TRAP:
743 if (do_kernel_trap(env))
744 goto error;
745 break;
746 default:
747 error:
748 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
749 trapnr);
750 cpu_dump_state(env, stderr, fprintf, 0);
751 abort();
752 }
753 process_pending_signals(env);
754 }
755 }
756
757 #endif
758
759 #ifdef TARGET_SPARC
760
761 //#define DEBUG_WIN
762
763 /* WARNING: dealing with register windows _is_ complicated. More info
764 can be found at http://www.sics.se/~psm/sparcstack.html */
765 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
766 {
767 index = (index + cwp * 16) % (16 * env->nwindows);
768 /* wrap handling : if cwp is on the last window, then we use the
769 registers 'after' the end */
770 if (index < 8 && env->cwp == env->nwindows - 1)
771 index += 16 * env->nwindows;
772 return index;
773 }
774
775 /* save the register window 'cwp1' */
776 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
777 {
778 unsigned int i;
779 abi_ulong sp_ptr;
780
781 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
782 #if defined(DEBUG_WIN)
783 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
784 sp_ptr, cwp1);
785 #endif
786 for(i = 0; i < 16; i++) {
787 /* FIXME - what to do if put_user() fails? */
788 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
789 sp_ptr += sizeof(abi_ulong);
790 }
791 }
792
793 static void save_window(CPUSPARCState *env)
794 {
795 #ifndef TARGET_SPARC64
796 unsigned int new_wim;
797 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
798 ((1LL << env->nwindows) - 1);
799 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
800 env->wim = new_wim;
801 #else
802 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
803 env->cansave++;
804 env->canrestore--;
805 #endif
806 }
807
808 static void restore_window(CPUSPARCState *env)
809 {
810 unsigned int new_wim, i, cwp1;
811 abi_ulong sp_ptr;
812
813 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
814 ((1LL << env->nwindows) - 1);
815
816 /* restore the invalid window */
817 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
818 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
819 #if defined(DEBUG_WIN)
820 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
821 sp_ptr, cwp1);
822 #endif
823 for(i = 0; i < 16; i++) {
824 /* FIXME - what to do if get_user() fails? */
825 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
826 sp_ptr += sizeof(abi_ulong);
827 }
828 env->wim = new_wim;
829 #ifdef TARGET_SPARC64
830 env->canrestore++;
831 if (env->cleanwin < env->nwindows - 1)
832 env->cleanwin++;
833 env->cansave--;
834 #endif
835 }
836
837 static void flush_windows(CPUSPARCState *env)
838 {
839 int offset, cwp1;
840
841 offset = 1;
842 for(;;) {
843 /* if restore would invoke restore_window(), then we can stop */
844 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
845 if (env->wim & (1 << cwp1))
846 break;
847 save_window_offset(env, cwp1);
848 offset++;
849 }
850 /* set wim so that restore will reload the registers */
851 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
852 env->wim = 1 << cwp1;
853 #if defined(DEBUG_WIN)
854 printf("flush_windows: nb=%d\n", offset - 1);
855 #endif
856 }
857
858 void cpu_loop (CPUSPARCState *env)
859 {
860 int trapnr, ret;
861 target_siginfo_t info;
862
863 while (1) {
864 trapnr = cpu_sparc_exec (env);
865
866 switch (trapnr) {
867 #ifndef TARGET_SPARC64
868 case 0x88:
869 case 0x90:
870 #else
871 case 0x110:
872 case 0x16d:
873 #endif
874 ret = do_syscall (env, env->gregs[1],
875 env->regwptr[0], env->regwptr[1],
876 env->regwptr[2], env->regwptr[3],
877 env->regwptr[4], env->regwptr[5]);
878 if ((unsigned int)ret >= (unsigned int)(-515)) {
879 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
880 env->xcc |= PSR_CARRY;
881 #else
882 env->psr |= PSR_CARRY;
883 #endif
884 ret = -ret;
885 } else {
886 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
887 env->xcc &= ~PSR_CARRY;
888 #else
889 env->psr &= ~PSR_CARRY;
890 #endif
891 }
892 env->regwptr[0] = ret;
893 /* next instruction */
894 env->pc = env->npc;
895 env->npc = env->npc + 4;
896 break;
897 case 0x83: /* flush windows */
898 #ifdef TARGET_ABI32
899 case 0x103:
900 #endif
901 flush_windows(env);
902 /* next instruction */
903 env->pc = env->npc;
904 env->npc = env->npc + 4;
905 break;
906 #ifndef TARGET_SPARC64
907 case TT_WIN_OVF: /* window overflow */
908 save_window(env);
909 break;
910 case TT_WIN_UNF: /* window underflow */
911 restore_window(env);
912 break;
913 case TT_TFAULT:
914 case TT_DFAULT:
915 {
916 info.si_signo = SIGSEGV;
917 info.si_errno = 0;
918 /* XXX: check env->error_code */
919 info.si_code = TARGET_SEGV_MAPERR;
920 info._sifields._sigfault._addr = env->mmuregs[4];
921 queue_signal(env, info.si_signo, &info);
922 }
923 break;
924 #else
925 case TT_SPILL: /* window overflow */
926 save_window(env);
927 break;
928 case TT_FILL: /* window underflow */
929 restore_window(env);
930 break;
931 case TT_TFAULT:
932 case TT_DFAULT:
933 {
934 info.si_signo = SIGSEGV;
935 info.si_errno = 0;
936 /* XXX: check env->error_code */
937 info.si_code = TARGET_SEGV_MAPERR;
938 if (trapnr == TT_DFAULT)
939 info._sifields._sigfault._addr = env->dmmuregs[4];
940 else
941 info._sifields._sigfault._addr = env->tsptr->tpc;
942 queue_signal(env, info.si_signo, &info);
943 }
944 break;
945 #ifndef TARGET_ABI32
946 case 0x16e:
947 flush_windows(env);
948 sparc64_get_context(env);
949 break;
950 case 0x16f:
951 flush_windows(env);
952 sparc64_set_context(env);
953 break;
954 #endif
955 #endif
956 case EXCP_INTERRUPT:
957 /* just indicate that signals should be handled asap */
958 break;
959 case EXCP_DEBUG:
960 {
961 int sig;
962
963 sig = gdb_handlesig (env, TARGET_SIGTRAP);
964 if (sig)
965 {
966 info.si_signo = sig;
967 info.si_errno = 0;
968 info.si_code = TARGET_TRAP_BRKPT;
969 queue_signal(env, info.si_signo, &info);
970 }
971 }
972 break;
973 default:
974 printf ("Unhandled trap: 0x%x\n", trapnr);
975 cpu_dump_state(env, stderr, fprintf, 0);
976 exit (1);
977 }
978 process_pending_signals (env);
979 }
980 }
981
982 #endif
983
984 #ifdef TARGET_PPC
985 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
986 {
987 /* TO FIX */
988 return 0;
989 }
990
991 uint32_t cpu_ppc_load_tbl (CPUState *env)
992 {
993 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
994 }
995
996 uint32_t cpu_ppc_load_tbu (CPUState *env)
997 {
998 return cpu_ppc_get_tb(env) >> 32;
999 }
1000
1001 uint32_t cpu_ppc_load_atbl (CPUState *env)
1002 {
1003 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1004 }
1005
1006 uint32_t cpu_ppc_load_atbu (CPUState *env)
1007 {
1008 return cpu_ppc_get_tb(env) >> 32;
1009 }
1010
1011 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1012 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1013
1014 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1015 {
1016 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1017 }
1018
1019 /* XXX: to be fixed */
1020 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1021 {
1022 return -1;
1023 }
1024
1025 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1026 {
1027 return -1;
1028 }
1029
1030 #define EXCP_DUMP(env, fmt, args...) \
1031 do { \
1032 fprintf(stderr, fmt , ##args); \
1033 cpu_dump_state(env, stderr, fprintf, 0); \
1034 if (loglevel != 0) { \
1035 fprintf(logfile, fmt , ##args); \
1036 cpu_dump_state(env, logfile, fprintf, 0); \
1037 } \
1038 } while (0)
1039
1040 void cpu_loop(CPUPPCState *env)
1041 {
1042 target_siginfo_t info;
1043 int trapnr;
1044 uint32_t ret;
1045
1046 for(;;) {
1047 trapnr = cpu_ppc_exec(env);
1048 switch(trapnr) {
1049 case POWERPC_EXCP_NONE:
1050 /* Just go on */
1051 break;
1052 case POWERPC_EXCP_CRITICAL: /* Critical input */
1053 cpu_abort(env, "Critical interrupt while in user mode. "
1054 "Aborting\n");
1055 break;
1056 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1057 cpu_abort(env, "Machine check exception while in user mode. "
1058 "Aborting\n");
1059 break;
1060 case POWERPC_EXCP_DSI: /* Data storage exception */
1061 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1062 env->spr[SPR_DAR]);
1063 /* XXX: check this. Seems bugged */
1064 switch (env->error_code & 0xFF000000) {
1065 case 0x40000000:
1066 info.si_signo = TARGET_SIGSEGV;
1067 info.si_errno = 0;
1068 info.si_code = TARGET_SEGV_MAPERR;
1069 break;
1070 case 0x04000000:
1071 info.si_signo = TARGET_SIGILL;
1072 info.si_errno = 0;
1073 info.si_code = TARGET_ILL_ILLADR;
1074 break;
1075 case 0x08000000:
1076 info.si_signo = TARGET_SIGSEGV;
1077 info.si_errno = 0;
1078 info.si_code = TARGET_SEGV_ACCERR;
1079 break;
1080 default:
1081 /* Let's send a regular segfault... */
1082 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1083 env->error_code);
1084 info.si_signo = TARGET_SIGSEGV;
1085 info.si_errno = 0;
1086 info.si_code = TARGET_SEGV_MAPERR;
1087 break;
1088 }
1089 info._sifields._sigfault._addr = env->nip;
1090 queue_signal(env, info.si_signo, &info);
1091 break;
1092 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1093 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1094 env->spr[SPR_SRR0]);
1095 /* XXX: check this */
1096 switch (env->error_code & 0xFF000000) {
1097 case 0x40000000:
1098 info.si_signo = TARGET_SIGSEGV;
1099 info.si_errno = 0;
1100 info.si_code = TARGET_SEGV_MAPERR;
1101 break;
1102 case 0x10000000:
1103 case 0x08000000:
1104 info.si_signo = TARGET_SIGSEGV;
1105 info.si_errno = 0;
1106 info.si_code = TARGET_SEGV_ACCERR;
1107 break;
1108 default:
1109 /* Let's send a regular segfault... */
1110 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1111 env->error_code);
1112 info.si_signo = TARGET_SIGSEGV;
1113 info.si_errno = 0;
1114 info.si_code = TARGET_SEGV_MAPERR;
1115 break;
1116 }
1117 info._sifields._sigfault._addr = env->nip - 4;
1118 queue_signal(env, info.si_signo, &info);
1119 break;
1120 case POWERPC_EXCP_EXTERNAL: /* External input */
1121 cpu_abort(env, "External interrupt while in user mode. "
1122 "Aborting\n");
1123 break;
1124 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1125 EXCP_DUMP(env, "Unaligned memory access\n");
1126 /* XXX: check this */
1127 info.si_signo = TARGET_SIGBUS;
1128 info.si_errno = 0;
1129 info.si_code = TARGET_BUS_ADRALN;
1130 info._sifields._sigfault._addr = env->nip - 4;
1131 queue_signal(env, info.si_signo, &info);
1132 break;
1133 case POWERPC_EXCP_PROGRAM: /* Program exception */
1134 /* XXX: check this */
1135 switch (env->error_code & ~0xF) {
1136 case POWERPC_EXCP_FP:
1137 EXCP_DUMP(env, "Floating point program exception\n");
1138 info.si_signo = TARGET_SIGFPE;
1139 info.si_errno = 0;
1140 switch (env->error_code & 0xF) {
1141 case POWERPC_EXCP_FP_OX:
1142 info.si_code = TARGET_FPE_FLTOVF;
1143 break;
1144 case POWERPC_EXCP_FP_UX:
1145 info.si_code = TARGET_FPE_FLTUND;
1146 break;
1147 case POWERPC_EXCP_FP_ZX:
1148 case POWERPC_EXCP_FP_VXZDZ:
1149 info.si_code = TARGET_FPE_FLTDIV;
1150 break;
1151 case POWERPC_EXCP_FP_XX:
1152 info.si_code = TARGET_FPE_FLTRES;
1153 break;
1154 case POWERPC_EXCP_FP_VXSOFT:
1155 info.si_code = TARGET_FPE_FLTINV;
1156 break;
1157 case POWERPC_EXCP_FP_VXSNAN:
1158 case POWERPC_EXCP_FP_VXISI:
1159 case POWERPC_EXCP_FP_VXIDI:
1160 case POWERPC_EXCP_FP_VXIMZ:
1161 case POWERPC_EXCP_FP_VXVC:
1162 case POWERPC_EXCP_FP_VXSQRT:
1163 case POWERPC_EXCP_FP_VXCVI:
1164 info.si_code = TARGET_FPE_FLTSUB;
1165 break;
1166 default:
1167 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1168 env->error_code);
1169 break;
1170 }
1171 break;
1172 case POWERPC_EXCP_INVAL:
1173 EXCP_DUMP(env, "Invalid instruction\n");
1174 info.si_signo = TARGET_SIGILL;
1175 info.si_errno = 0;
1176 switch (env->error_code & 0xF) {
1177 case POWERPC_EXCP_INVAL_INVAL:
1178 info.si_code = TARGET_ILL_ILLOPC;
1179 break;
1180 case POWERPC_EXCP_INVAL_LSWX:
1181 info.si_code = TARGET_ILL_ILLOPN;
1182 break;
1183 case POWERPC_EXCP_INVAL_SPR:
1184 info.si_code = TARGET_ILL_PRVREG;
1185 break;
1186 case POWERPC_EXCP_INVAL_FP:
1187 info.si_code = TARGET_ILL_COPROC;
1188 break;
1189 default:
1190 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1191 env->error_code & 0xF);
1192 info.si_code = TARGET_ILL_ILLADR;
1193 break;
1194 }
1195 break;
1196 case POWERPC_EXCP_PRIV:
1197 EXCP_DUMP(env, "Privilege violation\n");
1198 info.si_signo = TARGET_SIGILL;
1199 info.si_errno = 0;
1200 switch (env->error_code & 0xF) {
1201 case POWERPC_EXCP_PRIV_OPC:
1202 info.si_code = TARGET_ILL_PRVOPC;
1203 break;
1204 case POWERPC_EXCP_PRIV_REG:
1205 info.si_code = TARGET_ILL_PRVREG;
1206 break;
1207 default:
1208 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1209 env->error_code & 0xF);
1210 info.si_code = TARGET_ILL_PRVOPC;
1211 break;
1212 }
1213 break;
1214 case POWERPC_EXCP_TRAP:
1215 cpu_abort(env, "Tried to call a TRAP\n");
1216 break;
1217 default:
1218 /* Should not happen ! */
1219 cpu_abort(env, "Unknown program exception (%02x)\n",
1220 env->error_code);
1221 break;
1222 }
1223 info._sifields._sigfault._addr = env->nip - 4;
1224 queue_signal(env, info.si_signo, &info);
1225 break;
1226 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1227 EXCP_DUMP(env, "No floating point allowed\n");
1228 info.si_signo = TARGET_SIGILL;
1229 info.si_errno = 0;
1230 info.si_code = TARGET_ILL_COPROC;
1231 info._sifields._sigfault._addr = env->nip - 4;
1232 queue_signal(env, info.si_signo, &info);
1233 break;
1234 case POWERPC_EXCP_SYSCALL: /* System call exception */
1235 cpu_abort(env, "Syscall exception while in user mode. "
1236 "Aborting\n");
1237 break;
1238 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1239 EXCP_DUMP(env, "No APU instruction allowed\n");
1240 info.si_signo = TARGET_SIGILL;
1241 info.si_errno = 0;
1242 info.si_code = TARGET_ILL_COPROC;
1243 info._sifields._sigfault._addr = env->nip - 4;
1244 queue_signal(env, info.si_signo, &info);
1245 break;
1246 case POWERPC_EXCP_DECR: /* Decrementer exception */
1247 cpu_abort(env, "Decrementer interrupt while in user mode. "
1248 "Aborting\n");
1249 break;
1250 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1251 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1252 "Aborting\n");
1253 break;
1254 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1255 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1256 "Aborting\n");
1257 break;
1258 case POWERPC_EXCP_DTLB: /* Data TLB error */
1259 cpu_abort(env, "Data TLB exception while in user mode. "
1260 "Aborting\n");
1261 break;
1262 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1263 cpu_abort(env, "Instruction TLB exception while in user mode. "
1264 "Aborting\n");
1265 break;
1266 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1267 /* XXX: check this */
1268 {
1269 int sig;
1270
1271 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1272 if (sig) {
1273 info.si_signo = sig;
1274 info.si_errno = 0;
1275 info.si_code = TARGET_TRAP_BRKPT;
1276 queue_signal(env, info.si_signo, &info);
1277 }
1278 }
1279 break;
1280 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1281 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1282 info.si_signo = TARGET_SIGILL;
1283 info.si_errno = 0;
1284 info.si_code = TARGET_ILL_COPROC;
1285 info._sifields._sigfault._addr = env->nip - 4;
1286 queue_signal(env, info.si_signo, &info);
1287 break;
1288 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1289 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1290 break;
1291 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1292 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1293 break;
1294 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1295 cpu_abort(env, "Performance monitor exception not handled\n");
1296 break;
1297 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1298 cpu_abort(env, "Doorbell interrupt while in user mode. "
1299 "Aborting\n");
1300 break;
1301 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1302 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1303 "Aborting\n");
1304 break;
1305 case POWERPC_EXCP_RESET: /* System reset exception */
1306 cpu_abort(env, "Reset interrupt while in user mode. "
1307 "Aborting\n");
1308 break;
1309 case POWERPC_EXCP_DSEG: /* Data segment exception */
1310 cpu_abort(env, "Data segment exception while in user mode. "
1311 "Aborting\n");
1312 break;
1313 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1314 cpu_abort(env, "Instruction segment exception "
1315 "while in user mode. Aborting\n");
1316 break;
1317 /* PowerPC 64 with hypervisor mode support */
1318 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1319 cpu_abort(env, "Hypervisor decrementer interrupt "
1320 "while in user mode. Aborting\n");
1321 break;
1322 case POWERPC_EXCP_TRACE: /* Trace exception */
1323 /* Nothing to do:
1324 * we use this exception to emulate step-by-step execution mode.
1325 */
1326 break;
1327 /* PowerPC 64 with hypervisor mode support */
1328 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1329 cpu_abort(env, "Hypervisor data storage exception "
1330 "while in user mode. Aborting\n");
1331 break;
1332 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1333 cpu_abort(env, "Hypervisor instruction storage exception "
1334 "while in user mode. Aborting\n");
1335 break;
1336 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1337 cpu_abort(env, "Hypervisor data segment exception "
1338 "while in user mode. Aborting\n");
1339 break;
1340 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1341 cpu_abort(env, "Hypervisor instruction segment exception "
1342 "while in user mode. Aborting\n");
1343 break;
1344 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1345 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1346 info.si_signo = TARGET_SIGILL;
1347 info.si_errno = 0;
1348 info.si_code = TARGET_ILL_COPROC;
1349 info._sifields._sigfault._addr = env->nip - 4;
1350 queue_signal(env, info.si_signo, &info);
1351 break;
1352 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1353 cpu_abort(env, "Programable interval timer interrupt "
1354 "while in user mode. Aborting\n");
1355 break;
1356 case POWERPC_EXCP_IO: /* IO error exception */
1357 cpu_abort(env, "IO error exception while in user mode. "
1358 "Aborting\n");
1359 break;
1360 case POWERPC_EXCP_RUNM: /* Run mode exception */
1361 cpu_abort(env, "Run mode exception while in user mode. "
1362 "Aborting\n");
1363 break;
1364 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1365 cpu_abort(env, "Emulation trap exception not handled\n");
1366 break;
1367 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1368 cpu_abort(env, "Instruction fetch TLB exception "
1369 "while in user-mode. Aborting");
1370 break;
1371 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1372 cpu_abort(env, "Data load TLB exception while in user-mode. "
1373 "Aborting");
1374 break;
1375 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1376 cpu_abort(env, "Data store TLB exception while in user-mode. "
1377 "Aborting");
1378 break;
1379 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1380 cpu_abort(env, "Floating-point assist exception not handled\n");
1381 break;
1382 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1383 cpu_abort(env, "Instruction address breakpoint exception "
1384 "not handled\n");
1385 break;
1386 case POWERPC_EXCP_SMI: /* System management interrupt */
1387 cpu_abort(env, "System management interrupt while in user mode. "
1388 "Aborting\n");
1389 break;
1390 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1391 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1392 "Aborting\n");
1393 break;
1394 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1395 cpu_abort(env, "Performance monitor exception not handled\n");
1396 break;
1397 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1398 cpu_abort(env, "Vector assist exception not handled\n");
1399 break;
1400 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1401 cpu_abort(env, "Soft patch exception not handled\n");
1402 break;
1403 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1404 cpu_abort(env, "Maintenance exception while in user mode. "
1405 "Aborting\n");
1406 break;
1407 case POWERPC_EXCP_STOP: /* stop translation */
1408 /* We did invalidate the instruction cache. Go on */
1409 break;
1410 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1411 /* We just stopped because of a branch. Go on */
1412 break;
1413 case POWERPC_EXCP_SYSCALL_USER:
1414 /* system call in user-mode emulation */
1415 /* WARNING:
1416 * PPC ABI uses overflow flag in cr0 to signal an error
1417 * in syscalls.
1418 */
1419 #if 0
1420 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1421 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1422 #endif
1423 env->crf[0] &= ~0x1;
1424 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1425 env->gpr[5], env->gpr[6], env->gpr[7],
1426 env->gpr[8]);
1427 if (ret > (uint32_t)(-515)) {
1428 env->crf[0] |= 0x1;
1429 ret = -ret;
1430 }
1431 env->gpr[3] = ret;
1432 #if 0
1433 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1434 #endif
1435 break;
1436 case EXCP_INTERRUPT:
1437 /* just indicate that signals should be handled asap */
1438 break;
1439 default:
1440 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1441 break;
1442 }
1443 process_pending_signals(env);
1444 }
1445 }
1446 #endif
1447
1448 #ifdef TARGET_MIPS
1449
1450 #define MIPS_SYS(name, args) args,
1451
1452 static const uint8_t mips_syscall_args[] = {
1453 MIPS_SYS(sys_syscall , 0) /* 4000 */
1454 MIPS_SYS(sys_exit , 1)
1455 MIPS_SYS(sys_fork , 0)
1456 MIPS_SYS(sys_read , 3)
1457 MIPS_SYS(sys_write , 3)
1458 MIPS_SYS(sys_open , 3) /* 4005 */
1459 MIPS_SYS(sys_close , 1)
1460 MIPS_SYS(sys_waitpid , 3)
1461 MIPS_SYS(sys_creat , 2)
1462 MIPS_SYS(sys_link , 2)
1463 MIPS_SYS(sys_unlink , 1) /* 4010 */
1464 MIPS_SYS(sys_execve , 0)
1465 MIPS_SYS(sys_chdir , 1)
1466 MIPS_SYS(sys_time , 1)
1467 MIPS_SYS(sys_mknod , 3)
1468 MIPS_SYS(sys_chmod , 2) /* 4015 */
1469 MIPS_SYS(sys_lchown , 3)
1470 MIPS_SYS(sys_ni_syscall , 0)
1471 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1472 MIPS_SYS(sys_lseek , 3)
1473 MIPS_SYS(sys_getpid , 0) /* 4020 */
1474 MIPS_SYS(sys_mount , 5)
1475 MIPS_SYS(sys_oldumount , 1)
1476 MIPS_SYS(sys_setuid , 1)
1477 MIPS_SYS(sys_getuid , 0)
1478 MIPS_SYS(sys_stime , 1) /* 4025 */
1479 MIPS_SYS(sys_ptrace , 4)
1480 MIPS_SYS(sys_alarm , 1)
1481 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1482 MIPS_SYS(sys_pause , 0)
1483 MIPS_SYS(sys_utime , 2) /* 4030 */
1484 MIPS_SYS(sys_ni_syscall , 0)
1485 MIPS_SYS(sys_ni_syscall , 0)
1486 MIPS_SYS(sys_access , 2)
1487 MIPS_SYS(sys_nice , 1)
1488 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1489 MIPS_SYS(sys_sync , 0)
1490 MIPS_SYS(sys_kill , 2)
1491 MIPS_SYS(sys_rename , 2)
1492 MIPS_SYS(sys_mkdir , 2)
1493 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1494 MIPS_SYS(sys_dup , 1)
1495 MIPS_SYS(sys_pipe , 0)
1496 MIPS_SYS(sys_times , 1)
1497 MIPS_SYS(sys_ni_syscall , 0)
1498 MIPS_SYS(sys_brk , 1) /* 4045 */
1499 MIPS_SYS(sys_setgid , 1)
1500 MIPS_SYS(sys_getgid , 0)
1501 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1502 MIPS_SYS(sys_geteuid , 0)
1503 MIPS_SYS(sys_getegid , 0) /* 4050 */
1504 MIPS_SYS(sys_acct , 0)
1505 MIPS_SYS(sys_umount , 2)
1506 MIPS_SYS(sys_ni_syscall , 0)
1507 MIPS_SYS(sys_ioctl , 3)
1508 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1509 MIPS_SYS(sys_ni_syscall , 2)
1510 MIPS_SYS(sys_setpgid , 2)
1511 MIPS_SYS(sys_ni_syscall , 0)
1512 MIPS_SYS(sys_olduname , 1)
1513 MIPS_SYS(sys_umask , 1) /* 4060 */
1514 MIPS_SYS(sys_chroot , 1)
1515 MIPS_SYS(sys_ustat , 2)
1516 MIPS_SYS(sys_dup2 , 2)
1517 MIPS_SYS(sys_getppid , 0)
1518 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1519 MIPS_SYS(sys_setsid , 0)
1520 MIPS_SYS(sys_sigaction , 3)
1521 MIPS_SYS(sys_sgetmask , 0)
1522 MIPS_SYS(sys_ssetmask , 1)
1523 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1524 MIPS_SYS(sys_setregid , 2)
1525 MIPS_SYS(sys_sigsuspend , 0)
1526 MIPS_SYS(sys_sigpending , 1)
1527 MIPS_SYS(sys_sethostname , 2)
1528 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1529 MIPS_SYS(sys_getrlimit , 2)
1530 MIPS_SYS(sys_getrusage , 2)
1531 MIPS_SYS(sys_gettimeofday, 2)
1532 MIPS_SYS(sys_settimeofday, 2)
1533 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1534 MIPS_SYS(sys_setgroups , 2)
1535 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1536 MIPS_SYS(sys_symlink , 2)
1537 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1538 MIPS_SYS(sys_readlink , 3) /* 4085 */
1539 MIPS_SYS(sys_uselib , 1)
1540 MIPS_SYS(sys_swapon , 2)
1541 MIPS_SYS(sys_reboot , 3)
1542 MIPS_SYS(old_readdir , 3)
1543 MIPS_SYS(old_mmap , 6) /* 4090 */
1544 MIPS_SYS(sys_munmap , 2)
1545 MIPS_SYS(sys_truncate , 2)
1546 MIPS_SYS(sys_ftruncate , 2)
1547 MIPS_SYS(sys_fchmod , 2)
1548 MIPS_SYS(sys_fchown , 3) /* 4095 */
1549 MIPS_SYS(sys_getpriority , 2)
1550 MIPS_SYS(sys_setpriority , 3)
1551 MIPS_SYS(sys_ni_syscall , 0)
1552 MIPS_SYS(sys_statfs , 2)
1553 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1554 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1555 MIPS_SYS(sys_socketcall , 2)
1556 MIPS_SYS(sys_syslog , 3)
1557 MIPS_SYS(sys_setitimer , 3)
1558 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1559 MIPS_SYS(sys_newstat , 2)
1560 MIPS_SYS(sys_newlstat , 2)
1561 MIPS_SYS(sys_newfstat , 2)
1562 MIPS_SYS(sys_uname , 1)
1563 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1564 MIPS_SYS(sys_vhangup , 0)
1565 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1566 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1567 MIPS_SYS(sys_wait4 , 4)
1568 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1569 MIPS_SYS(sys_sysinfo , 1)
1570 MIPS_SYS(sys_ipc , 6)
1571 MIPS_SYS(sys_fsync , 1)
1572 MIPS_SYS(sys_sigreturn , 0)
1573 MIPS_SYS(sys_clone , 0) /* 4120 */
1574 MIPS_SYS(sys_setdomainname, 2)
1575 MIPS_SYS(sys_newuname , 1)
1576 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1577 MIPS_SYS(sys_adjtimex , 1)
1578 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1579 MIPS_SYS(sys_sigprocmask , 3)
1580 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1581 MIPS_SYS(sys_init_module , 5)
1582 MIPS_SYS(sys_delete_module, 1)
1583 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1584 MIPS_SYS(sys_quotactl , 0)
1585 MIPS_SYS(sys_getpgid , 1)
1586 MIPS_SYS(sys_fchdir , 1)
1587 MIPS_SYS(sys_bdflush , 2)
1588 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1589 MIPS_SYS(sys_personality , 1)
1590 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1591 MIPS_SYS(sys_setfsuid , 1)
1592 MIPS_SYS(sys_setfsgid , 1)
1593 MIPS_SYS(sys_llseek , 5) /* 4140 */
1594 MIPS_SYS(sys_getdents , 3)
1595 MIPS_SYS(sys_select , 5)
1596 MIPS_SYS(sys_flock , 2)
1597 MIPS_SYS(sys_msync , 3)
1598 MIPS_SYS(sys_readv , 3) /* 4145 */
1599 MIPS_SYS(sys_writev , 3)
1600 MIPS_SYS(sys_cacheflush , 3)
1601 MIPS_SYS(sys_cachectl , 3)
1602 MIPS_SYS(sys_sysmips , 4)
1603 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1604 MIPS_SYS(sys_getsid , 1)
1605 MIPS_SYS(sys_fdatasync , 0)
1606 MIPS_SYS(sys_sysctl , 1)
1607 MIPS_SYS(sys_mlock , 2)
1608 MIPS_SYS(sys_munlock , 2) /* 4155 */
1609 MIPS_SYS(sys_mlockall , 1)
1610 MIPS_SYS(sys_munlockall , 0)
1611 MIPS_SYS(sys_sched_setparam, 2)
1612 MIPS_SYS(sys_sched_getparam, 2)
1613 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1614 MIPS_SYS(sys_sched_getscheduler, 1)
1615 MIPS_SYS(sys_sched_yield , 0)
1616 MIPS_SYS(sys_sched_get_priority_max, 1)
1617 MIPS_SYS(sys_sched_get_priority_min, 1)
1618 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1619 MIPS_SYS(sys_nanosleep, 2)
1620 MIPS_SYS(sys_mremap , 4)
1621 MIPS_SYS(sys_accept , 3)
1622 MIPS_SYS(sys_bind , 3)
1623 MIPS_SYS(sys_connect , 3) /* 4170 */
1624 MIPS_SYS(sys_getpeername , 3)
1625 MIPS_SYS(sys_getsockname , 3)
1626 MIPS_SYS(sys_getsockopt , 5)
1627 MIPS_SYS(sys_listen , 2)
1628 MIPS_SYS(sys_recv , 4) /* 4175 */
1629 MIPS_SYS(sys_recvfrom , 6)
1630 MIPS_SYS(sys_recvmsg , 3)
1631 MIPS_SYS(sys_send , 4)
1632 MIPS_SYS(sys_sendmsg , 3)
1633 MIPS_SYS(sys_sendto , 6) /* 4180 */
1634 MIPS_SYS(sys_setsockopt , 5)
1635 MIPS_SYS(sys_shutdown , 2)
1636 MIPS_SYS(sys_socket , 3)
1637 MIPS_SYS(sys_socketpair , 4)
1638 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1639 MIPS_SYS(sys_getresuid , 3)
1640 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1641 MIPS_SYS(sys_poll , 3)
1642 MIPS_SYS(sys_nfsservctl , 3)
1643 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1644 MIPS_SYS(sys_getresgid , 3)
1645 MIPS_SYS(sys_prctl , 5)
1646 MIPS_SYS(sys_rt_sigreturn, 0)
1647 MIPS_SYS(sys_rt_sigaction, 4)
1648 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1649 MIPS_SYS(sys_rt_sigpending, 2)
1650 MIPS_SYS(sys_rt_sigtimedwait, 4)
1651 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1652 MIPS_SYS(sys_rt_sigsuspend, 0)
1653 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1654 MIPS_SYS(sys_pwrite64 , 6)
1655 MIPS_SYS(sys_chown , 3)
1656 MIPS_SYS(sys_getcwd , 2)
1657 MIPS_SYS(sys_capget , 2)
1658 MIPS_SYS(sys_capset , 2) /* 4205 */
1659 MIPS_SYS(sys_sigaltstack , 0)
1660 MIPS_SYS(sys_sendfile , 4)
1661 MIPS_SYS(sys_ni_syscall , 0)
1662 MIPS_SYS(sys_ni_syscall , 0)
1663 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1664 MIPS_SYS(sys_truncate64 , 4)
1665 MIPS_SYS(sys_ftruncate64 , 4)
1666 MIPS_SYS(sys_stat64 , 2)
1667 MIPS_SYS(sys_lstat64 , 2)
1668 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1669 MIPS_SYS(sys_pivot_root , 2)
1670 MIPS_SYS(sys_mincore , 3)
1671 MIPS_SYS(sys_madvise , 3)
1672 MIPS_SYS(sys_getdents64 , 3)
1673 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1674 MIPS_SYS(sys_ni_syscall , 0)
1675 MIPS_SYS(sys_gettid , 0)
1676 MIPS_SYS(sys_readahead , 5)
1677 MIPS_SYS(sys_setxattr , 5)
1678 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1679 MIPS_SYS(sys_fsetxattr , 5)
1680 MIPS_SYS(sys_getxattr , 4)
1681 MIPS_SYS(sys_lgetxattr , 4)
1682 MIPS_SYS(sys_fgetxattr , 4)
1683 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1684 MIPS_SYS(sys_llistxattr , 3)
1685 MIPS_SYS(sys_flistxattr , 3)
1686 MIPS_SYS(sys_removexattr , 2)
1687 MIPS_SYS(sys_lremovexattr, 2)
1688 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1689 MIPS_SYS(sys_tkill , 2)
1690 MIPS_SYS(sys_sendfile64 , 5)
1691 MIPS_SYS(sys_futex , 2)
1692 MIPS_SYS(sys_sched_setaffinity, 3)
1693 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1694 MIPS_SYS(sys_io_setup , 2)
1695 MIPS_SYS(sys_io_destroy , 1)
1696 MIPS_SYS(sys_io_getevents, 5)
1697 MIPS_SYS(sys_io_submit , 3)
1698 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1699 MIPS_SYS(sys_exit_group , 1)
1700 MIPS_SYS(sys_lookup_dcookie, 3)
1701 MIPS_SYS(sys_epoll_create, 1)
1702 MIPS_SYS(sys_epoll_ctl , 4)
1703 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1704 MIPS_SYS(sys_remap_file_pages, 5)
1705 MIPS_SYS(sys_set_tid_address, 1)
1706 MIPS_SYS(sys_restart_syscall, 0)
1707 MIPS_SYS(sys_fadvise64_64, 7)
1708 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1709 MIPS_SYS(sys_fstatfs64 , 2)
1710 MIPS_SYS(sys_timer_create, 3)
1711 MIPS_SYS(sys_timer_settime, 4)
1712 MIPS_SYS(sys_timer_gettime, 2)
1713 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1714 MIPS_SYS(sys_timer_delete, 1)
1715 MIPS_SYS(sys_clock_settime, 2)
1716 MIPS_SYS(sys_clock_gettime, 2)
1717 MIPS_SYS(sys_clock_getres, 2)
1718 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1719 MIPS_SYS(sys_tgkill , 3)
1720 MIPS_SYS(sys_utimes , 2)
1721 MIPS_SYS(sys_mbind , 4)
1722 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1723 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1724 MIPS_SYS(sys_mq_open , 4)
1725 MIPS_SYS(sys_mq_unlink , 1)
1726 MIPS_SYS(sys_mq_timedsend, 5)
1727 MIPS_SYS(sys_mq_timedreceive, 5)
1728 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1729 MIPS_SYS(sys_mq_getsetattr, 3)
1730 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1731 MIPS_SYS(sys_waitid , 4)
1732 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1733 MIPS_SYS(sys_add_key , 5)
1734 MIPS_SYS(sys_request_key, 4)
1735 MIPS_SYS(sys_keyctl , 5)
1736 MIPS_SYS(sys_set_thread_area, 1)
1737 MIPS_SYS(sys_inotify_init, 0)
1738 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1739 MIPS_SYS(sys_inotify_rm_watch, 2)
1740 MIPS_SYS(sys_migrate_pages, 4)
1741 MIPS_SYS(sys_openat, 4)
1742 MIPS_SYS(sys_mkdirat, 3)
1743 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1744 MIPS_SYS(sys_fchownat, 5)
1745 MIPS_SYS(sys_futimesat, 3)
1746 MIPS_SYS(sys_fstatat64, 4)
1747 MIPS_SYS(sys_unlinkat, 3)
1748 MIPS_SYS(sys_renameat, 4) /* 4295 */
1749 MIPS_SYS(sys_linkat, 5)
1750 MIPS_SYS(sys_symlinkat, 3)
1751 MIPS_SYS(sys_readlinkat, 4)
1752 MIPS_SYS(sys_fchmodat, 3)
1753 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1754 MIPS_SYS(sys_pselect6, 6)
1755 MIPS_SYS(sys_ppoll, 5)
1756 MIPS_SYS(sys_unshare, 1)
1757 MIPS_SYS(sys_splice, 4)
1758 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1759 MIPS_SYS(sys_tee, 4)
1760 MIPS_SYS(sys_vmsplice, 4)
1761 MIPS_SYS(sys_move_pages, 6)
1762 MIPS_SYS(sys_set_robust_list, 2)
1763 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1764 MIPS_SYS(sys_kexec_load, 4)
1765 MIPS_SYS(sys_getcpu, 3)
1766 MIPS_SYS(sys_epoll_pwait, 6)
1767 MIPS_SYS(sys_ioprio_set, 3)
1768 MIPS_SYS(sys_ioprio_get, 2)
1769 };
1770
1771 #undef MIPS_SYS
1772
1773 void cpu_loop(CPUMIPSState *env)
1774 {
1775 target_siginfo_t info;
1776 int trapnr, ret;
1777 unsigned int syscall_num;
1778
1779 for(;;) {
1780 trapnr = cpu_mips_exec(env);
1781 switch(trapnr) {
1782 case EXCP_SYSCALL:
1783 syscall_num = env->active_tc.gpr[2] - 4000;
1784 env->active_tc.PC += 4;
1785 if (syscall_num >= sizeof(mips_syscall_args)) {
1786 ret = -ENOSYS;
1787 } else {
1788 int nb_args;
1789 abi_ulong sp_reg;
1790 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1791
1792 nb_args = mips_syscall_args[syscall_num];
1793 sp_reg = env->active_tc.gpr[29];
1794 switch (nb_args) {
1795 /* these arguments are taken from the stack */
1796 /* FIXME - what to do if get_user() fails? */
1797 case 8: get_user_ual(arg8, sp_reg + 28);
1798 case 7: get_user_ual(arg7, sp_reg + 24);
1799 case 6: get_user_ual(arg6, sp_reg + 20);
1800 case 5: get_user_ual(arg5, sp_reg + 16);
1801 default:
1802 break;
1803 }
1804 ret = do_syscall(env, env->active_tc.gpr[2],
1805 env->active_tc.gpr[4],
1806 env->active_tc.gpr[5],
1807 env->active_tc.gpr[6],
1808 env->active_tc.gpr[7],
1809 arg5, arg6/*, arg7, arg8*/);
1810 }
1811 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1812 env->active_tc.gpr[7] = 1; /* error flag */
1813 ret = -ret;
1814 } else {
1815 env->active_tc.gpr[7] = 0; /* error flag */
1816 }
1817 env->active_tc.gpr[2] = ret;
1818 break;
1819 case EXCP_TLBL:
1820 case EXCP_TLBS:
1821 case EXCP_CpU:
1822 case EXCP_RI:
1823 info.si_signo = TARGET_SIGILL;
1824 info.si_errno = 0;
1825 info.si_code = 0;
1826 queue_signal(env, info.si_signo, &info);
1827 break;
1828 case EXCP_INTERRUPT:
1829 /* just indicate that signals should be handled asap */
1830 break;
1831 case EXCP_DEBUG:
1832 {
1833 int sig;
1834
1835 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1836 if (sig)
1837 {
1838 info.si_signo = sig;
1839 info.si_errno = 0;
1840 info.si_code = TARGET_TRAP_BRKPT;
1841 queue_signal(env, info.si_signo, &info);
1842 }
1843 }
1844 break;
1845 default:
1846 // error:
1847 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1848 trapnr);
1849 cpu_dump_state(env, stderr, fprintf, 0);
1850 abort();
1851 }
1852 process_pending_signals(env);
1853 }
1854 }
1855 #endif
1856
1857 #ifdef TARGET_SH4
1858 void cpu_loop (CPUState *env)
1859 {
1860 int trapnr, ret;
1861 target_siginfo_t info;
1862
1863 while (1) {
1864 trapnr = cpu_sh4_exec (env);
1865
1866 switch (trapnr) {
1867 case 0x160:
1868 ret = do_syscall(env,
1869 env->gregs[3],
1870 env->gregs[4],
1871 env->gregs[5],
1872 env->gregs[6],
1873 env->gregs[7],
1874 env->gregs[0],
1875 env->gregs[1]);
1876 env->gregs[0] = ret;
1877 env->pc += 2;
1878 break;
1879 case EXCP_INTERRUPT:
1880 /* just indicate that signals should be handled asap */
1881 break;
1882 case EXCP_DEBUG:
1883 {
1884 int sig;
1885
1886 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1887 if (sig)
1888 {
1889 info.si_signo = sig;
1890 info.si_errno = 0;
1891 info.si_code = TARGET_TRAP_BRKPT;
1892 queue_signal(env, info.si_signo, &info);
1893 }
1894 }
1895 break;
1896 case 0xa0:
1897 case 0xc0:
1898 info.si_signo = SIGSEGV;
1899 info.si_errno = 0;
1900 info.si_code = TARGET_SEGV_MAPERR;
1901 info._sifields._sigfault._addr = env->tea;
1902 queue_signal(env, info.si_signo, &info);
1903 break;
1904
1905 default:
1906 printf ("Unhandled trap: 0x%x\n", trapnr);
1907 cpu_dump_state(env, stderr, fprintf, 0);
1908 exit (1);
1909 }
1910 process_pending_signals (env);
1911 }
1912 }
1913 #endif
1914
1915 #ifdef TARGET_CRIS
1916 void cpu_loop (CPUState *env)
1917 {
1918 int trapnr, ret;
1919 target_siginfo_t info;
1920
1921 while (1) {
1922 trapnr = cpu_cris_exec (env);
1923 switch (trapnr) {
1924 case 0xaa:
1925 {
1926 info.si_signo = SIGSEGV;
1927 info.si_errno = 0;
1928 /* XXX: check env->error_code */
1929 info.si_code = TARGET_SEGV_MAPERR;
1930 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1931 queue_signal(env, info.si_signo, &info);
1932 }
1933 break;
1934 case EXCP_INTERRUPT:
1935 /* just indicate that signals should be handled asap */
1936 break;
1937 case EXCP_BREAK:
1938 ret = do_syscall(env,
1939 env->regs[9],
1940 env->regs[10],
1941 env->regs[11],
1942 env->regs[12],
1943 env->regs[13],
1944 env->pregs[7],
1945 env->pregs[11]);
1946 env->regs[10] = ret;
1947 env->pc += 2;
1948 break;
1949 case EXCP_DEBUG:
1950 {
1951 int sig;
1952
1953 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1954 if (sig)
1955 {
1956 info.si_signo = sig;
1957 info.si_errno = 0;
1958 info.si_code = TARGET_TRAP_BRKPT;
1959 queue_signal(env, info.si_signo, &info);
1960 }
1961 }
1962 break;
1963 default:
1964 printf ("Unhandled trap: 0x%x\n", trapnr);
1965 cpu_dump_state(env, stderr, fprintf, 0);
1966 exit (1);
1967 }
1968 process_pending_signals (env);
1969 }
1970 }
1971 #endif
1972
1973 #ifdef TARGET_M68K
1974
1975 void cpu_loop(CPUM68KState *env)
1976 {
1977 int trapnr;
1978 unsigned int n;
1979 target_siginfo_t info;
1980 TaskState *ts = env->opaque;
1981
1982 for(;;) {
1983 trapnr = cpu_m68k_exec(env);
1984 switch(trapnr) {
1985 case EXCP_ILLEGAL:
1986 {
1987 if (ts->sim_syscalls) {
1988 uint16_t nr;
1989 nr = lduw(env->pc + 2);
1990 env->pc += 4;
1991 do_m68k_simcall(env, nr);
1992 } else {
1993 goto do_sigill;
1994 }
1995 }
1996 break;
1997 case EXCP_HALT_INSN:
1998 /* Semihosing syscall. */
1999 env->pc += 4;
2000 do_m68k_semihosting(env, env->dregs[0]);
2001 break;
2002 case EXCP_LINEA:
2003 case EXCP_LINEF:
2004 case EXCP_UNSUPPORTED:
2005 do_sigill:
2006 info.si_signo = SIGILL;
2007 info.si_errno = 0;
2008 info.si_code = TARGET_ILL_ILLOPN;
2009 info._sifields._sigfault._addr = env->pc;
2010 queue_signal(env, info.si_signo, &info);
2011 break;
2012 case EXCP_TRAP0:
2013 {
2014 ts->sim_syscalls = 0;
2015 n = env->dregs[0];
2016 env->pc += 2;
2017 env->dregs[0] = do_syscall(env,
2018 n,
2019 env->dregs[1],
2020 env->dregs[2],
2021 env->dregs[3],
2022 env->dregs[4],
2023 env->dregs[5],
2024 env->aregs[0]);
2025 }
2026 break;
2027 case EXCP_INTERRUPT:
2028 /* just indicate that signals should be handled asap */
2029 break;
2030 case EXCP_ACCESS:
2031 {
2032 info.si_signo = SIGSEGV;
2033 info.si_errno = 0;
2034 /* XXX: check env->error_code */
2035 info.si_code = TARGET_SEGV_MAPERR;
2036 info._sifields._sigfault._addr = env->mmu.ar;
2037 queue_signal(env, info.si_signo, &info);
2038 }
2039 break;
2040 case EXCP_DEBUG:
2041 {
2042 int sig;
2043
2044 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2045 if (sig)
2046 {
2047 info.si_signo = sig;
2048 info.si_errno = 0;
2049 info.si_code = TARGET_TRAP_BRKPT;
2050 queue_signal(env, info.si_signo, &info);
2051 }
2052 }
2053 break;
2054 default:
2055 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2056 trapnr);
2057 cpu_dump_state(env, stderr, fprintf, 0);
2058 abort();
2059 }
2060 process_pending_signals(env);
2061 }
2062 }
2063 #endif /* TARGET_M68K */
2064
2065 #ifdef TARGET_ALPHA
2066 void cpu_loop (CPUState *env)
2067 {
2068 int trapnr;
2069 target_siginfo_t info;
2070
2071 while (1) {
2072 trapnr = cpu_alpha_exec (env);
2073
2074 switch (trapnr) {
2075 case EXCP_RESET:
2076 fprintf(stderr, "Reset requested. Exit\n");
2077 exit(1);
2078 break;
2079 case EXCP_MCHK:
2080 fprintf(stderr, "Machine check exception. Exit\n");
2081 exit(1);
2082 break;
2083 case EXCP_ARITH:
2084 fprintf(stderr, "Arithmetic trap.\n");
2085 exit(1);
2086 break;
2087 case EXCP_HW_INTERRUPT:
2088 fprintf(stderr, "External interrupt. Exit\n");
2089 exit(1);
2090 break;
2091 case EXCP_DFAULT:
2092 fprintf(stderr, "MMU data fault\n");
2093 exit(1);
2094 break;
2095 case EXCP_DTB_MISS_PAL:
2096 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2097 exit(1);
2098 break;
2099 case EXCP_ITB_MISS:
2100 fprintf(stderr, "MMU instruction TLB miss\n");
2101 exit(1);
2102 break;
2103 case EXCP_ITB_ACV:
2104 fprintf(stderr, "MMU instruction access violation\n");
2105 exit(1);
2106 break;
2107 case EXCP_DTB_MISS_NATIVE:
2108 fprintf(stderr, "MMU data TLB miss\n");
2109 exit(1);
2110 break;
2111 case EXCP_UNALIGN:
2112 fprintf(stderr, "Unaligned access\n");
2113 exit(1);
2114 break;
2115 case EXCP_OPCDEC:
2116 fprintf(stderr, "Invalid instruction\n");
2117 exit(1);
2118 break;
2119 case EXCP_FEN:
2120 fprintf(stderr, "Floating-point not allowed\n");
2121 exit(1);
2122 break;
2123 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2124 fprintf(stderr, "Call to PALcode\n");
2125 call_pal(env, (trapnr >> 6) | 0x80);
2126 break;
2127 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2128 fprintf(stderr, "Privileged call to PALcode\n");
2129 exit(1);
2130 break;
2131 case EXCP_DEBUG:
2132 {
2133 int sig;
2134
2135 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2136 if (sig)
2137 {
2138 info.si_signo = sig;
2139 info.si_errno = 0;
2140 info.si_code = TARGET_TRAP_BRKPT;
2141 queue_signal(env, info.si_signo, &info);
2142 }
2143 }
2144 break;
2145 default:
2146 printf ("Unhandled trap: 0x%x\n", trapnr);
2147 cpu_dump_state(env, stderr, fprintf, 0);
2148 exit (1);
2149 }
2150 process_pending_signals (env);
2151 }
2152 }
2153 #endif /* TARGET_ALPHA */
2154
2155 void usage(void)
2156 {
2157 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2158 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2159 "Linux CPU emulator (compiled for %s emulation)\n"
2160 "\n"
2161 "Standard options:\n"
2162 "-h print this help\n"
2163 "-g port wait gdb connection to port\n"
2164 "-L path set the elf interpreter prefix (default=%s)\n"
2165 "-s size set the stack size in bytes (default=%ld)\n"
2166 "-cpu model select CPU (-cpu ? for list)\n"
2167 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2168 "\n"
2169 "Debug options:\n"
2170 "-d options activate log (logfile=%s)\n"
2171 "-p pagesize set the host page size to 'pagesize'\n"
2172 "-strace log system calls\n"
2173 "\n"
2174 "Environment variables:\n"
2175 "QEMU_STRACE Print system calls and arguments similar to the\n"
2176 " 'strace' program. Enable by setting to any value.\n"
2177 ,
2178 TARGET_ARCH,
2179 interp_prefix,
2180 x86_stack_size,
2181 DEBUG_LOGFILE);
2182 _exit(1);
2183 }
2184
2185 THREAD CPUState *thread_env;
2186
2187 /* Assumes contents are already zeroed. */
2188 void init_task_state(TaskState *ts)
2189 {
2190 int i;
2191
2192 ts->used = 1;
2193 ts->first_free = ts->sigqueue_table;
2194 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2195 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2196 }
2197 ts->sigqueue_table[i].next = NULL;
2198 }
2199
2200 int main(int argc, char **argv)
2201 {
2202 const char *filename;
2203 const char *cpu_model;
2204 struct target_pt_regs regs1, *regs = &regs1;
2205 struct image_info info1, *info = &info1;
2206 TaskState ts1, *ts = &ts1;
2207 CPUState *env;
2208 int optind;
2209 const char *r;
2210 int gdbstub_port = 0;
2211 int drop_ld_preload = 0, environ_count = 0;
2212 char **target_environ, **wrk, **dst;
2213
2214 if (argc <= 1)
2215 usage();
2216
2217 /* init debug */
2218 cpu_set_log_filename(DEBUG_LOGFILE);
2219
2220 cpu_model = NULL;
2221 optind = 1;
2222 for(;;) {
2223 if (optind >= argc)
2224 break;
2225 r = argv[optind];
2226 if (r[0] != '-')
2227 break;
2228 optind++;
2229 r++;
2230 if (!strcmp(r, "-")) {
2231 break;
2232 } else if (!strcmp(r, "d")) {
2233 int mask;
2234 CPULogItem *item;
2235
2236 if (optind >= argc)
2237 break;
2238
2239 r = argv[optind++];
2240 mask = cpu_str_to_log_mask(r);
2241 if (!mask) {
2242 printf("Log items (comma separated):\n");
2243 for(item = cpu_log_items; item->mask != 0; item++) {
2244 printf("%-10s %s\n", item->name, item->help);
2245 }
2246 exit(1);
2247 }
2248 cpu_set_log(mask);
2249 } else if (!strcmp(r, "s")) {
2250 r = argv[optind++];
2251 x86_stack_size = strtol(r, (char **)&r, 0);
2252 if (x86_stack_size <= 0)
2253 usage();
2254 if (*r == 'M')
2255 x86_stack_size *= 1024 * 1024;
2256 else if (*r == 'k' || *r == 'K')
2257 x86_stack_size *= 1024;
2258 } else if (!strcmp(r, "L")) {
2259 interp_prefix = argv[optind++];
2260 } else if (!strcmp(r, "p")) {
2261 qemu_host_page_size = atoi(argv[optind++]);
2262 if (qemu_host_page_size == 0 ||
2263 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2264 fprintf(stderr, "page size must be a power of two\n");
2265 exit(1);
2266 }
2267 } else if (!strcmp(r, "g")) {
2268 gdbstub_port = atoi(argv[optind++]);
2269 } else if (!strcmp(r, "r")) {
2270 qemu_uname_release = argv[optind++];
2271 } else if (!strcmp(r, "cpu")) {
2272 cpu_model = argv[optind++];
2273 if (strcmp(cpu_model, "?") == 0) {
2274 /* XXX: implement xxx_cpu_list for targets that still miss it */
2275 #if defined(cpu_list)
2276 cpu_list(stdout, &fprintf);
2277 #endif
2278 _exit(1);
2279 }
2280 } else if (!strcmp(r, "drop-ld-preload")) {
2281 drop_ld_preload = 1;
2282 } else if (!strcmp(r, "strace")) {
2283 do_strace = 1;
2284 } else
2285 {
2286 usage();
2287 }
2288 }
2289 if (optind >= argc)
2290 usage();
2291 filename = argv[optind];
2292
2293 /* Zero out regs */
2294 memset(regs, 0, sizeof(struct target_pt_regs));
2295
2296 /* Zero out image_info */
2297 memset(info, 0, sizeof(struct image_info));
2298
2299 /* Scan interp_prefix dir for replacement files. */
2300 init_paths(interp_prefix);
2301
2302 if (cpu_model == NULL) {
2303 #if defined(TARGET_I386)
2304 #ifdef TARGET_X86_64
2305 cpu_model = "qemu64";
2306 #else
2307 cpu_model = "qemu32";
2308 #endif
2309 #elif defined(TARGET_ARM)
2310 cpu_model = "arm926";
2311 #elif defined(TARGET_M68K)
2312 cpu_model = "any";
2313 #elif defined(TARGET_SPARC)
2314 #ifdef TARGET_SPARC64
2315 cpu_model = "TI UltraSparc II";
2316 #else
2317 cpu_model = "Fujitsu MB86904";
2318 #endif
2319 #elif defined(TARGET_MIPS)
2320 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2321 cpu_model = "20Kc";
2322 #else
2323 cpu_model = "24Kf";
2324 #endif
2325 #elif defined(TARGET_PPC)
2326 #ifdef TARGET_PPC64
2327 cpu_model = "970";
2328 #else
2329 cpu_model = "750";
2330 #endif
2331 #else
2332 cpu_model = "any";
2333 #endif
2334 }
2335 cpu_exec_init_all(0);
2336 /* NOTE: we need to init the CPU at this stage to get
2337 qemu_host_page_size */
2338 env = cpu_init(cpu_model);
2339 if (!env) {
2340 fprintf(stderr, "Unable to find CPU definition\n");
2341 exit(1);
2342 }
2343 thread_env = env;
2344
2345 if (getenv("QEMU_STRACE")) {
2346 do_strace = 1;
2347 }
2348
2349 wrk = environ;
2350 while (*(wrk++))
2351 environ_count++;
2352
2353 target_environ = malloc((environ_count + 1) * sizeof(char *));
2354 if (!target_environ)
2355 abort();
2356 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2357 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2358 continue;
2359 *(dst++) = strdup(*wrk);
2360 }
2361 *dst = NULL; /* NULL terminate target_environ */
2362
2363 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2364 printf("Error loading %s\n", filename);
2365 _exit(1);
2366 }
2367
2368 for (wrk = target_environ; *wrk; wrk++) {
2369 free(*wrk);
2370 }
2371
2372 free(target_environ);
2373
2374 if (loglevel) {
2375 page_dump(logfile);
2376
2377 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2378 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2379 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2380 info->start_code);
2381 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2382 info->start_data);
2383 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2384 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2385 info->start_stack);
2386 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2387 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2388 }
2389
2390 target_set_brk(info->brk);
2391 syscall_init();
2392 signal_init();
2393
2394 /* build Task State */
2395 memset(ts, 0, sizeof(TaskState));
2396 init_task_state(ts);
2397 ts->info = info;
2398 env->opaque = ts;
2399 env->user_mode_only = 1;
2400
2401 #if defined(TARGET_I386)
2402 cpu_x86_set_cpl(env, 3);
2403
2404 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2405 env->hflags |= HF_PE_MASK;
2406 if (env->cpuid_features & CPUID_SSE) {
2407 env->cr[4] |= CR4_OSFXSR_MASK;
2408 env->hflags |= HF_OSFXSR_MASK;
2409 }
2410 #ifndef TARGET_ABI32
2411 /* enable 64 bit mode if possible */
2412 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2413 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2414 exit(1);
2415 }
2416 env->cr[4] |= CR4_PAE_MASK;
2417 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2418 env->hflags |= HF_LMA_MASK;
2419 #endif
2420
2421 /* flags setup : we activate the IRQs by default as in user mode */
2422 env->eflags |= IF_MASK;
2423
2424 /* linux register setup */
2425 #ifndef TARGET_ABI32
2426 env->regs[R_EAX] = regs->rax;
2427 env->regs[R_EBX] = regs->rbx;
2428 env->regs[R_ECX] = regs->rcx;
2429 env->regs[R_EDX] = regs->rdx;
2430 env->regs[R_ESI] = regs->rsi;
2431 env->regs[R_EDI] = regs->rdi;
2432 env->regs[R_EBP] = regs->rbp;
2433 env->regs[R_ESP] = regs->rsp;
2434 env->eip = regs->rip;
2435 #else
2436 env->regs[R_EAX] = regs->eax;
2437 env->regs[R_EBX] = regs->ebx;
2438 env->regs[R_ECX] = regs->ecx;
2439 env->regs[R_EDX] = regs->edx;
2440 env->regs[R_ESI] = regs->esi;
2441 env->regs[R_EDI] = regs->edi;
2442 env->regs[R_EBP] = regs->ebp;
2443 env->regs[R_ESP] = regs->esp;
2444 env->eip = regs->eip;
2445 #endif
2446
2447 /* linux interrupt setup */
2448 env->idt.base = h2g(idt_table);
2449 env->idt.limit = sizeof(idt_table) - 1;
2450 set_idt(0, 0);
2451 set_idt(1, 0);
2452 set_idt(2, 0);
2453 set_idt(3, 3);
2454 set_idt(4, 3);
2455 set_idt(5, 0);
2456 set_idt(6, 0);
2457 set_idt(7, 0);
2458 set_idt(8, 0);
2459 set_idt(9, 0);
2460 set_idt(10, 0);
2461 set_idt(11, 0);
2462 set_idt(12, 0);
2463 set_idt(13, 0);
2464 set_idt(14, 0);
2465 set_idt(15, 0);
2466 set_idt(16, 0);
2467 set_idt(17, 0);
2468 set_idt(18, 0);
2469 set_idt(19, 0);
2470 set_idt(0x80, 3);
2471
2472 /* linux segment setup */
2473 {
2474 uint64_t *gdt_table;
2475 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2476 env->gdt.base = h2g((unsigned long)gdt_table);
2477 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2478 #ifdef TARGET_ABI32
2479 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2480 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2481 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2482 #else
2483 /* 64 bit code segment */
2484 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2485 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2486 DESC_L_MASK |
2487 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2488 #endif
2489 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2490 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2491 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2492 }
2493 cpu_x86_load_seg(env, R_CS, __USER_CS);
2494 cpu_x86_load_seg(env, R_SS, __USER_DS);
2495 #ifdef TARGET_ABI32
2496 cpu_x86_load_seg(env, R_DS, __USER_DS);
2497 cpu_x86_load_seg(env, R_ES, __USER_DS);
2498 cpu_x86_load_seg(env, R_FS, __USER_DS);
2499 cpu_x86_load_seg(env, R_GS, __USER_DS);
2500 /* This hack makes Wine work... */
2501 env->segs[R_FS].selector = 0;
2502 #else
2503 cpu_x86_load_seg(env, R_DS, 0);
2504 cpu_x86_load_seg(env, R_ES, 0);
2505 cpu_x86_load_seg(env, R_FS, 0);
2506 cpu_x86_load_seg(env, R_GS, 0);
2507 #endif
2508 #elif defined(TARGET_ARM)
2509 {
2510 int i;
2511 cpsr_write(env, regs->uregs[16], 0xffffffff);
2512 for(i = 0; i < 16; i++) {
2513 env->regs[i] = regs->uregs[i];
2514 }
2515 }
2516 #elif defined(TARGET_SPARC)
2517 {
2518 int i;
2519 env->pc = regs->pc;
2520 env->npc = regs->npc;
2521 env->y = regs->y;
2522 for(i = 0; i < 8; i++)
2523 env->gregs[i] = regs->u_regs[i];
2524 for(i = 0; i < 8; i++)
2525 env->regwptr[i] = regs->u_regs[i + 8];
2526 }
2527 #elif defined(TARGET_PPC)
2528 {
2529 int i;
2530
2531 #if defined(TARGET_PPC64)
2532 #if defined(TARGET_ABI32)
2533 env->msr &= ~((target_ulong)1 << MSR_SF);
2534 #else
2535 env->msr |= (target_ulong)1 << MSR_SF;
2536 #endif
2537 #endif
2538 env->nip = regs->nip;
2539 for(i = 0; i < 32; i++) {
2540 env->gpr[i] = regs->gpr[i];
2541 }
2542 }
2543 #elif defined(TARGET_M68K)
2544 {
2545 env->pc = regs->pc;
2546 env->dregs[0] = regs->d0;
2547 env->dregs[1] = regs->d1;
2548 env->dregs[2] = regs->d2;
2549 env->dregs[3] = regs->d3;
2550 env->dregs[4] = regs->d4;
2551 env->dregs[5] = regs->d5;
2552 env->dregs[6] = regs->d6;
2553 env->dregs[7] = regs->d7;
2554 env->aregs[0] = regs->a0;
2555 env->aregs[1] = regs->a1;
2556 env->aregs[2] = regs->a2;
2557 env->aregs[3] = regs->a3;
2558 env->aregs[4] = regs->a4;
2559 env->aregs[5] = regs->a5;
2560 env->aregs[6] = regs->a6;
2561 env->aregs[7] = regs->usp;
2562 env->sr = regs->sr;
2563 ts->sim_syscalls = 1;
2564 }
2565 #elif defined(TARGET_MIPS)
2566 {
2567 int i;
2568
2569 for(i = 0; i < 32; i++) {
2570 env->active_tc.gpr[i] = regs->regs[i];
2571 }
2572 env->active_tc.PC = regs->cp0_epc;
2573 }
2574 #elif defined(TARGET_SH4)
2575 {
2576 int i;
2577
2578 for(i = 0; i < 16; i++) {
2579 env->gregs[i] = regs->regs[i];
2580 }
2581 env->pc = regs->pc;
2582 }
2583 #elif defined(TARGET_ALPHA)
2584 {
2585 int i;
2586
2587 for(i = 0; i < 28; i++) {
2588 env->ir[i] = ((abi_ulong *)regs)[i];
2589 }
2590 env->ipr[IPR_USP] = regs->usp;
2591 env->ir[30] = regs->usp;
2592 env->pc = regs->pc;
2593 env->unique = regs->unique;
2594 }
2595 #elif defined(TARGET_CRIS)
2596 {
2597 env->regs[0] = regs->r0;
2598 env->regs[1] = regs->r1;
2599 env->regs[2] = regs->r2;
2600 env->regs[3] = regs->r3;
2601 env->regs[4] = regs->r4;
2602 env->regs[5] = regs->r5;
2603 env->regs[6] = regs->r6;
2604 env->regs[7] = regs->r7;
2605 env->regs[8] = regs->r8;
2606 env->regs[9] = regs->r9;
2607 env->regs[10] = regs->r10;
2608 env->regs[11] = regs->r11;
2609 env->regs[12] = regs->r12;
2610 env->regs[13] = regs->r13;
2611 env->regs[14] = info->start_stack;
2612 env->regs[15] = regs->acr;
2613 env->pc = regs->erp;
2614 }
2615 #else
2616 #error unsupported target CPU
2617 #endif
2618
2619 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2620 ts->stack_base = info->start_stack;
2621 ts->heap_base = info->brk;
2622 /* This will be filled in on the first SYS_HEAPINFO call. */
2623 ts->heap_limit = 0;
2624 #endif
2625
2626 if (gdbstub_port) {
2627 gdbserver_start (gdbstub_port);
2628 gdb_handlesig(env, 0);
2629 }
2630 cpu_loop(env);
2631 /* never exits */
2632 return 0;
2633 }
Patches shipped by Fedora