hw/pl050.c

   1 /*
   2  * Arm PrimeCell PL050 Keyboard / Mouse Interface
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licenced under the GPL.
   8  */
   9
  10 #include "hw.h"
  11 #include "primecell.h"
  12 #include "ps2.h"
  13
  14 typedef struct {
  15     void *dev;
  16     uint32_t base;
  17     uint32_t cr;
  18     uint32_t clk;
  19     uint32_t last;
  20     int pending;
  21     qemu_irq irq;
  22     int is_mouse;
  23 } pl050_state;
  24
  25 #define PL050_TXEMPTY         (1 << 6)
  26 #define PL050_TXBUSY          (1 << 5)
  27 #define PL050_RXFULL          (1 << 4)
  28 #define PL050_RXBUSY          (1 << 3)
  29 #define PL050_RXPARITY        (1 << 2)
  30 #define PL050_KMIC            (1 << 1)
  31 #define PL050_KMID            (1 << 0)
  32
  33 static const unsigned char pl050_id[] =
  34 { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  35
  36 static void pl050_update(void *opaque, int level)
  37 {
  38     pl050_state *s = (pl050_state *)opaque;
  39     int raise;
  40
  41     s->pending = level;
  42     raise = (s->pending && (s->cr & 0x10) != 0)
  43             || (s->cr & 0x08) != 0;
  44     qemu_set_irq(s->irq, raise);
  45 }
  46
  47 static uint32_t pl050_read(void *opaque, target_phys_addr_t offset)
  48 {
  49     pl050_state *s = (pl050_state *)opaque;
  50     offset -= s->base;
  51     if (offset >= 0xfe0 && offset < 0x1000)
  52         return pl050_id[(offset - 0xfe0) >> 2];
  53
  54     switch (offset >> 2) {
  55     case 0: /* KMICR */
  56         return s->cr;
  57     case 1: /* KMISTAT */
  58         {
  59             uint8_t val;
  60             uint32_t stat;
  61
  62             val = s->last;
  63             val = val ^ (val >> 4);
  64             val = val ^ (val >> 2);
  65             val = (val ^ (val >> 1)) & 1;
  66
  67             stat = PL050_TXEMPTY;
  68             if (val)
  69                 stat |= PL050_RXPARITY;
  70             if (s->pending)
  71                 stat |= PL050_RXFULL;
  72
  73             return stat;
  74         }
  75     case 2: /* KMIDATA */
  76         if (s->pending)
  77             s->last = ps2_read_data(s->dev);
  78         return s->last;
  79     case 3: /* KMICLKDIV */
  80         return s->clk;
  81     case 4: /* KMIIR */
  82         return s->pending | 2;
  83     default:
  84         cpu_abort (cpu_single_env, "pl050_read: Bad offset %x\n", (int)offset);
  85         return 0;
  86     }
  87 }
  88
  89 static void pl050_write(void *opaque, target_phys_addr_t offset,
  90                           uint32_t value)
  91 {
  92     pl050_state *s = (pl050_state *)opaque;
  93     offset -= s->base;
  94     switch (offset >> 2) {
  95     case 0: /* KMICR */
  96         s->cr = value;
  97         pl050_update(s, s->pending);
  98         /* ??? Need to implement the enable/disable bit.  */
  99         break;
 100     case 2: /* KMIDATA */
 101         /* ??? This should toggle the TX interrupt line.  */
 102         /* ??? This means kbd/mouse can block each other.  */
 103         if (s->is_mouse) {
 104             ps2_write_mouse(s->dev, value);
 105         } else {
 106             ps2_write_keyboard(s->dev, value);
 107         }
 108         break;
 109     case 3: /* KMICLKDIV */
 110         s->clk = value;
 111         return;
 112     default:
 113         cpu_abort (cpu_single_env, "pl050_write: Bad offset %x\n", (int)offset);
 114     }
 115 }
 116 static CPUReadMemoryFunc *pl050_readfn[] = {
 117    pl050_read,
 118    pl050_read,
 119    pl050_read
 120 };
 121
 122 static CPUWriteMemoryFunc *pl050_writefn[] = {
 123    pl050_write,
 124    pl050_write,
 125    pl050_write
 126 };
 127
 128 void pl050_init(uint32_t base, qemu_irq irq, int is_mouse)
 129 {
 130     int iomemtype;
 131     pl050_state *s;
 132
 133     s = (pl050_state *)qemu_mallocz(sizeof(pl050_state));
 134     iomemtype = cpu_register_io_memory(0, pl050_readfn,
 135                                        pl050_writefn, s);
 136     cpu_register_physical_memory(base, 0x00001000, iomemtype);
 137     s->base = base;
 138     s->irq = irq;
 139     s->is_mouse = is_mouse;
 140     if (is_mouse)
 141         s->dev = ps2_mouse_init(pl050_update, s);
 142     else
 143         s->dev = ps2_kbd_init(pl050_update, s);
 144     /* ??? Save/restore.  */
 145 }
 146