qemu-kvm-powerpc.c

   1 /*
   2  * qemu-kvm-power.c
   3  *
   4  * Add KVM PowerPC specific calls for qemu.
   5  *
   6  * Copyright 2007 IBM Corporation.
   7  * Added by & Authors:
   8  *      Jerone Young <jyoung5@us.ibm.com>
   9  *      Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  10  *
  11  * This work is licensed under the GNU GPL licence version 2 or later.
  12  *
  13  */
  14
  15 #include "config.h"
  16 #include "config-host.h"
  17
  18 #include <string.h>
  19 #include "hw/hw.h"
  20 #include "sysemu.h"
  21 #include "cpu.h"
  22 #include "exec-all.h"
  23 #include "helper_regs.h"
  24
  25 #include "qemu-kvm.h"
  26 #include <libkvm.h>
  27 #include <pthread.h>
  28 #include <sys/utsname.h>
  29
  30 extern kvm_context_t kvm_context;
  31
  32 void cpu_reset(CPUState *env)
  33 {
  34         memset(env->breakpoints, 0, sizeof(env->breakpoints));
  35         cpu_ppc_reset(env);
  36 }
  37
  38
  39 int kvm_arch_qemu_create_context(void)
  40 {
  41         return 0;
  42 }
  43
  44 void kvm_arch_load_regs(CPUState *env)
  45 {
  46     struct kvm_regs regs;
  47     int rc,i;
  48
  49     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  50     if (rc == -1)
  51         perror("kvm_get_regs FAILED");
  52
  53     /* cr is untouched in qemu and not existant in CPUState fr ppr */
  54     /* hflags is a morphed to MSR on ppc, no need to sync that down to kvm */
  55
  56     regs.pc = env->nip;
  57
  58     regs.ctr = env->ctr;
  59     regs.lr  = env->lr;
  60     regs.xer = ppc_load_xer(env);
  61     regs.msr = env->msr;
  62
  63     regs.srr0 = env->spr[SPR_SRR0];
  64     regs.srr1 = env->spr[SPR_SRR1];
  65
  66     regs.sprg0 = env->spr[SPR_SPRG0];
  67     regs.sprg1 = env->spr[SPR_SPRG1];
  68     regs.sprg2 = env->spr[SPR_SPRG2];
  69     regs.sprg3 = env->spr[SPR_SPRG3];
  70     regs.sprg4 = env->spr[SPR_SPRG4];
  71     regs.sprg5 = env->spr[SPR_SPRG5];
  72     regs.sprg6 = env->spr[SPR_SPRG6];
  73     regs.sprg7 = env->spr[SPR_SPRG7];
  74
  75     for (i = 0;i < 32; i++){
  76         regs.gpr[i] = env->gpr[i];
  77     }
  78
  79     rc = kvm_set_regs(kvm_context, env->cpu_index, &regs);
  80     if (rc == -1)
  81         perror("kvm_set_regs FAILED");
  82 }
  83
  84
  85 void kvm_arch_save_regs(CPUState *env)
  86 {
  87     struct kvm_regs regs;
  88     uint32_t i, rc;
  89
  90     rc = kvm_get_regs(kvm_context, env->cpu_index, &regs);
  91     if (rc == -1)
  92         perror("kvm_get_regs FAILED");
  93
  94     env->ctr =regs.ctr;
  95     env->lr = regs.lr;
  96     ppc_store_xer(env,regs.xer);
  97     env->msr = regs.msr;
  98     /* calculate hflags based on the current msr using the ppc qemu helper */
  99     hreg_compute_hflags(env);
 100
 101     env->nip = regs.pc;
 102
 103     env->spr[SPR_SRR0] = regs.srr0;
 104     env->spr[SPR_SRR1] = regs.srr1;
 105
 106     env->spr[SPR_SPRG0] = regs.sprg0;
 107     env->spr[SPR_SPRG1] = regs.sprg1;
 108     env->spr[SPR_SPRG2] = regs.sprg2;
 109     env->spr[SPR_SPRG3] = regs.sprg3;
 110     env->spr[SPR_SPRG4] = regs.sprg4;
 111     env->spr[SPR_SPRG5] = regs.sprg5;
 112     env->spr[SPR_SPRG6] = regs.sprg6;
 113     env->spr[SPR_SPRG7] = regs.sprg7;
 114
 115     for (i = 0;i < 32; i++){
 116         env->gpr[i] = regs.gpr[i];
 117     }
 118
 119 }
 120
 121 int kvm_arch_qemu_init_env(CPUState *cenv)
 122 {
 123     if (cenv->cpu_index == 0) {
 124         /* load any registers set in env into
 125            kvm  for the first guest vcpu */
 126         kvm_load_registers(cenv);
 127     }
 128
 129     return 0;
 130 }
 131
 132 int kvm_arch_halt(void *opaque, int vcpu)
 133 {
 134     CPUState *env = cpu_single_env;
 135
 136     if (!(env->interrupt_request & CPU_INTERRUPT_HARD)
 137         && (msr_ee))
 138     {
 139             env->halted = 1;
 140             env->exception_index = EXCP_HLT;
 141     }
 142     return 1;
 143 }
 144
 145 void kvm_arch_pre_kvm_run(void *opaque, int vcpu)
 146 {
 147         return;
 148 }
 149
 150 void kvm_arch_post_kvm_run(void *opaque, int vcpu)
 151 {
 152     CPUState *env = qemu_kvm_cpu_env(vcpu);
 153     cpu_single_env = env;
 154 }
 155
 156 int kvm_arch_has_work(CPUState *env)
 157 {
 158     if ((env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXIT)) &&
 159         (msr_ee))
 160         return 1;
 161     return 0;
 162 }
 163
 164 int kvm_arch_try_push_interrupts(void *opaque)
 165 {
 166     CPUState *env = cpu_single_env;
 167     int r;
 168     unsigned irq;
 169
 170     /* PowerPC Qemu tracks the various core input pins (interrupt, critical
 171      * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
 172     if (kvm_is_ready_for_interrupt_injection(kvm_context, env->cpu_index) &&
 173         (env->irq_input_state & (1<<PPC40x_INPUT_INT)))
 174        {
 175             /* For now KVM disregards the 'irq' argument. However, in the
 176              * future KVM could cache it in-kernel to avoid a heavyweight exit
 177              * when reading the UIC.
 178              */
 179             irq = -1U;
 180
 181             r = kvm_inject_irq(kvm_context, env->cpu_index, irq);
 182             if (r < 0)
 183                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
 184     }
 185
 186     /* We don't know if there are more interrupts pending after this. However,
 187      * the guest will return to userspace in the course of handling this one
 188      * anyways, so we will get a chance to deliver the rest. */
 189     return 0;
 190 }
 191
 192 void kvm_arch_update_regs_for_sipi(CPUState *env)
 193 {
 194     printf("%s: no kvm-powerpc multi processor support yet!\n", __func__);
 195 }
 196
 197 /* map dcr access to existing qemu dcr emulation */
 198 int handle_powerpc_dcr_read(int vcpu, uint32_t dcrn, uint32_t *data)
 199 {
 200     CPUState *env = cpu_single_env;
 201     if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0)
 202         fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
 203
 204     return 0; /* XXX ignore failed DCR ops */
 205 }
 206
 207 int handle_powerpc_dcr_write(int vcpu, uint32_t dcrn, uint32_t data)
 208 {
 209     CPUState *env = cpu_single_env;
 210     if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0)
 211         fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
 212
 213     return 0; /* XXX ignore failed DCR ops */
 214 }
 215
 216 void kvm_arch_cpu_reset(CPUState *env)
 217 {
 218 }