2 * Qemu PowerPC 440 board emualtion
4 * Copyright 2007 IBM Corporation.
5 * Authors: Jerone Young <jyoung5@us.ibm.com>
7 * This work is licensed under the GNU GPL license version 2 or later.
16 #define PPC440EP_PCI_CONFIG 0xeec00000
17 #define PPC440EP_PCI_INTACK 0xeed00000
18 #define PPC440EP_PCI_SPECIAL 0xeed00000
19 #define PPC440EP_PCI_REGS 0xef400000
20 #define PPC440EP_PCI_IO 0xe8000000
21 #define PPC440EP_PCI_IOLEN 0x10000
22 #define PPC440EP_PCI_MEM 0xa0000000
23 #define PPC440EP_PCI_MEMLEN 0x20000000
26 void ppc440ep_init(CPUState
*env
,
27 target_phys_addr_t ram_bases
[2],
28 target_phys_addr_t ram_sizes
[2],
39 ppc_dcr_init(env
, NULL
, NULL
);
42 printf("setup mmio\n");
43 mmio
= ppc4xx_mmio_init(env
, 0xEF600000);
45 /* universal controller */
46 printf("setup universal controller\n");
47 irqs
= qemu_mallocz(sizeof(qemu_irq
) * PPCUIC_OUTPUT_NB
);
48 irqs
[PPCUIC_OUTPUT_INT
] =
49 ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_INT
];
50 irqs
[PPCUIC_OUTPUT_CINT
] =
51 ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_CINT
];
52 pic
= ppcuic_init(env
, irqs
, 0x0C0, 0, 1);
55 /* SDRAM controller */
56 printf("trying to setup sdram controller\n");
57 /* XXX 440EP's ECC interrupts are on UIC1 */
58 ppc405_sdram_init(env
, pic
[14], 2, ram_bases
, ram_sizes
, do_init
);
60 for (i
= 0; i
< 2; i
++)
61 offset
+= ram_sizes
[i
];
64 pci
= ppc4xx_pci_init(env
, pic
,
70 printf("couldn't create PCI controller!\n");
73 isa_mmio_init(PPC440EP_PCI_IO
, PPC440EP_PCI_IOLEN
);
75 /* serial ports on page 126 of 440EP user manual */
77 printf("Initializing first serial port\n");
78 ppc405_serial_init(env
, mmio
,0x300, pic
[0], serial_hds
[0]);
81 printf("Initializing 2nd serial port\n");
82 ppc405_serial_init(env
, mmio
,0x400, pic
[1], serial_hds
[1]);