microblaze: Dont segfault when singlestepping first insn.
[qemu/agraf.git] / hw / isa.h
blob655ad62c1d8464ff84d96f651692ce76855d8862
1 #ifndef HW_ISA_H
2 #define HW_ISA_H
4 /* ISA bus */
6 #include "ioport.h"
7 #include "qdev.h"
9 typedef struct ISABus ISABus;
10 typedef struct ISADevice ISADevice;
11 typedef struct ISADeviceInfo ISADeviceInfo;
13 struct ISADevice {
14 DeviceState qdev;
15 uint32_t isairq[2];
16 int nirqs;
19 typedef int (*isa_qdev_initfn)(ISADevice *dev);
20 struct ISADeviceInfo {
21 DeviceInfo qdev;
22 isa_qdev_initfn init;
25 ISABus *isa_bus_new(DeviceState *dev);
26 void isa_bus_irqs(qemu_irq *irqs);
27 qemu_irq isa_reserve_irq(int isairq);
28 void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
29 void isa_qdev_register(ISADeviceInfo *info);
30 ISADevice *isa_create(const char *name);
31 ISADevice *isa_create_simple(const char *name);
33 extern target_phys_addr_t isa_mem_base;
35 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
37 /* dma.c */
38 int DMA_get_channel_mode (int nchan);
39 int DMA_read_memory (int nchan, void *buf, int pos, int size);
40 int DMA_write_memory (int nchan, void *buf, int pos, int size);
41 void DMA_hold_DREQ (int nchan);
42 void DMA_release_DREQ (int nchan);
43 void DMA_schedule(int nchan);
44 void DMA_init (int high_page_enable);
45 void DMA_register_channel (int nchan,
46 DMA_transfer_handler transfer_handler,
47 void *opaque);
48 #endif