hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32
  33 #include "hw/boards.h"
  34 #include "hw/ppc.h"
  35 #include "hw/loader.h"
  36
  37 #include "hw/spapr.h"
  38 #include "hw/spapr_vio.h"
  39 #include "hw/xics.h"
  40
  41 #include "kvm.h"
  42 #include "kvm_ppc.h"
  43
  44 #include <libfdt.h>
  45
  46 #define KERNEL_LOAD_ADDR        0x00000000
  47 #define INITRD_LOAD_ADDR        0x02800000
  48 #define FDT_MAX_SIZE            0x10000
  49 #define RTAS_MAX_SIZE           0x10000
  50 #define FW_MAX_SIZE             0x400000
  51 #define FW_FILE_NAME            "slof.bin"
  52
  53 #define MIN_RAM_SLOF            512UL
  54
  55 #define TIMEBASE_FREQ           512000000ULL
  56
  57 #define MAX_CPUS                256
  58 #define XICS_IRQS               1024
  59
  60 #define PHANDLE_XICP            0x00001111
  61
  62 sPAPREnvironment *spapr;
  63
  64 qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)
  65 {
  66     uint32_t irq;
  67     qemu_irq qirq;
  68
  69     if (hint) {
  70         irq = hint;
  71         /* FIXME: we should probably check for collisions somehow */
  72     } else {
  73         irq = spapr->next_irq++;
  74     }
  75
  76     qirq = xics_find_qirq(spapr->icp, irq);
  77     if (!qirq) {
  78         return NULL;
  79     }
  80
  81     if (irq_num) {
  82         *irq_num = irq;
  83     }
  84
  85     return qirq;
  86 }
  87
  88 static void *spapr_create_fdt_skel(const char *cpu_model,
  89                                    target_phys_addr_t initrd_base,
  90                                    target_phys_addr_t initrd_size,
  91                                    const char *boot_device,
  92                                    const char *kernel_cmdline,
  93                                    long hash_shift)
  94 {
  95     void *fdt;
  96     CPUState *env;
  97     uint64_t mem_reg_property[] = { 0, cpu_to_be64(ram_size) };
  98     uint32_t start_prop = cpu_to_be32(initrd_base);
  99     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 100     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
 101     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 102         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 103     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 104     int i;
 105     char *modelname;
 106
 107 #define _FDT(exp) \
 108     do { \
 109         int ret = (exp);                                           \
 110         if (ret < 0) {                                             \
 111             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 112                     #exp, fdt_strerror(ret));                      \
 113             exit(1);                                               \
 114         }                                                          \
 115     } while (0)
 116
 117     fdt = g_malloc0(FDT_MAX_SIZE);
 118     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 119
 120     _FDT((fdt_finish_reservemap(fdt)));
 121
 122     /* Root node */
 123     _FDT((fdt_begin_node(fdt, "")));
 124     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 125     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 126
 127     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 128     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 129
 130     /* /chosen */
 131     _FDT((fdt_begin_node(fdt, "chosen")));
 132
 133     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 134     _FDT((fdt_property(fdt, "linux,initrd-start",
 135                        &start_prop, sizeof(start_prop))));
 136     _FDT((fdt_property(fdt, "linux,initrd-end",
 137                        &end_prop, sizeof(end_prop))));
 138     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 139
 140     _FDT((fdt_end_node(fdt)));
 141
 142     /* memory node */
 143     _FDT((fdt_begin_node(fdt, "memory@0")));
 144
 145     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 146     _FDT((fdt_property(fdt, "reg",
 147                        mem_reg_property, sizeof(mem_reg_property))));
 148
 149     _FDT((fdt_end_node(fdt)));
 150
 151     /* cpus */
 152     _FDT((fdt_begin_node(fdt, "cpus")));
 153
 154     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 155     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 156
 157     modelname = g_strdup(cpu_model);
 158
 159     for (i = 0; i < strlen(modelname); i++) {
 160         modelname[i] = toupper(modelname[i]);
 161     }
 162
 163     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 164         int index = env->cpu_index;
 165         uint32_t gserver_prop[] = {cpu_to_be32(index), 0}; /* HACK! */
 166         char *nodename;
 167         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 168                            0xffffffff, 0xffffffff};
 169         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 170         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 171
 172         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 173             fprintf(stderr, "Allocation failure\n");
 174             exit(1);
 175         }
 176
 177         _FDT((fdt_begin_node(fdt, nodename)));
 178
 179         free(nodename);
 180
 181         _FDT((fdt_property_cell(fdt, "reg", index)));
 182         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 183
 184         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 185         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 186                                 env->dcache_line_size)));
 187         _FDT((fdt_property_cell(fdt, "icache-block-size",
 188                                 env->icache_line_size)));
 189         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 190         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 191         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 192         _FDT((fdt_property(fdt, "ibm,pft-size",
 193                            pft_size_prop, sizeof(pft_size_prop))));
 194         _FDT((fdt_property_string(fdt, "status", "okay")));
 195         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 196         _FDT((fdt_property_cell(fdt, "ibm,ppc-interrupt-server#s", index)));
 197         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 198                            gserver_prop, sizeof(gserver_prop))));
 199
 200         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 201             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 202                                segs, sizeof(segs))));
 203         }
 204
 205         _FDT((fdt_end_node(fdt)));
 206     }
 207
 208     g_free(modelname);
 209
 210     _FDT((fdt_end_node(fdt)));
 211
 212     /* RTAS */
 213     _FDT((fdt_begin_node(fdt, "rtas")));
 214
 215     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 216                        sizeof(hypertas_prop))));
 217
 218     _FDT((fdt_end_node(fdt)));
 219
 220     /* interrupt controller */
 221     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 222
 223     _FDT((fdt_property_string(fdt, "device_type",
 224                               "PowerPC-External-Interrupt-Presentation")));
 225     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 226     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 227     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 228                        interrupt_server_ranges_prop,
 229                        sizeof(interrupt_server_ranges_prop))));
 230     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 231     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 232     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 233
 234     _FDT((fdt_end_node(fdt)));
 235
 236     /* vdevice */
 237     _FDT((fdt_begin_node(fdt, "vdevice")));
 238
 239     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 240     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 241     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 242     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 243     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 244     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 245
 246     _FDT((fdt_end_node(fdt)));
 247
 248     _FDT((fdt_end_node(fdt))); /* close root node */
 249     _FDT((fdt_finish(fdt)));
 250
 251     return fdt;
 252 }
 253
 254 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 255                                target_phys_addr_t fdt_addr,
 256                                target_phys_addr_t rtas_addr,
 257                                target_phys_addr_t rtas_size)
 258 {
 259     int ret;
 260     void *fdt;
 261
 262     fdt = g_malloc(FDT_MAX_SIZE);
 263
 264     /* open out the base tree into a temp buffer for the final tweaks */
 265     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 266
 267     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 268     if (ret < 0) {
 269         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 270         exit(1);
 271     }
 272
 273     /* RTAS */
 274     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 275     if (ret < 0) {
 276         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 277     }
 278
 279     _FDT((fdt_pack(fdt)));
 280
 281     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 282
 283     g_free(fdt);
 284 }
 285
 286 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 287 {
 288     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 289 }
 290
 291 static void emulate_spapr_hypercall(CPUState *env)
 292 {
 293     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 294 }
 295
 296 static void spapr_reset(void *opaque)
 297 {
 298     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 299
 300     fprintf(stderr, "sPAPR reset\n");
 301
 302     /* flush out the hash table */
 303     memset(spapr->htab, 0, spapr->htab_size);
 304
 305     /* Load the fdt */
 306     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 307                        spapr->rtas_size);
 308
 309     /* Set up the entry state */
 310     first_cpu->gpr[3] = spapr->fdt_addr;
 311     first_cpu->gpr[5] = 0;
 312     first_cpu->halted = 0;
 313     first_cpu->nip = spapr->entry_point;
 314
 315 }
 316
 317 /* pSeries LPAR / sPAPR hardware init */
 318 static void ppc_spapr_init(ram_addr_t ram_size,
 319                            const char *boot_device,
 320                            const char *kernel_filename,
 321                            const char *kernel_cmdline,
 322                            const char *initrd_filename,
 323                            const char *cpu_model)
 324 {
 325     CPUState *env;
 326     int i;
 327     ram_addr_t ram_offset;
 328     uint32_t initrd_base;
 329     long kernel_size, initrd_size, fw_size;
 330     long pteg_shift = 17;
 331     char *filename;
 332
 333     spapr = g_malloc(sizeof(*spapr));
 334     cpu_ppc_hypercall = emulate_spapr_hypercall;
 335
 336     /* We place the device tree just below either the top of RAM, or
 337      * 2GB, so that it can be processed with 32-bit code if
 338      * necessary */
 339     spapr->fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
 340     spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE;
 341
 342     /* init CPUs */
 343     if (cpu_model == NULL) {
 344         cpu_model = "POWER7";
 345     }
 346     for (i = 0; i < smp_cpus; i++) {
 347         env = cpu_init(cpu_model);
 348
 349         if (!env) {
 350             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 351             exit(1);
 352         }
 353         /* Set time-base frequency to 512 MHz */
 354         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 355         qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
 356
 357         env->hreset_vector = 0x60;
 358         env->hreset_excp_prefix = 0;
 359         env->gpr[3] = env->cpu_index;
 360     }
 361
 362     /* allocate RAM */
 363     spapr->ram_limit = ram_size;
 364     ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", spapr->ram_limit);
 365     cpu_register_physical_memory(0, ram_size, ram_offset);
 366
 367     /* allocate hash page table.  For now we always make this 16mb,
 368      * later we should probably make it scale to the size of guest
 369      * RAM */
 370     spapr->htab_size = 1ULL << (pteg_shift + 7);
 371     spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
 372
 373     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 374         env->external_htab = spapr->htab;
 375         env->htab_base = -1;
 376         env->htab_mask = spapr->htab_size - 1;
 377
 378         /* Tell KVM that we're in PAPR mode */
 379         env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 380                              ((pteg_shift + 7) - 18);
 381         env->spr[SPR_HIOR] = 0;
 382
 383         if (kvm_enabled()) {
 384             kvmppc_set_papr(env);
 385         }
 386     }
 387
 388     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 389     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 390                                            ram_size - spapr->rtas_addr);
 391     if (spapr->rtas_size < 0) {
 392         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 393         exit(1);
 394     }
 395     g_free(filename);
 396
 397     /* Set up Interrupt Controller */
 398     spapr->icp = xics_system_init(XICS_IRQS);
 399     spapr->next_irq = 16;
 400
 401     /* Set up VIO bus */
 402     spapr->vio_bus = spapr_vio_bus_init();
 403
 404     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 405         if (serial_hds[i]) {
 406             spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i,
 407                              serial_hds[i]);
 408         }
 409     }
 410
 411     for (i = 0; i < nb_nics; i++) {
 412         NICInfo *nd = &nd_table[i];
 413
 414         if (!nd->model) {
 415             nd->model = g_strdup("ibmveth");
 416         }
 417
 418         if (strcmp(nd->model, "ibmveth") == 0) {
 419             spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
 420         } else {
 421             fprintf(stderr, "pSeries (sPAPR) platform does not support "
 422                     "NIC model '%s' (only ibmveth is supported)\n",
 423                     nd->model);
 424             exit(1);
 425         }
 426     }
 427
 428     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 429         spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
 430     }
 431
 432     if (kernel_filename) {
 433         uint64_t lowaddr = 0;
 434
 435         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 436                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 437         if (kernel_size < 0) {
 438             kernel_size = load_image_targphys(kernel_filename,
 439                                               KERNEL_LOAD_ADDR,
 440                                               ram_size - KERNEL_LOAD_ADDR);
 441         }
 442         if (kernel_size < 0) {
 443             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 444                     kernel_filename);
 445             exit(1);
 446         }
 447
 448         /* load initrd */
 449         if (initrd_filename) {
 450             initrd_base = INITRD_LOAD_ADDR;
 451             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 452                                               ram_size - initrd_base);
 453             if (initrd_size < 0) {
 454                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 455                         initrd_filename);
 456                 exit(1);
 457             }
 458         } else {
 459             initrd_base = 0;
 460             initrd_size = 0;
 461         }
 462
 463         spapr->entry_point = KERNEL_LOAD_ADDR;
 464     } else {
 465         if (ram_size < (MIN_RAM_SLOF << 20)) {
 466             fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 467                     "%ldM guest RAM\n", MIN_RAM_SLOF);
 468             exit(1);
 469         }
 470         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 471         fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 472         if (fw_size < 0) {
 473             hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 474             exit(1);
 475         }
 476         g_free(filename);
 477         spapr->entry_point = 0x100;
 478         initrd_base = 0;
 479         initrd_size = 0;
 480
 481         /* SLOF will startup the secondary CPUs using RTAS,
 482            rather than expecting a kexec() style entry */
 483         for (env = first_cpu; env != NULL; env = env->next_cpu) {
 484             env->halted = 1;
 485         }
 486     }
 487
 488     /* Prepare the device tree */
 489     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
 490                                             initrd_base, initrd_size,
 491                                             boot_device, kernel_cmdline,
 492                                             pteg_shift + 7);
 493     assert(spapr->fdt_skel != NULL);
 494
 495     qemu_register_reset(spapr_reset, spapr);
 496 }
 497
 498 static QEMUMachine spapr_machine = {
 499     .name = "pseries",
 500     .desc = "pSeries Logical Partition (PAPR compliant)",
 501     .init = ppc_spapr_init,
 502     .max_cpus = MAX_CPUS,
 503     .no_vga = 1,
 504     .no_parallel = 1,
 505     .use_scsi = 1,
 506 };
 507
 508 static void spapr_machine_init(void)
 509 {
 510     qemu_register_machine(&spapr_machine);
 511 }
 512
 513 machine_init(spapr_machine_init);