2 * KVM-based ITS implementation for a GICv3-based system
4 * Copyright (c) 2015 Samsung Electronics Co., Ltd.
5 * Written by Pavel Fedin <p.fedin@samsung.com>
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu/module.h"
24 #include "hw/intc/arm_gicv3_its_common.h"
25 #include "hw/qdev-properties.h"
26 #include "sysemu/runstate.h"
27 #include "sysemu/kvm.h"
29 #include "migration/blocker.h"
31 #define TYPE_KVM_ARM_ITS "arm-its-kvm"
32 #define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS)
33 #define KVM_ARM_ITS_CLASS(klass) \
34 OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS)
35 #define KVM_ARM_ITS_GET_CLASS(obj) \
36 OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS)
38 typedef struct KVMARMITSClass
{
39 GICv3ITSCommonClass parent_class
;
40 void (*parent_reset
)(DeviceState
*dev
);
44 static int kvm_its_send_msi(GICv3ITSState
*s
, uint32_t value
, uint16_t devid
)
48 if (unlikely(!s
->translater_gpa_known
)) {
49 MemoryRegion
*mr
= &s
->iomem_its_translation
;
50 MemoryRegionSection mrs
;
52 mrs
= memory_region_find(mr
, 0, 1);
53 memory_region_unref(mrs
.mr
);
54 s
->gits_translater_gpa
= mrs
.offset_within_address_space
+ 0x40;
55 s
->translater_gpa_known
= true;
58 msi
.address_lo
= extract64(s
->gits_translater_gpa
, 0, 32);
59 msi
.address_hi
= extract64(s
->gits_translater_gpa
, 32, 32);
60 msi
.data
= le32_to_cpu(value
);
61 msi
.flags
= KVM_MSI_VALID_DEVID
;
63 memset(msi
.pad
, 0, sizeof(msi
.pad
));
65 return kvm_vm_ioctl(kvm_state
, KVM_SIGNAL_MSI
, &msi
);
69 * vm_change_state_handler - VM change state callback aiming at flushing
70 * ITS tables into guest RAM
72 * The tables get flushed to guest RAM whenever the VM gets stopped.
74 static void vm_change_state_handler(void *opaque
, int running
,
77 GICv3ITSState
*s
= (GICv3ITSState
*)opaque
;
84 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
85 KVM_DEV_ARM_ITS_SAVE_TABLES
, NULL
, true, &err
);
87 error_report_err(err
);
91 static void kvm_arm_its_realize(DeviceState
*dev
, Error
**errp
)
93 GICv3ITSState
*s
= ARM_GICV3_ITS_COMMON(dev
);
95 s
->dev_fd
= kvm_create_device(kvm_state
, KVM_DEV_TYPE_ARM_VGIC_ITS
, false);
97 error_setg_errno(errp
, -s
->dev_fd
, "error creating in-kernel ITS");
101 /* explicit init of the ITS */
102 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
103 KVM_DEV_ARM_VGIC_CTRL_INIT
, NULL
, true, &error_abort
);
105 /* register the base address */
106 kvm_arm_register_device(&s
->iomem_its_cntrl
, -1, KVM_DEV_ARM_VGIC_GRP_ADDR
,
107 KVM_VGIC_ITS_ADDR_TYPE
, s
->dev_fd
, 0);
109 gicv3_its_init_mmio(s
, NULL
);
111 if (!kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
113 error_setg(&s
->migration_blocker
, "This operating system kernel "
114 "does not support vITS migration");
115 if (migrate_add_blocker(s
->migration_blocker
, errp
) < 0) {
116 error_free(s
->migration_blocker
);
120 qemu_add_vm_change_state_handler(vm_change_state_handler
, s
);
123 kvm_msi_use_devid
= true;
124 kvm_gsi_direct_mapping
= false;
125 kvm_msi_via_irqfd_allowed
= kvm_irqfds_enabled();
129 * kvm_arm_its_pre_save - handles the saving of ITS registers.
130 * ITS tables are flushed into guest RAM separately and earlier,
131 * through the VM change state handler, since at the moment pre_save()
132 * is called, the guest RAM has already been saved.
134 static void kvm_arm_its_pre_save(GICv3ITSState
*s
)
138 for (i
= 0; i
< 8; i
++) {
139 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
140 GITS_BASER
+ i
* 8, &s
->baser
[i
], false,
144 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
145 GITS_CTLR
, &s
->ctlr
, false, &error_abort
);
147 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
148 GITS_CBASER
, &s
->cbaser
, false, &error_abort
);
150 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
151 GITS_CREADR
, &s
->creadr
, false, &error_abort
);
153 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
154 GITS_CWRITER
, &s
->cwriter
, false, &error_abort
);
156 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
157 GITS_IIDR
, &s
->iidr
, false, &error_abort
);
161 * kvm_arm_its_post_load - Restore both the ITS registers and tables
163 static void kvm_arm_its_post_load(GICv3ITSState
*s
)
167 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
168 GITS_IIDR
, &s
->iidr
, true, &error_abort
);
171 * must be written before GITS_CREADR since GITS_CBASER write
172 * access resets GITS_CREADR.
174 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
175 GITS_CBASER
, &s
->cbaser
, true, &error_abort
);
177 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
178 GITS_CREADR
, &s
->creadr
, true, &error_abort
);
180 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
181 GITS_CWRITER
, &s
->cwriter
, true, &error_abort
);
184 for (i
= 0; i
< 8; i
++) {
185 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
186 GITS_BASER
+ i
* 8, &s
->baser
[i
], true,
190 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
191 KVM_DEV_ARM_ITS_RESTORE_TABLES
, NULL
, true,
194 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
195 GITS_CTLR
, &s
->ctlr
, true, &error_abort
);
198 static void kvm_arm_its_reset(DeviceState
*dev
)
200 GICv3ITSState
*s
= ARM_GICV3_ITS_COMMON(dev
);
201 KVMARMITSClass
*c
= KVM_ARM_ITS_GET_CLASS(s
);
204 c
->parent_reset(dev
);
206 if (kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
207 KVM_DEV_ARM_ITS_CTRL_RESET
)) {
208 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
209 KVM_DEV_ARM_ITS_CTRL_RESET
, NULL
, true, &error_abort
);
213 warn_report("ITS KVM: full reset is not supported by the host kernel");
215 if (!kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
220 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
221 GITS_CTLR
, &s
->ctlr
, true, &error_abort
);
223 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
224 GITS_CBASER
, &s
->cbaser
, true, &error_abort
);
226 for (i
= 0; i
< 8; i
++) {
227 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
228 GITS_BASER
+ i
* 8, &s
->baser
[i
], true,
233 static Property kvm_arm_its_props
[] = {
234 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState
, gicv3
, "kvm-arm-gicv3",
236 DEFINE_PROP_END_OF_LIST(),
239 static void kvm_arm_its_class_init(ObjectClass
*klass
, void *data
)
241 DeviceClass
*dc
= DEVICE_CLASS(klass
);
242 GICv3ITSCommonClass
*icc
= ARM_GICV3_ITS_COMMON_CLASS(klass
);
243 KVMARMITSClass
*ic
= KVM_ARM_ITS_CLASS(klass
);
245 dc
->realize
= kvm_arm_its_realize
;
246 device_class_set_props(dc
, kvm_arm_its_props
);
247 device_class_set_parent_reset(dc
, kvm_arm_its_reset
, &ic
->parent_reset
);
248 icc
->send_msi
= kvm_its_send_msi
;
249 icc
->pre_save
= kvm_arm_its_pre_save
;
250 icc
->post_load
= kvm_arm_its_post_load
;
253 static const TypeInfo kvm_arm_its_info
= {
254 .name
= TYPE_KVM_ARM_ITS
,
255 .parent
= TYPE_ARM_GICV3_ITS_COMMON
,
256 .instance_size
= sizeof(GICv3ITSState
),
257 .class_init
= kvm_arm_its_class_init
,
258 .class_size
= sizeof(KVMARMITSClass
),
261 static void kvm_arm_its_register_types(void)
263 type_register_static(&kvm_arm_its_info
);
266 type_init(kvm_arm_its_register_types
)