hw/ppc/spapr_nvdimm.c

   1 /*
   2  * QEMU PAPR Storage Class Memory Interfaces
   3  *
   4  * Copyright (c) 2019-2020, IBM Corporation.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "qapi/error.h"
  26 #include "hw/ppc/spapr_drc.h"
  27 #include "hw/ppc/spapr_nvdimm.h"
  28 #include "hw/mem/nvdimm.h"
  29 #include "qemu/nvdimm-utils.h"
  30 #include "hw/ppc/fdt.h"
  31 #include "qemu/range.h"
  32
  33 void spapr_nvdimm_validate_opts(NVDIMMDevice *nvdimm, uint64_t size,
  34                                 Error **errp)
  35 {
  36     char *uuidstr = NULL;
  37     QemuUUID uuid;
  38     int ret;
  39
  40     if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP,
  41                                 &error_abort) == 0) {
  42         error_setg(errp, "PAPR requires NVDIMM devices to have label-size set");
  43         return;
  44     }
  45
  46     if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
  47         error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)"
  48                    " to be a multiple of %" PRIu64 "MB",
  49                    SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB);
  50         return;
  51     }
  52
  53     uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP,
  54                                       &error_abort);
  55     ret = qemu_uuid_parse(uuidstr, &uuid);
  56     g_assert(!ret);
  57     g_free(uuidstr);
  58
  59     if (qemu_uuid_is_null(&uuid)) {
  60         error_setg(errp, "NVDIMM device requires the uuid to be set");
  61         return;
  62     }
  63 }
  64
  65
  66 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp)
  67 {
  68     SpaprDrc *drc;
  69     bool hotplugged = spapr_drc_hotplugged(dev);
  70     Error *local_err = NULL;
  71
  72     drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
  73     g_assert(drc);
  74
  75     spapr_drc_attach(drc, dev, &local_err);
  76     if (local_err) {
  77         error_propagate(errp, local_err);
  78         return;
  79     }
  80
  81     if (hotplugged) {
  82         spapr_hotplug_req_add_by_index(drc);
  83     }
  84 }
  85
  86 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
  87                            void *fdt, int *fdt_start_offset, Error **errp)
  88 {
  89     NVDIMMDevice *nvdimm = NVDIMM(drc->dev);
  90
  91     *fdt_start_offset = spapr_dt_nvdimm(fdt, 0, nvdimm);
  92
  93     return 0;
  94 }
  95
  96 void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr)
  97 {
  98     MachineState *machine = MACHINE(spapr);
  99     int i;
 100
 101     for (i = 0; i < machine->ram_slots; i++) {
 102         spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i);
 103     }
 104 }
 105
 106
 107 int spapr_dt_nvdimm(void *fdt, int parent_offset,
 108                            NVDIMMDevice *nvdimm)
 109 {
 110     int child_offset;
 111     char *buf;
 112     SpaprDrc *drc;
 113     uint32_t drc_idx;
 114     uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP,
 115                                              &error_abort);
 116     uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP,
 117                                              &error_abort);
 118     uint32_t associativity[] = {
 119         cpu_to_be32(0x4), /* length */
 120         cpu_to_be32(0x0), cpu_to_be32(0x0),
 121         cpu_to_be32(0x0), cpu_to_be32(node)
 122     };
 123     uint64_t lsize = nvdimm->label_size;
 124     uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 125                                             NULL);
 126
 127     drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
 128     g_assert(drc);
 129
 130     drc_idx = spapr_drc_index(drc);
 131
 132     buf = g_strdup_printf("ibm,pmemory@%x", drc_idx);
 133     child_offset = fdt_add_subnode(fdt, parent_offset, buf);
 134     g_free(buf);
 135
 136     _FDT(child_offset);
 137
 138     _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx)));
 139     _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory")));
 140     _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory")));
 141
 142     _FDT((fdt_setprop(fdt, child_offset, "ibm,associativity", associativity,
 143                       sizeof(associativity))));
 144
 145     buf = qemu_uuid_unparse_strdup(&nvdimm->uuid);
 146     _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf)));
 147     g_free(buf);
 148
 149     _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx)));
 150
 151     _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size",
 152                           SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
 153     _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks",
 154                           size / SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
 155     _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize)));
 156
 157     _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application",
 158                              "operating-system")));
 159     _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0));
 160
 161     return child_offset;
 162 }
 163
 164 void spapr_dt_persistent_memory(void *fdt)
 165 {
 166     int offset = fdt_subnode_offset(fdt, 0, "persistent-memory");
 167     GSList *iter, *nvdimms = nvdimm_get_device_list();
 168
 169     if (offset < 0) {
 170         offset = fdt_add_subnode(fdt, 0, "persistent-memory");
 171         _FDT(offset);
 172         _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1)));
 173         _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0)));
 174         _FDT((fdt_setprop_string(fdt, offset, "device_type",
 175                                  "ibm,persistent-memory")));
 176     }
 177
 178     /* Create DT entries for cold plugged NVDIMM devices */
 179     for (iter = nvdimms; iter; iter = iter->next) {
 180         NVDIMMDevice *nvdimm = iter->data;
 181
 182         spapr_dt_nvdimm(fdt, offset, nvdimm);
 183     }
 184     g_slist_free(nvdimms);
 185
 186     return;
 187 }
 188
 189 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu,
 190                                         SpaprMachineState *spapr,
 191                                         target_ulong opcode,
 192                                         target_ulong *args)
 193 {
 194     uint32_t drc_index = args[0];
 195     uint64_t offset = args[1];
 196     uint64_t len = args[2];
 197     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 198     NVDIMMDevice *nvdimm;
 199     NVDIMMClass *ddc;
 200     uint64_t data = 0;
 201     uint8_t buf[8] = { 0 };
 202
 203     if (!drc || !drc->dev ||
 204         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 205         return H_PARAMETER;
 206     }
 207
 208     if (len != 1 && len != 2 &&
 209         len != 4 && len != 8) {
 210         return H_P3;
 211     }
 212
 213     nvdimm = NVDIMM(drc->dev);
 214     if ((offset + len < offset) ||
 215         (nvdimm->label_size < len + offset)) {
 216         return H_P2;
 217     }
 218
 219     ddc = NVDIMM_GET_CLASS(nvdimm);
 220     ddc->read_label_data(nvdimm, buf, len, offset);
 221
 222     switch (len) {
 223     case 1:
 224         data = ldub_p(buf);
 225         break;
 226     case 2:
 227         data = lduw_be_p(buf);
 228         break;
 229     case 4:
 230         data = ldl_be_p(buf);
 231         break;
 232     case 8:
 233         data = ldq_be_p(buf);
 234         break;
 235     default:
 236         g_assert_not_reached();
 237     }
 238
 239     args[0] = data;
 240
 241     return H_SUCCESS;
 242 }
 243
 244 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu,
 245                                          SpaprMachineState *spapr,
 246                                          target_ulong opcode,
 247                                          target_ulong *args)
 248 {
 249     uint32_t drc_index = args[0];
 250     uint64_t offset = args[1];
 251     uint64_t data = args[2];
 252     uint64_t len = args[3];
 253     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 254     NVDIMMDevice *nvdimm;
 255     NVDIMMClass *ddc;
 256     uint8_t buf[8] = { 0 };
 257
 258     if (!drc || !drc->dev ||
 259         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 260         return H_PARAMETER;
 261     }
 262
 263     if (len != 1 && len != 2 &&
 264         len != 4 && len != 8) {
 265         return H_P4;
 266     }
 267
 268     nvdimm = NVDIMM(drc->dev);
 269     if ((offset + len < offset) ||
 270         (nvdimm->label_size < len + offset)) {
 271         return H_P2;
 272     }
 273
 274     switch (len) {
 275     case 1:
 276         if (data & 0xffffffffffffff00) {
 277             return H_P2;
 278         }
 279         stb_p(buf, data);
 280         break;
 281     case 2:
 282         if (data & 0xffffffffffff0000) {
 283             return H_P2;
 284         }
 285         stw_be_p(buf, data);
 286         break;
 287     case 4:
 288         if (data & 0xffffffff00000000) {
 289             return H_P2;
 290         }
 291         stl_be_p(buf, data);
 292         break;
 293     case 8:
 294         stq_be_p(buf, data);
 295         break;
 296     default:
 297             g_assert_not_reached();
 298     }
 299
 300     ddc = NVDIMM_GET_CLASS(nvdimm);
 301     ddc->write_label_data(nvdimm, buf, len, offset);
 302
 303     return H_SUCCESS;
 304 }
 305
 306 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
 307                                    target_ulong opcode, target_ulong *args)
 308 {
 309     uint32_t drc_index = args[0];
 310     uint64_t starting_idx = args[1];
 311     uint64_t no_of_scm_blocks_to_bind = args[2];
 312     uint64_t target_logical_mem_addr = args[3];
 313     uint64_t continue_token = args[4];
 314     uint64_t size;
 315     uint64_t total_no_of_scm_blocks;
 316     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 317     hwaddr addr;
 318     NVDIMMDevice *nvdimm;
 319
 320     if (!drc || !drc->dev ||
 321         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 322         return H_PARAMETER;
 323     }
 324
 325     /*
 326      * Currently continue token should be zero qemu has already bound
 327      * everything and this hcall doesnt return H_BUSY.
 328      */
 329     if (continue_token > 0) {
 330         return H_P5;
 331     }
 332
 333     /* Currently qemu assigns the address. */
 334     if (target_logical_mem_addr != 0xffffffffffffffff) {
 335         return H_OVERLAP;
 336     }
 337
 338     nvdimm = NVDIMM(drc->dev);
 339
 340     size = object_property_get_uint(OBJECT(nvdimm),
 341                                     PC_DIMM_SIZE_PROP, &error_abort);
 342
 343     total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 344
 345     if (starting_idx > total_no_of_scm_blocks) {
 346         return H_P2;
 347     }
 348
 349     if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) ||
 350         ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) {
 351         return H_P3;
 352     }
 353
 354     addr = object_property_get_uint(OBJECT(nvdimm),
 355                                     PC_DIMM_ADDR_PROP, &error_abort);
 356
 357     addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 358
 359     /* Already bound, Return target logical address in R5 */
 360     args[1] = addr;
 361     args[2] = no_of_scm_blocks_to_bind;
 362
 363     return H_SUCCESS;
 364 }
 365
 366 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
 367                                      target_ulong opcode, target_ulong *args)
 368 {
 369     uint32_t drc_index = args[0];
 370     uint64_t starting_scm_logical_addr = args[1];
 371     uint64_t no_of_scm_blocks_to_unbind = args[2];
 372     uint64_t continue_token = args[3];
 373     uint64_t size_to_unbind;
 374     Range blockrange = range_empty;
 375     Range nvdimmrange = range_empty;
 376     SpaprDrc *drc = spapr_drc_by_index(drc_index);
 377     NVDIMMDevice *nvdimm;
 378     uint64_t size, addr;
 379
 380     if (!drc || !drc->dev ||
 381         spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 382         return H_PARAMETER;
 383     }
 384
 385     /* continue_token should be zero as this hcall doesn't return H_BUSY. */
 386     if (continue_token > 0) {
 387         return H_P4;
 388     }
 389
 390     /* Check if starting_scm_logical_addr is block aligned */
 391     if (!QEMU_IS_ALIGNED(starting_scm_logical_addr,
 392                          SPAPR_MINIMUM_SCM_BLOCK_SIZE)) {
 393         return H_P2;
 394     }
 395
 396     size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 397     if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind !=
 398                                size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
 399         return H_P3;
 400     }
 401
 402     nvdimm = NVDIMM(drc->dev);
 403     size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 404                                    &error_abort);
 405     addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP,
 406                                    &error_abort);
 407
 408     range_init_nofail(&nvdimmrange, addr, size);
 409     range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind);
 410
 411     if (!range_contains_range(&nvdimmrange, &blockrange)) {
 412         return H_P3;
 413     }
 414
 415     args[1] = no_of_scm_blocks_to_unbind;
 416
 417     /* let unplug take care of actual unbind */
 418     return H_SUCCESS;
 419 }
 420
 421 #define H_UNBIND_SCOPE_ALL 0x1
 422 #define H_UNBIND_SCOPE_DRC 0x2
 423
 424 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr,
 425                                      target_ulong opcode, target_ulong *args)
 426 {
 427     uint64_t target_scope = args[0];
 428     uint32_t drc_index = args[1];
 429     uint64_t continue_token = args[2];
 430     NVDIMMDevice *nvdimm;
 431     uint64_t size;
 432     uint64_t no_of_scm_blocks_unbound = 0;
 433
 434     /* continue_token should be zero as this hcall doesn't return H_BUSY. */
 435     if (continue_token > 0) {
 436         return H_P4;
 437     }
 438
 439     if (target_scope == H_UNBIND_SCOPE_DRC) {
 440         SpaprDrc *drc = spapr_drc_by_index(drc_index);
 441
 442         if (!drc || !drc->dev ||
 443             spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
 444             return H_P2;
 445         }
 446
 447         nvdimm = NVDIMM(drc->dev);
 448         size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 449                                        &error_abort);
 450
 451         no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 452     } else if (target_scope ==  H_UNBIND_SCOPE_ALL) {
 453         GSList *list, *nvdimms;
 454
 455         nvdimms = nvdimm_get_device_list();
 456         for (list = nvdimms; list; list = list->next) {
 457             nvdimm = list->data;
 458             size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
 459                                            &error_abort);
 460
 461             no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
 462         }
 463         g_slist_free(nvdimms);
 464     } else {
 465         return H_PARAMETER;
 466     }
 467
 468     args[1] = no_of_scm_blocks_unbound;
 469
 470     /* let unplug take care of actual unbind */
 471     return H_SUCCESS;
 472 }
 473
 474 static void spapr_scm_register_types(void)
 475 {
 476     /* qemu/scm specific hcalls */
 477     spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata);
 478     spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata);
 479     spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem);
 480     spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem);
 481     spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all);
 482 }
 483
 484 type_init(spapr_scm_register_types)