4 * Copyright (c) 2006 Fabrice Bellard
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 * This is based on acpi.c.
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2.1 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "qapi/visitor.h"
30 #include "hw/pci/pci.h"
31 #include "migration/vmstate.h"
32 #include "qemu/timer.h"
33 #include "hw/core/cpu.h"
34 #include "sysemu/reset.h"
35 #include "sysemu/runstate.h"
36 #include "hw/acpi/acpi.h"
37 #include "hw/acpi/ich9_tco.h"
39 #include "hw/southbridge/ich9.h"
40 #include "hw/mem/pc-dimm.h"
41 #include "hw/mem/nvdimm.h"
46 #define ICH9_DEBUG(fmt, ...) \
47 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
49 #define ICH9_DEBUG(fmt, ...) do { } while (0)
52 static void ich9_pm_update_sci_fn(ACPIREGS
*regs
)
54 ICH9LPCPMRegs
*pm
= container_of(regs
, ICH9LPCPMRegs
, acpi_regs
);
55 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
58 static uint64_t ich9_gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
60 ICH9LPCPMRegs
*pm
= opaque
;
61 return acpi_gpe_ioport_readb(&pm
->acpi_regs
, addr
);
64 static void ich9_gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
67 ICH9LPCPMRegs
*pm
= opaque
;
68 acpi_gpe_ioport_writeb(&pm
->acpi_regs
, addr
, val
);
69 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
72 static const MemoryRegionOps ich9_gpe_ops
= {
73 .read
= ich9_gpe_readb
,
74 .write
= ich9_gpe_writeb
,
75 .valid
.min_access_size
= 1,
76 .valid
.max_access_size
= 4,
77 .impl
.min_access_size
= 1,
78 .impl
.max_access_size
= 1,
79 .endianness
= DEVICE_LITTLE_ENDIAN
,
82 static uint64_t ich9_smi_readl(void *opaque
, hwaddr addr
, unsigned width
)
84 ICH9LPCPMRegs
*pm
= opaque
;
95 static void ich9_smi_writel(void *opaque
, hwaddr addr
, uint64_t val
,
98 ICH9LPCPMRegs
*pm
= opaque
;
99 TCOIORegs
*tr
= &pm
->tco_regs
;
104 tco_en
= pm
->smi_en
& ICH9_PMIO_SMI_EN_TCO_EN
;
105 /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
106 if (tr
->tco
.cnt1
& TCO_LOCK
) {
107 val
= (val
& ~ICH9_PMIO_SMI_EN_TCO_EN
) | tco_en
;
109 pm
->smi_en
&= ~pm
->smi_en_wmask
;
110 pm
->smi_en
|= (val
& pm
->smi_en_wmask
);
115 static const MemoryRegionOps ich9_smi_ops
= {
116 .read
= ich9_smi_readl
,
117 .write
= ich9_smi_writel
,
118 .valid
.min_access_size
= 4,
119 .valid
.max_access_size
= 4,
120 .endianness
= DEVICE_LITTLE_ENDIAN
,
123 void ich9_pm_iospace_update(ICH9LPCPMRegs
*pm
, uint32_t pm_io_base
)
125 ICH9_DEBUG("to 0x%x\n", pm_io_base
);
127 assert((pm_io_base
& ICH9_PMIO_MASK
) == 0);
129 pm
->pm_io_base
= pm_io_base
;
130 memory_region_transaction_begin();
131 memory_region_set_enabled(&pm
->io
, pm
->pm_io_base
!= 0);
132 memory_region_set_address(&pm
->io
, pm
->pm_io_base
);
133 memory_region_transaction_commit();
136 static int ich9_pm_post_load(void *opaque
, int version_id
)
138 ICH9LPCPMRegs
*pm
= opaque
;
139 uint32_t pm_io_base
= pm
->pm_io_base
;
141 ich9_pm_iospace_update(pm
, pm_io_base
);
145 #define VMSTATE_GPE_ARRAY(_field, _state) \
147 .name = (stringify(_field)), \
149 .num = ICH9_PMIO_GPE0_LEN, \
150 .info = &vmstate_info_uint8, \
151 .size = sizeof(uint8_t), \
152 .flags = VMS_ARRAY | VMS_POINTER, \
153 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
156 static bool vmstate_test_use_memhp(void *opaque
)
158 ICH9LPCPMRegs
*s
= opaque
;
159 return s
->acpi_memory_hotplug
.is_enabled
;
162 static const VMStateDescription vmstate_memhp_state
= {
163 .name
= "ich9_pm/memhp",
165 .minimum_version_id
= 1,
166 .needed
= vmstate_test_use_memhp
,
167 .fields
= (VMStateField
[]) {
168 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, ICH9LPCPMRegs
),
169 VMSTATE_END_OF_LIST()
173 static bool vmstate_test_use_tco(void *opaque
)
175 ICH9LPCPMRegs
*s
= opaque
;
176 return s
->enable_tco
;
179 static const VMStateDescription vmstate_tco_io_state
= {
180 .name
= "ich9_pm/tco",
182 .minimum_version_id
= 1,
183 .needed
= vmstate_test_use_tco
,
184 .fields
= (VMStateField
[]) {
185 VMSTATE_STRUCT(tco_regs
, ICH9LPCPMRegs
, 1, vmstate_tco_io_sts
,
187 VMSTATE_END_OF_LIST()
191 static bool vmstate_test_use_cpuhp(void *opaque
)
193 ICH9LPCPMRegs
*s
= opaque
;
194 return !s
->cpu_hotplug_legacy
;
197 static int vmstate_cpuhp_pre_load(void *opaque
)
199 ICH9LPCPMRegs
*s
= opaque
;
200 Object
*obj
= OBJECT(s
->gpe_cpu
.device
);
201 object_property_set_bool(obj
, "cpu-hotplug-legacy", false, &error_abort
);
205 static const VMStateDescription vmstate_cpuhp_state
= {
206 .name
= "ich9_pm/cpuhp",
208 .minimum_version_id
= 1,
209 .needed
= vmstate_test_use_cpuhp
,
210 .pre_load
= vmstate_cpuhp_pre_load
,
211 .fields
= (VMStateField
[]) {
212 VMSTATE_CPU_HOTPLUG(cpuhp_state
, ICH9LPCPMRegs
),
213 VMSTATE_END_OF_LIST()
217 static bool vmstate_test_use_pcihp(void *opaque
)
219 ICH9LPCPMRegs
*s
= opaque
;
221 return s
->acpi_pci_hotplug
.use_acpi_hotplug_bridge
;
224 static const VMStateDescription vmstate_pcihp_state
= {
225 .name
= "ich9_pm/pcihp",
227 .minimum_version_id
= 1,
228 .needed
= vmstate_test_use_pcihp
,
229 .fields
= (VMStateField
[]) {
230 VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug
,
233 VMSTATE_END_OF_LIST()
237 const VMStateDescription vmstate_ich9_pm
= {
240 .minimum_version_id
= 1,
241 .post_load
= ich9_pm_post_load
,
242 .fields
= (VMStateField
[]) {
243 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.sts
, ICH9LPCPMRegs
),
244 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.en
, ICH9LPCPMRegs
),
245 VMSTATE_UINT16(acpi_regs
.pm1
.cnt
.cnt
, ICH9LPCPMRegs
),
246 VMSTATE_TIMER_PTR(acpi_regs
.tmr
.timer
, ICH9LPCPMRegs
),
247 VMSTATE_INT64(acpi_regs
.tmr
.overflow_time
, ICH9LPCPMRegs
),
248 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.sts
, ICH9LPCPMRegs
),
249 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.en
, ICH9LPCPMRegs
),
250 VMSTATE_UINT32(smi_en
, ICH9LPCPMRegs
),
251 VMSTATE_UINT32(smi_sts
, ICH9LPCPMRegs
),
252 VMSTATE_END_OF_LIST()
254 .subsections
= (const VMStateDescription
*[]) {
255 &vmstate_memhp_state
,
256 &vmstate_tco_io_state
,
257 &vmstate_cpuhp_state
,
258 &vmstate_pcihp_state
,
263 static void pm_reset(void *opaque
)
265 ICH9LPCPMRegs
*pm
= opaque
;
266 ich9_pm_iospace_update(pm
, 0);
268 acpi_pm1_evt_reset(&pm
->acpi_regs
);
269 acpi_pm1_cnt_reset(&pm
->acpi_regs
);
270 acpi_pm_tmr_reset(&pm
->acpi_regs
);
271 acpi_gpe_reset(&pm
->acpi_regs
);
274 if (!pm
->smm_enabled
) {
275 /* Mark SMM as already inited to prevent SMM from running. */
276 pm
->smi_en
|= ICH9_PMIO_SMI_EN_APMC_EN
;
278 pm
->smi_en_wmask
= ~0;
280 if (pm
->acpi_pci_hotplug
.use_acpi_hotplug_bridge
) {
281 acpi_pcihp_reset(&pm
->acpi_pci_hotplug
);
284 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
287 static void pm_powerdown_req(Notifier
*n
, void *opaque
)
289 ICH9LPCPMRegs
*pm
= container_of(n
, ICH9LPCPMRegs
, powerdown_notifier
);
291 acpi_pm1_evt_power_down(&pm
->acpi_regs
);
294 void ich9_pm_init(PCIDevice
*lpc_pci
, ICH9LPCPMRegs
*pm
, qemu_irq sci_irq
)
296 memory_region_init(&pm
->io
, OBJECT(lpc_pci
), "ich9-pm", ICH9_PMIO_SIZE
);
297 memory_region_set_enabled(&pm
->io
, false);
298 memory_region_add_subregion(pci_address_space_io(lpc_pci
),
301 acpi_pm_tmr_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
302 acpi_pm1_evt_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
303 acpi_pm1_cnt_init(&pm
->acpi_regs
, &pm
->io
, pm
->disable_s3
, pm
->disable_s4
,
304 pm
->s4_val
, !pm
->smm_compat
&& !pm
->smm_enabled
);
306 acpi_gpe_init(&pm
->acpi_regs
, ICH9_PMIO_GPE0_LEN
);
307 memory_region_init_io(&pm
->io_gpe
, OBJECT(lpc_pci
), &ich9_gpe_ops
, pm
,
308 "acpi-gpe0", ICH9_PMIO_GPE0_LEN
);
309 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_GPE0_STS
, &pm
->io_gpe
);
311 memory_region_init_io(&pm
->io_smi
, OBJECT(lpc_pci
), &ich9_smi_ops
, pm
,
313 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_SMI_EN
, &pm
->io_smi
);
315 if (pm
->enable_tco
) {
316 acpi_pm_tco_init(&pm
->tco_regs
, &pm
->io
);
319 if (pm
->acpi_pci_hotplug
.use_acpi_hotplug_bridge
) {
320 acpi_pcihp_init(OBJECT(lpc_pci
),
321 &pm
->acpi_pci_hotplug
,
322 pci_get_bus(lpc_pci
),
323 pci_address_space_io(lpc_pci
),
324 ACPI_PCIHP_ADDR_ICH9
);
326 qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci
)),
331 qemu_register_reset(pm_reset
, pm
);
332 pm
->powerdown_notifier
.notify
= pm_powerdown_req
;
333 qemu_register_powerdown_notifier(&pm
->powerdown_notifier
);
335 legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci
),
336 OBJECT(lpc_pci
), &pm
->gpe_cpu
, ICH9_CPU_HOTPLUG_IO_BASE
);
338 if (pm
->acpi_memory_hotplug
.is_enabled
) {
339 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci
), OBJECT(lpc_pci
),
340 &pm
->acpi_memory_hotplug
,
341 ACPI_MEMORY_HOTPLUG_BASE
);
345 static void ich9_pm_get_gpe0_blk(Object
*obj
, Visitor
*v
, const char *name
,
346 void *opaque
, Error
**errp
)
348 ICH9LPCPMRegs
*pm
= opaque
;
349 uint32_t value
= pm
->pm_io_base
+ ICH9_PMIO_GPE0_STS
;
351 visit_type_uint32(v
, name
, &value
, errp
);
354 static bool ich9_pm_get_memory_hotplug_support(Object
*obj
, Error
**errp
)
356 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
358 return s
->pm
.acpi_memory_hotplug
.is_enabled
;
361 static void ich9_pm_set_memory_hotplug_support(Object
*obj
, bool value
,
364 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
366 s
->pm
.acpi_memory_hotplug
.is_enabled
= value
;
369 static bool ich9_pm_get_cpu_hotplug_legacy(Object
*obj
, Error
**errp
)
371 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
373 return s
->pm
.cpu_hotplug_legacy
;
376 static void ich9_pm_set_cpu_hotplug_legacy(Object
*obj
, bool value
,
379 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
382 if (s
->pm
.cpu_hotplug_legacy
&& value
== false) {
383 acpi_switch_to_modern_cphp(&s
->pm
.gpe_cpu
, &s
->pm
.cpuhp_state
,
384 ICH9_CPU_HOTPLUG_IO_BASE
);
386 s
->pm
.cpu_hotplug_legacy
= value
;
389 static bool ich9_pm_get_enable_tco(Object
*obj
, Error
**errp
)
391 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
392 return s
->pm
.enable_tco
;
395 static void ich9_pm_set_enable_tco(Object
*obj
, bool value
, Error
**errp
)
397 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
398 s
->pm
.enable_tco
= value
;
401 static bool ich9_pm_get_acpi_pci_hotplug(Object
*obj
, Error
**errp
)
403 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
405 return s
->pm
.acpi_pci_hotplug
.use_acpi_hotplug_bridge
;
408 static void ich9_pm_set_acpi_pci_hotplug(Object
*obj
, bool value
, Error
**errp
)
410 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
412 s
->pm
.acpi_pci_hotplug
.use_acpi_hotplug_bridge
= value
;
415 static bool ich9_pm_get_keep_pci_slot_hpc(Object
*obj
, Error
**errp
)
417 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
419 return s
->pm
.keep_pci_slot_hpc
;
422 static void ich9_pm_set_keep_pci_slot_hpc(Object
*obj
, bool value
, Error
**errp
)
424 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
426 s
->pm
.keep_pci_slot_hpc
= value
;
429 void ich9_pm_add_properties(Object
*obj
, ICH9LPCPMRegs
*pm
)
431 static const uint32_t gpe0_len
= ICH9_PMIO_GPE0_LEN
;
432 pm
->acpi_memory_hotplug
.is_enabled
= true;
433 pm
->cpu_hotplug_legacy
= true;
437 pm
->acpi_pci_hotplug
.use_acpi_hotplug_bridge
= true;
438 pm
->keep_pci_slot_hpc
= true;
439 pm
->enable_tco
= true;
441 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_PM_IO_BASE
,
442 &pm
->pm_io_base
, OBJ_PROP_FLAG_READ
);
443 object_property_add(obj
, ACPI_PM_PROP_GPE0_BLK
, "uint32",
444 ich9_pm_get_gpe0_blk
,
446 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_GPE0_BLK_LEN
,
447 &gpe0_len
, OBJ_PROP_FLAG_READ
);
448 object_property_add_bool(obj
, "memory-hotplug-support",
449 ich9_pm_get_memory_hotplug_support
,
450 ich9_pm_set_memory_hotplug_support
);
451 object_property_add_bool(obj
, "cpu-hotplug-legacy",
452 ich9_pm_get_cpu_hotplug_legacy
,
453 ich9_pm_set_cpu_hotplug_legacy
);
454 object_property_add_uint8_ptr(obj
, ACPI_PM_PROP_S3_DISABLED
,
455 &pm
->disable_s3
, OBJ_PROP_FLAG_READWRITE
);
456 object_property_add_uint8_ptr(obj
, ACPI_PM_PROP_S4_DISABLED
,
457 &pm
->disable_s4
, OBJ_PROP_FLAG_READWRITE
);
458 object_property_add_uint8_ptr(obj
, ACPI_PM_PROP_S4_VAL
,
459 &pm
->s4_val
, OBJ_PROP_FLAG_READWRITE
);
460 object_property_add_bool(obj
, ACPI_PM_PROP_TCO_ENABLED
,
461 ich9_pm_get_enable_tco
,
462 ich9_pm_set_enable_tco
);
463 object_property_add_bool(obj
, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE
,
464 ich9_pm_get_acpi_pci_hotplug
,
465 ich9_pm_set_acpi_pci_hotplug
);
466 object_property_add_bool(obj
, "x-keep-pci-slot-hpc",
467 ich9_pm_get_keep_pci_slot_hpc
,
468 ich9_pm_set_keep_pci_slot_hpc
);
471 void ich9_pm_device_pre_plug_cb(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
474 ICH9LPCState
*lpc
= ICH9_LPC_DEVICE(hotplug_dev
);
476 if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
477 acpi_pcihp_device_pre_plug_cb(hotplug_dev
, dev
, errp
);
481 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) &&
482 !lpc
->pm
.acpi_memory_hotplug
.is_enabled
) {
484 "memory hotplug is not enabled: %s.memory-hotplug-support "
485 "is not set", object_get_typename(OBJECT(lpc
)));
486 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
487 uint64_t negotiated
= lpc
->smi_negotiated_features
;
489 if (negotiated
& BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT
) &&
490 !(negotiated
& BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT
))) {
491 error_setg(errp
, "cpu hotplug with SMI wasn't enabled by firmware");
492 error_append_hint(errp
, "update machine type to newer than 5.1 "
493 "and firmware that suppors CPU hotplug with SMM");
498 void ich9_pm_device_plug_cb(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
501 ICH9LPCState
*lpc
= ICH9_LPC_DEVICE(hotplug_dev
);
503 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
504 if (object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
)) {
505 nvdimm_acpi_plug_cb(hotplug_dev
, dev
);
507 acpi_memory_plug_cb(hotplug_dev
, &lpc
->pm
.acpi_memory_hotplug
,
510 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
511 if (lpc
->pm
.cpu_hotplug_legacy
) {
512 legacy_acpi_cpu_plug_cb(hotplug_dev
, &lpc
->pm
.gpe_cpu
, dev
, errp
);
514 acpi_cpu_plug_cb(hotplug_dev
, &lpc
->pm
.cpuhp_state
, dev
, errp
);
516 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
517 acpi_pcihp_device_plug_cb(hotplug_dev
, &lpc
->pm
.acpi_pci_hotplug
,
520 error_setg(errp
, "acpi: device plug request for not supported device"
521 " type: %s", object_get_typename(OBJECT(dev
)));
525 void ich9_pm_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
526 DeviceState
*dev
, Error
**errp
)
528 ICH9LPCState
*lpc
= ICH9_LPC_DEVICE(hotplug_dev
);
530 if (lpc
->pm
.acpi_memory_hotplug
.is_enabled
&&
531 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
532 acpi_memory_unplug_request_cb(hotplug_dev
,
533 &lpc
->pm
.acpi_memory_hotplug
, dev
,
535 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
536 !lpc
->pm
.cpu_hotplug_legacy
) {
537 uint64_t negotiated
= lpc
->smi_negotiated_features
;
539 if (negotiated
& BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT
) &&
540 !(negotiated
& BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT
))) {
541 error_setg(errp
, "cpu hot-unplug with SMI wasn't enabled "
543 error_append_hint(errp
, "update machine type to a version having "
544 "x-smi-cpu-hotunplug=on and firmware that "
545 "supports CPU hot-unplug with SMM");
549 acpi_cpu_unplug_request_cb(hotplug_dev
, &lpc
->pm
.cpuhp_state
,
551 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
552 acpi_pcihp_device_unplug_request_cb(hotplug_dev
,
553 &lpc
->pm
.acpi_pci_hotplug
,
556 error_setg(errp
, "acpi: device unplug request for not supported device"
557 " type: %s", object_get_typename(OBJECT(dev
)));
561 void ich9_pm_device_unplug_cb(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
564 ICH9LPCState
*lpc
= ICH9_LPC_DEVICE(hotplug_dev
);
566 if (lpc
->pm
.acpi_memory_hotplug
.is_enabled
&&
567 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
568 acpi_memory_unplug_cb(&lpc
->pm
.acpi_memory_hotplug
, dev
, errp
);
569 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
570 !lpc
->pm
.cpu_hotplug_legacy
) {
571 acpi_cpu_unplug_cb(&lpc
->pm
.cpuhp_state
, dev
, errp
);
572 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
573 acpi_pcihp_device_unplug_cb(hotplug_dev
, &lpc
->pm
.acpi_pci_hotplug
,
576 error_setg(errp
, "acpi: device unplug for not supported device"
577 " type: %s", object_get_typename(OBJECT(dev
)));
581 bool ich9_pm_is_hotpluggable_bus(HotplugHandler
*hotplug_dev
, BusState
*bus
)
583 ICH9LPCState
*lpc
= ICH9_LPC_DEVICE(hotplug_dev
);
584 return acpi_pcihp_is_hotpluggbale_bus(&lpc
->pm
.acpi_pci_hotplug
, bus
);
587 void ich9_pm_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
589 ICH9LPCState
*s
= ICH9_LPC_DEVICE(adev
);
591 acpi_memory_ospm_status(&s
->pm
.acpi_memory_hotplug
, list
);
592 if (!s
->pm
.cpu_hotplug_legacy
) {
593 acpi_cpu_ospm_status(&s
->pm
.cpuhp_state
, list
);