hw/arm/xlnx-versal-virt.c

   1 /*
   2  * Xilinx Versal Virtual board.
   3  *
   4  * Copyright (c) 2018 Xilinx Inc.
   5  * Written by Edgar E. Iglesias
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 or
   9  * (at your option) any later version.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qemu/error-report.h"
  14 #include "qapi/error.h"
  15 #include "sysemu/device_tree.h"
  16 #include "hw/boards.h"
  17 #include "hw/sysbus.h"
  18 #include "hw/arm/fdt.h"
  19 #include "cpu.h"
  20 #include "hw/qdev-properties.h"
  21 #include "hw/arm/xlnx-versal.h"
  22 #include "qom/object.h"
  23
  24 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
  25 OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
  26
  27 #define XLNX_VERSAL_NUM_OSPI_FLASH 4
  28
  29 struct VersalVirt {
  30     MachineState parent_obj;
  31
  32     Versal soc;
  33
  34     void *fdt;
  35     int fdt_size;
  36     struct {
  37         uint32_t gic;
  38         uint32_t ethernet_phy[2];
  39         uint32_t clk_125Mhz;
  40         uint32_t clk_25Mhz;
  41         uint32_t usb;
  42         uint32_t dwc;
  43     } phandle;
  44     struct arm_boot_info binfo;
  45
  46     struct {
  47         bool secure;
  48     } cfg;
  49 };
  50
  51 static void fdt_create(VersalVirt *s)
  52 {
  53     MachineClass *mc = MACHINE_GET_CLASS(s);
  54     int i;
  55
  56     s->fdt = create_device_tree(&s->fdt_size);
  57     if (!s->fdt) {
  58         error_report("create_device_tree() failed");
  59         exit(1);
  60     }
  61
  62     /* Allocate all phandles.  */
  63     s->phandle.gic = qemu_fdt_alloc_phandle(s->fdt);
  64     for (i = 0; i < ARRAY_SIZE(s->phandle.ethernet_phy); i++) {
  65         s->phandle.ethernet_phy[i] = qemu_fdt_alloc_phandle(s->fdt);
  66     }
  67     s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt);
  68     s->phandle.clk_125Mhz = qemu_fdt_alloc_phandle(s->fdt);
  69
  70     s->phandle.usb = qemu_fdt_alloc_phandle(s->fdt);
  71     s->phandle.dwc = qemu_fdt_alloc_phandle(s->fdt);
  72     /* Create /chosen node for load_dtb.  */
  73     qemu_fdt_add_subnode(s->fdt, "/chosen");
  74
  75     /* Header */
  76     qemu_fdt_setprop_cell(s->fdt, "/", "interrupt-parent", s->phandle.gic);
  77     qemu_fdt_setprop_cell(s->fdt, "/", "#size-cells", 0x2);
  78     qemu_fdt_setprop_cell(s->fdt, "/", "#address-cells", 0x2);
  79     qemu_fdt_setprop_string(s->fdt, "/", "model", mc->desc);
  80     qemu_fdt_setprop_string(s->fdt, "/", "compatible", "xlnx-versal-virt");
  81 }
  82
  83 static void fdt_add_clk_node(VersalVirt *s, const char *name,
  84                              unsigned int freq_hz, uint32_t phandle)
  85 {
  86     qemu_fdt_add_subnode(s->fdt, name);
  87     qemu_fdt_setprop_cell(s->fdt, name, "phandle", phandle);
  88     qemu_fdt_setprop_cell(s->fdt, name, "clock-frequency", freq_hz);
  89     qemu_fdt_setprop_cell(s->fdt, name, "#clock-cells", 0x0);
  90     qemu_fdt_setprop_string(s->fdt, name, "compatible", "fixed-clock");
  91     qemu_fdt_setprop(s->fdt, name, "u-boot,dm-pre-reloc", NULL, 0);
  92 }
  93
  94 static void fdt_add_cpu_nodes(VersalVirt *s, uint32_t psci_conduit)
  95 {
  96     int i;
  97
  98     qemu_fdt_add_subnode(s->fdt, "/cpus");
  99     qemu_fdt_setprop_cell(s->fdt, "/cpus", "#size-cells", 0x0);
 100     qemu_fdt_setprop_cell(s->fdt, "/cpus", "#address-cells", 1);
 101
 102     for (i = XLNX_VERSAL_NR_ACPUS - 1; i >= 0; i--) {
 103         char *name = g_strdup_printf("/cpus/cpu@%d", i);
 104         ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(i));
 105
 106         qemu_fdt_add_subnode(s->fdt, name);
 107         qemu_fdt_setprop_cell(s->fdt, name, "reg", armcpu->mp_affinity);
 108         if (psci_conduit != QEMU_PSCI_CONDUIT_DISABLED) {
 109             qemu_fdt_setprop_string(s->fdt, name, "enable-method", "psci");
 110         }
 111         qemu_fdt_setprop_string(s->fdt, name, "device_type", "cpu");
 112         qemu_fdt_setprop_string(s->fdt, name, "compatible",
 113                                 armcpu->dtb_compatible);
 114         g_free(name);
 115     }
 116 }
 117
 118 static void fdt_add_gic_nodes(VersalVirt *s)
 119 {
 120     char *nodename;
 121
 122     nodename = g_strdup_printf("/gic@%x", MM_GIC_APU_DIST_MAIN);
 123     qemu_fdt_add_subnode(s->fdt, nodename);
 124     qemu_fdt_setprop_cell(s->fdt, nodename, "phandle", s->phandle.gic);
 125     qemu_fdt_setprop_cells(s->fdt, nodename, "interrupts",
 126                            GIC_FDT_IRQ_TYPE_PPI, VERSAL_GIC_MAINT_IRQ,
 127                            GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 128     qemu_fdt_setprop(s->fdt, nodename, "interrupt-controller", NULL, 0);
 129     qemu_fdt_setprop_sized_cells(s->fdt, nodename, "reg",
 130                                  2, MM_GIC_APU_DIST_MAIN,
 131                                  2, MM_GIC_APU_DIST_MAIN_SIZE,
 132                                  2, MM_GIC_APU_REDIST_0,
 133                                  2, MM_GIC_APU_REDIST_0_SIZE);
 134     qemu_fdt_setprop_cell(s->fdt, nodename, "#interrupt-cells", 3);
 135     qemu_fdt_setprop_string(s->fdt, nodename, "compatible", "arm,gic-v3");
 136     g_free(nodename);
 137 }
 138
 139 static void fdt_add_timer_nodes(VersalVirt *s)
 140 {
 141     const char compat[] = "arm,armv8-timer";
 142     uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI;
 143
 144     qemu_fdt_add_subnode(s->fdt, "/timer");
 145     qemu_fdt_setprop_cells(s->fdt, "/timer", "interrupts",
 146             GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_S_EL1_IRQ, irqflags,
 147             GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL1_IRQ, irqflags,
 148             GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_VIRT_IRQ, irqflags,
 149             GIC_FDT_IRQ_TYPE_PPI, VERSAL_TIMER_NS_EL2_IRQ, irqflags);
 150     qemu_fdt_setprop(s->fdt, "/timer", "compatible",
 151                      compat, sizeof(compat));
 152 }
 153
 154 static void fdt_add_usb_xhci_nodes(VersalVirt *s)
 155 {
 156     const char clocknames[] = "bus_clk\0ref_clk";
 157     const char irq_name[] = "dwc_usb3";
 158     const char compatVersalDWC3[] = "xlnx,versal-dwc3";
 159     const char compatDWC3[] = "snps,dwc3";
 160     char *name = g_strdup_printf("/usb@%" PRIx32, MM_USB2_CTRL_REGS);
 161
 162     qemu_fdt_add_subnode(s->fdt, name);
 163     qemu_fdt_setprop(s->fdt, name, "compatible",
 164                          compatVersalDWC3, sizeof(compatVersalDWC3));
 165     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 166                                  2, MM_USB2_CTRL_REGS,
 167                                  2, MM_USB2_CTRL_REGS_SIZE);
 168     qemu_fdt_setprop(s->fdt, name, "clock-names",
 169                          clocknames, sizeof(clocknames));
 170     qemu_fdt_setprop_cells(s->fdt, name, "clocks",
 171                                s->phandle.clk_25Mhz, s->phandle.clk_125Mhz);
 172     qemu_fdt_setprop(s->fdt, name, "ranges", NULL, 0);
 173     qemu_fdt_setprop_cell(s->fdt, name, "#address-cells", 2);
 174     qemu_fdt_setprop_cell(s->fdt, name, "#size-cells", 2);
 175     qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.usb);
 176     g_free(name);
 177
 178     name = g_strdup_printf("/usb@%" PRIx32 "/dwc3@%" PRIx32,
 179                            MM_USB2_CTRL_REGS, MM_USB_0);
 180     qemu_fdt_add_subnode(s->fdt, name);
 181     qemu_fdt_setprop(s->fdt, name, "compatible",
 182                      compatDWC3, sizeof(compatDWC3));
 183     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 184                                  2, MM_USB_0, 2, MM_USB_0_SIZE);
 185     qemu_fdt_setprop(s->fdt, name, "interrupt-names",
 186                      irq_name, sizeof(irq_name));
 187     qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 188                                GIC_FDT_IRQ_TYPE_SPI, VERSAL_USB0_IRQ_0,
 189                                GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 190     qemu_fdt_setprop_cell(s->fdt, name,
 191                           "snps,quirk-frame-length-adjustment", 0x20);
 192     qemu_fdt_setprop_cells(s->fdt, name, "#stream-id-cells", 1);
 193     qemu_fdt_setprop_string(s->fdt, name, "dr_mode", "host");
 194     qemu_fdt_setprop_string(s->fdt, name, "phy-names", "usb3-phy");
 195     qemu_fdt_setprop(s->fdt, name, "snps,dis_u2_susphy_quirk", NULL, 0);
 196     qemu_fdt_setprop(s->fdt, name, "snps,dis_u3_susphy_quirk", NULL, 0);
 197     qemu_fdt_setprop(s->fdt, name, "snps,refclk_fladj", NULL, 0);
 198     qemu_fdt_setprop(s->fdt, name, "snps,mask_phy_reset", NULL, 0);
 199     qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc);
 200     qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed");
 201     g_free(name);
 202 }
 203
 204 static void fdt_add_uart_nodes(VersalVirt *s)
 205 {
 206     uint64_t addrs[] = { MM_UART1, MM_UART0 };
 207     unsigned int irqs[] = { VERSAL_UART1_IRQ_0, VERSAL_UART0_IRQ_0 };
 208     const char compat[] = "arm,pl011\0arm,sbsa-uart";
 209     const char clocknames[] = "uartclk\0apb_pclk";
 210     int i;
 211
 212     for (i = 0; i < ARRAY_SIZE(addrs); i++) {
 213         char *name = g_strdup_printf("/uart@%" PRIx64, addrs[i]);
 214         qemu_fdt_add_subnode(s->fdt, name);
 215         qemu_fdt_setprop_cell(s->fdt, name, "current-speed", 115200);
 216         qemu_fdt_setprop_cells(s->fdt, name, "clocks",
 217                                s->phandle.clk_125Mhz, s->phandle.clk_125Mhz);
 218         qemu_fdt_setprop(s->fdt, name, "clock-names",
 219                          clocknames, sizeof(clocknames));
 220
 221         qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 222                                GIC_FDT_IRQ_TYPE_SPI, irqs[i],
 223                                GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 224         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 225                                      2, addrs[i], 2, 0x1000);
 226         qemu_fdt_setprop(s->fdt, name, "compatible",
 227                          compat, sizeof(compat));
 228         qemu_fdt_setprop(s->fdt, name, "u-boot,dm-pre-reloc", NULL, 0);
 229
 230         if (addrs[i] == MM_UART0) {
 231             /* Select UART0.  */
 232             qemu_fdt_setprop_string(s->fdt, "/chosen", "stdout-path", name);
 233         }
 234         g_free(name);
 235     }
 236 }
 237
 238 static void fdt_add_fixed_link_nodes(VersalVirt *s, char *gemname,
 239                                      uint32_t phandle)
 240 {
 241     char *name = g_strdup_printf("%s/fixed-link", gemname);
 242
 243     qemu_fdt_add_subnode(s->fdt, name);
 244     qemu_fdt_setprop_cell(s->fdt, name, "phandle", phandle);
 245     qemu_fdt_setprop(s->fdt, name, "full-duplex", NULL, 0);
 246     qemu_fdt_setprop_cell(s->fdt, name, "speed", 1000);
 247     g_free(name);
 248 }
 249
 250 static void fdt_add_gem_nodes(VersalVirt *s)
 251 {
 252     uint64_t addrs[] = { MM_GEM1, MM_GEM0 };
 253     unsigned int irqs[] = { VERSAL_GEM1_IRQ_0, VERSAL_GEM0_IRQ_0 };
 254     const char clocknames[] = "pclk\0hclk\0tx_clk\0rx_clk";
 255     const char compat_gem[] = "cdns,zynqmp-gem\0cdns,gem";
 256     int i;
 257
 258     for (i = 0; i < ARRAY_SIZE(addrs); i++) {
 259         char *name = g_strdup_printf("/ethernet@%" PRIx64, addrs[i]);
 260         qemu_fdt_add_subnode(s->fdt, name);
 261
 262         fdt_add_fixed_link_nodes(s, name, s->phandle.ethernet_phy[i]);
 263         qemu_fdt_setprop_string(s->fdt, name, "phy-mode", "rgmii-id");
 264         qemu_fdt_setprop_cell(s->fdt, name, "phy-handle",
 265                               s->phandle.ethernet_phy[i]);
 266         qemu_fdt_setprop_cells(s->fdt, name, "clocks",
 267                                s->phandle.clk_25Mhz, s->phandle.clk_25Mhz,
 268                                s->phandle.clk_125Mhz, s->phandle.clk_125Mhz);
 269         qemu_fdt_setprop(s->fdt, name, "clock-names",
 270                          clocknames, sizeof(clocknames));
 271         qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 272                                GIC_FDT_IRQ_TYPE_SPI, irqs[i],
 273                                GIC_FDT_IRQ_FLAGS_LEVEL_HI,
 274                                GIC_FDT_IRQ_TYPE_SPI, irqs[i],
 275                                GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 276         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 277                                      2, addrs[i], 2, 0x1000);
 278         qemu_fdt_setprop(s->fdt, name, "compatible",
 279                          compat_gem, sizeof(compat_gem));
 280         qemu_fdt_setprop_cell(s->fdt, name, "#address-cells", 1);
 281         qemu_fdt_setprop_cell(s->fdt, name, "#size-cells", 0);
 282         g_free(name);
 283     }
 284 }
 285
 286 static void fdt_add_zdma_nodes(VersalVirt *s)
 287 {
 288     const char clocknames[] = "clk_main\0clk_apb";
 289     const char compat[] = "xlnx,zynqmp-dma-1.0";
 290     int i;
 291
 292     for (i = XLNX_VERSAL_NR_ADMAS - 1; i >= 0; i--) {
 293         uint64_t addr = MM_ADMA_CH0 + MM_ADMA_CH0_SIZE * i;
 294         char *name = g_strdup_printf("/dma@%" PRIx64, addr);
 295
 296         qemu_fdt_add_subnode(s->fdt, name);
 297
 298         qemu_fdt_setprop_cell(s->fdt, name, "xlnx,bus-width", 64);
 299         qemu_fdt_setprop_cells(s->fdt, name, "clocks",
 300                                s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
 301         qemu_fdt_setprop(s->fdt, name, "clock-names",
 302                          clocknames, sizeof(clocknames));
 303         qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 304                                GIC_FDT_IRQ_TYPE_SPI, VERSAL_ADMA_IRQ_0 + i,
 305                                GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 306         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 307                                      2, addr, 2, 0x1000);
 308         qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 309         g_free(name);
 310     }
 311 }
 312
 313 static void fdt_add_sd_nodes(VersalVirt *s)
 314 {
 315     const char clocknames[] = "clk_xin\0clk_ahb";
 316     const char compat[] = "arasan,sdhci-8.9a";
 317     int i;
 318
 319     for (i = ARRAY_SIZE(s->soc.pmc.iou.sd) - 1; i >= 0; i--) {
 320         uint64_t addr = MM_PMC_SD0 + MM_PMC_SD0_SIZE * i;
 321         char *name = g_strdup_printf("/sdhci@%" PRIx64, addr);
 322
 323         qemu_fdt_add_subnode(s->fdt, name);
 324
 325         qemu_fdt_setprop_cells(s->fdt, name, "clocks",
 326                                s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
 327         qemu_fdt_setprop(s->fdt, name, "clock-names",
 328                          clocknames, sizeof(clocknames));
 329         qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 330                                GIC_FDT_IRQ_TYPE_SPI, VERSAL_SD0_IRQ_0 + i * 2,
 331                                GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 332         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 333                                      2, addr, 2, MM_PMC_SD0_SIZE);
 334         qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 335         g_free(name);
 336     }
 337 }
 338
 339 static void fdt_add_rtc_node(VersalVirt *s)
 340 {
 341     const char compat[] = "xlnx,zynqmp-rtc";
 342     const char interrupt_names[] = "alarm\0sec";
 343     char *name = g_strdup_printf("/rtc@%x", MM_PMC_RTC);
 344
 345     qemu_fdt_add_subnode(s->fdt, name);
 346
 347     qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 348                            GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_ALARM_IRQ,
 349                            GIC_FDT_IRQ_FLAGS_LEVEL_HI,
 350                            GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_SECONDS_IRQ,
 351                            GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 352     qemu_fdt_setprop(s->fdt, name, "interrupt-names",
 353                      interrupt_names, sizeof(interrupt_names));
 354     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 355                                  2, MM_PMC_RTC, 2, MM_PMC_RTC_SIZE);
 356     qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 357     g_free(name);
 358 }
 359
 360 static void fdt_add_bbram_node(VersalVirt *s)
 361 {
 362     const char compat[] = TYPE_XLNX_BBRAM;
 363     const char interrupt_names[] = "bbram-error";
 364     char *name = g_strdup_printf("/bbram@%x", MM_PMC_BBRAM_CTRL);
 365
 366     qemu_fdt_add_subnode(s->fdt, name);
 367
 368     qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 369                            GIC_FDT_IRQ_TYPE_SPI, VERSAL_PMC_APB_IRQ,
 370                            GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 371     qemu_fdt_setprop(s->fdt, name, "interrupt-names",
 372                      interrupt_names, sizeof(interrupt_names));
 373     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 374                                  2, MM_PMC_BBRAM_CTRL,
 375                                  2, MM_PMC_BBRAM_CTRL_SIZE);
 376     qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 377     g_free(name);
 378 }
 379
 380 static void fdt_add_efuse_ctrl_node(VersalVirt *s)
 381 {
 382     const char compat[] = TYPE_XLNX_VERSAL_EFUSE_CTRL;
 383     const char interrupt_names[] = "pmc_efuse";
 384     char *name = g_strdup_printf("/pmc_efuse@%x", MM_PMC_EFUSE_CTRL);
 385
 386     qemu_fdt_add_subnode(s->fdt, name);
 387
 388     qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 389                            GIC_FDT_IRQ_TYPE_SPI, VERSAL_EFUSE_IRQ,
 390                            GIC_FDT_IRQ_FLAGS_LEVEL_HI);
 391     qemu_fdt_setprop(s->fdt, name, "interrupt-names",
 392                      interrupt_names, sizeof(interrupt_names));
 393     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 394                                  2, MM_PMC_EFUSE_CTRL,
 395                                  2, MM_PMC_EFUSE_CTRL_SIZE);
 396     qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 397     g_free(name);
 398 }
 399
 400 static void fdt_add_efuse_cache_node(VersalVirt *s)
 401 {
 402     const char compat[] = TYPE_XLNX_VERSAL_EFUSE_CACHE;
 403     char *name = g_strdup_printf("/xlnx_pmc_efuse_cache@%x",
 404                                  MM_PMC_EFUSE_CACHE);
 405
 406     qemu_fdt_add_subnode(s->fdt, name);
 407
 408     qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 409                                  2, MM_PMC_EFUSE_CACHE,
 410                                  2, MM_PMC_EFUSE_CACHE_SIZE);
 411     qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
 412     g_free(name);
 413 }
 414
 415 static void fdt_nop_memory_nodes(void *fdt, Error **errp)
 416 {
 417     Error *err = NULL;
 418     char **node_path;
 419     int n = 0;
 420
 421     node_path = qemu_fdt_node_unit_path(fdt, "memory", &err);
 422     if (err) {
 423         error_propagate(errp, err);
 424         return;
 425     }
 426     while (node_path[n]) {
 427         if (g_str_has_prefix(node_path[n], "/memory")) {
 428             qemu_fdt_nop_node(fdt, node_path[n]);
 429         }
 430         n++;
 431     }
 432     g_strfreev(node_path);
 433 }
 434
 435 static void fdt_add_memory_nodes(VersalVirt *s, void *fdt, uint64_t ram_size)
 436 {
 437     /* Describes the various split DDR access regions.  */
 438     static const struct {
 439         uint64_t base;
 440         uint64_t size;
 441     } addr_ranges[] = {
 442         { MM_TOP_DDR, MM_TOP_DDR_SIZE },
 443         { MM_TOP_DDR_2, MM_TOP_DDR_2_SIZE },
 444         { MM_TOP_DDR_3, MM_TOP_DDR_3_SIZE },
 445         { MM_TOP_DDR_4, MM_TOP_DDR_4_SIZE }
 446     };
 447     uint64_t mem_reg_prop[8] = {0};
 448     uint64_t size = ram_size;
 449     Error *err = NULL;
 450     char *name;
 451     int i;
 452
 453     fdt_nop_memory_nodes(fdt, &err);
 454     if (err) {
 455         error_report_err(err);
 456         return;
 457     }
 458
 459     name = g_strdup_printf("/memory@%x", MM_TOP_DDR);
 460     for (i = 0; i < ARRAY_SIZE(addr_ranges) && size; i++) {
 461         uint64_t mapsize;
 462
 463         mapsize = size < addr_ranges[i].size ? size : addr_ranges[i].size;
 464
 465         mem_reg_prop[i * 2] = addr_ranges[i].base;
 466         mem_reg_prop[i * 2 + 1] = mapsize;
 467         size -= mapsize;
 468     }
 469     qemu_fdt_add_subnode(fdt, name);
 470     qemu_fdt_setprop_string(fdt, name, "device_type", "memory");
 471
 472     switch (i) {
 473     case 1:
 474         qemu_fdt_setprop_sized_cells(fdt, name, "reg",
 475                                      2, mem_reg_prop[0],
 476                                      2, mem_reg_prop[1]);
 477         break;
 478     case 2:
 479         qemu_fdt_setprop_sized_cells(fdt, name, "reg",
 480                                      2, mem_reg_prop[0],
 481                                      2, mem_reg_prop[1],
 482                                      2, mem_reg_prop[2],
 483                                      2, mem_reg_prop[3]);
 484         break;
 485     case 3:
 486         qemu_fdt_setprop_sized_cells(fdt, name, "reg",
 487                                      2, mem_reg_prop[0],
 488                                      2, mem_reg_prop[1],
 489                                      2, mem_reg_prop[2],
 490                                      2, mem_reg_prop[3],
 491                                      2, mem_reg_prop[4],
 492                                      2, mem_reg_prop[5]);
 493         break;
 494     case 4:
 495         qemu_fdt_setprop_sized_cells(fdt, name, "reg",
 496                                      2, mem_reg_prop[0],
 497                                      2, mem_reg_prop[1],
 498                                      2, mem_reg_prop[2],
 499                                      2, mem_reg_prop[3],
 500                                      2, mem_reg_prop[4],
 501                                      2, mem_reg_prop[5],
 502                                      2, mem_reg_prop[6],
 503                                      2, mem_reg_prop[7]);
 504         break;
 505     default:
 506         g_assert_not_reached();
 507     }
 508     g_free(name);
 509 }
 510
 511 static void versal_virt_modify_dtb(const struct arm_boot_info *binfo,
 512                                     void *fdt)
 513 {
 514     VersalVirt *s = container_of(binfo, VersalVirt, binfo);
 515
 516     fdt_add_memory_nodes(s, fdt, binfo->ram_size);
 517 }
 518
 519 static void *versal_virt_get_dtb(const struct arm_boot_info *binfo,
 520                                   int *fdt_size)
 521 {
 522     const VersalVirt *board = container_of(binfo, VersalVirt, binfo);
 523
 524     *fdt_size = board->fdt_size;
 525     return board->fdt;
 526 }
 527
 528 #define NUM_VIRTIO_TRANSPORT 8
 529 static void create_virtio_regions(VersalVirt *s)
 530 {
 531     int virtio_mmio_size = 0x200;
 532     int i;
 533
 534     for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {
 535         char *name = g_strdup_printf("virtio%d", i);
 536         hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;
 537         int irq = VERSAL_RSVD_IRQ_FIRST + i;
 538         MemoryRegion *mr;
 539         DeviceState *dev;
 540         qemu_irq pic_irq;
 541
 542         pic_irq = qdev_get_gpio_in(DEVICE(&s->soc.fpd.apu.gic), irq);
 543         dev = qdev_new("virtio-mmio");
 544         object_property_add_child(OBJECT(&s->soc), name, OBJECT(dev));
 545         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 546         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic_irq);
 547         mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
 548         memory_region_add_subregion(&s->soc.mr_ps, base, mr);
 549         g_free(name);
 550     }
 551
 552     for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {
 553         hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;
 554         int irq = VERSAL_RSVD_IRQ_FIRST + i;
 555         char *name = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
 556
 557         qemu_fdt_add_subnode(s->fdt, name);
 558         qemu_fdt_setprop(s->fdt, name, "dma-coherent", NULL, 0);
 559         qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
 560                                GIC_FDT_IRQ_TYPE_SPI, irq,
 561                                GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);
 562         qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
 563                                      2, base, 2, virtio_mmio_size);
 564         qemu_fdt_setprop_string(s->fdt, name, "compatible", "virtio,mmio");
 565         g_free(name);
 566     }
 567 }
 568
 569 static void bbram_attach_drive(XlnxBBRam *dev)
 570 {
 571     DriveInfo *dinfo;
 572     BlockBackend *blk;
 573
 574     dinfo = drive_get_by_index(IF_PFLASH, 0);
 575     blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
 576     if (blk) {
 577         qdev_prop_set_drive(DEVICE(dev), "drive", blk);
 578     }
 579 }
 580
 581 static void efuse_attach_drive(XlnxEFuse *dev)
 582 {
 583     DriveInfo *dinfo;
 584     BlockBackend *blk;
 585
 586     dinfo = drive_get_by_index(IF_PFLASH, 1);
 587     blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
 588     if (blk) {
 589         qdev_prop_set_drive(DEVICE(dev), "drive", blk);
 590     }
 591 }
 592
 593 static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
 594 {
 595     BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
 596     DeviceState *card;
 597
 598     card = qdev_new(TYPE_SD_CARD);
 599     object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card));
 600     qdev_prop_set_drive_err(card, "drive", blk, &error_fatal);
 601     qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"),
 602                            &error_fatal);
 603 }
 604
 605 static void versal_virt_init(MachineState *machine)
 606 {
 607     VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(machine);
 608     int psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
 609     int i;
 610
 611     /*
 612      * If the user provides an Operating System to be loaded, we expect them
 613      * to use the -kernel command line option.
 614      *
 615      * Users can load firmware or boot-loaders with the -device loader options.
 616      *
 617      * When loading an OS, we generate a dtb and let arm_load_kernel() select
 618      * where it gets loaded. This dtb will be passed to the kernel in x0.
 619      *
 620      * If there's no -kernel option, we generate a DTB and place it at 0x1000
 621      * for the bootloaders or firmware to pick up.
 622      *
 623      * If users want to provide their own DTB, they can use the -dtb option.
 624      * These dtb's will have their memory nodes modified to match QEMU's
 625      * selected ram_size option before they get passed to the kernel or fw.
 626      *
 627      * When loading an OS, we turn on QEMU's PSCI implementation with SMC
 628      * as the PSCI conduit. When there's no -kernel, we assume the user
 629      * provides EL3 firmware to handle PSCI.
 630      *
 631      * Even if the user provides a kernel filename, arm_load_kernel()
 632      * may suppress PSCI if it's going to boot that guest code at EL3.
 633      */
 634     if (machine->kernel_filename) {
 635         psci_conduit = QEMU_PSCI_CONDUIT_SMC;
 636     }
 637
 638     object_initialize_child(OBJECT(machine), "xlnx-versal", &s->soc,
 639                             TYPE_XLNX_VERSAL);
 640     object_property_set_link(OBJECT(&s->soc), "ddr", OBJECT(machine->ram),
 641                              &error_abort);
 642     sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
 643
 644     fdt_create(s);
 645     create_virtio_regions(s);
 646     fdt_add_gem_nodes(s);
 647     fdt_add_uart_nodes(s);
 648     fdt_add_gic_nodes(s);
 649     fdt_add_timer_nodes(s);
 650     fdt_add_zdma_nodes(s);
 651     fdt_add_usb_xhci_nodes(s);
 652     fdt_add_sd_nodes(s);
 653     fdt_add_rtc_node(s);
 654     fdt_add_bbram_node(s);
 655     fdt_add_efuse_ctrl_node(s);
 656     fdt_add_efuse_cache_node(s);
 657     fdt_add_cpu_nodes(s, psci_conduit);
 658     fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
 659     fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
 660
 661     /* Make the APU cpu address space visible to virtio and other
 662      * modules unaware of multiple address-spaces.  */
 663     memory_region_add_subregion_overlap(get_system_memory(),
 664                                         0, &s->soc.fpd.apu.mr, 0);
 665
 666     /* Attach bbram backend, if given */
 667     bbram_attach_drive(&s->soc.pmc.bbram);
 668
 669     /* Attach efuse backend, if given */
 670     efuse_attach_drive(&s->soc.pmc.efuse);
 671
 672     /* Plugin SD cards.  */
 673     for (i = 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) {
 674         sd_plugin_card(&s->soc.pmc.iou.sd[i],
 675                        drive_get(IF_SD, 0, i));
 676     }
 677
 678     s->binfo.ram_size = machine->ram_size;
 679     s->binfo.loader_start = 0x0;
 680     s->binfo.get_dtb = versal_virt_get_dtb;
 681     s->binfo.modify_dtb = versal_virt_modify_dtb;
 682     s->binfo.psci_conduit = psci_conduit;
 683     if (!machine->kernel_filename) {
 684         /* Some boot-loaders (e.g u-boot) don't like blobs at address 0 (NULL).
 685          * Offset things by 4K.  */
 686         s->binfo.loader_start = 0x1000;
 687         s->binfo.dtb_limit = 0x1000000;
 688     }
 689     arm_load_kernel(&s->soc.fpd.apu.cpu[0], machine, &s->binfo);
 690
 691     for (i = 0; i < XLNX_VERSAL_NUM_OSPI_FLASH; i++) {
 692         BusState *spi_bus;
 693         DeviceState *flash_dev;
 694         qemu_irq cs_line;
 695         DriveInfo *dinfo = drive_get(IF_MTD, 0, i);
 696
 697         spi_bus = qdev_get_child_bus(DEVICE(&s->soc.pmc.iou.ospi), "spi0");
 698
 699         flash_dev = qdev_new("mt35xu01g");
 700         if (dinfo) {
 701             qdev_prop_set_drive_err(flash_dev, "drive",
 702                                     blk_by_legacy_dinfo(dinfo), &error_fatal);
 703         }
 704         qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
 705
 706         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
 707
 708         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.pmc.iou.ospi),
 709                            i + 1, cs_line);
 710     }
 711 }
 712
 713 static void versal_virt_machine_instance_init(Object *obj)
 714 {
 715 }
 716
 717 static void versal_virt_machine_class_init(ObjectClass *oc, void *data)
 718 {
 719     MachineClass *mc = MACHINE_CLASS(oc);
 720
 721     mc->desc = "Xilinx Versal Virtual development board";
 722     mc->init = versal_virt_init;
 723     mc->min_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
 724     mc->max_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
 725     mc->default_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
 726     mc->no_cdrom = true;
 727     mc->default_ram_id = "ddr";
 728 }
 729
 730 static const TypeInfo versal_virt_machine_init_typeinfo = {
 731     .name       = TYPE_XLNX_VERSAL_VIRT_MACHINE,
 732     .parent     = TYPE_MACHINE,
 733     .class_init = versal_virt_machine_class_init,
 734     .instance_init = versal_virt_machine_instance_init,
 735     .instance_size = sizeof(VersalVirt),
 736 };
 737
 738 static void versal_virt_machine_init_register_types(void)
 739 {
 740     type_register_static(&versal_virt_machine_init_typeinfo);
 741 }
 742
 743 type_init(versal_virt_machine_init_register_types)
 744