2 * Copyright (C) 2006 InnoTek Systemberatung GmbH
4 * This file is part of VirtualBox Open Source Edition (OSE), as
5 * available from http://www.virtualbox.org. This file is free software;
6 * you can redistribute it and/or modify it under the terms of the GNU
7 * General Public License as published by the Free Software Foundation,
8 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
9 * distribution. VirtualBox OSE is distributed in the hope that it will
10 * be useful, but WITHOUT ANY WARRANTY of any kind.
12 * If you received this file as part of a commercial VirtualBox
13 * distribution, then only the terms of your commercial VirtualBox
14 * license agreement apply instead of the previous paragraph.
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
20 #include "qemu/osdep.h"
21 #include "hw/audio/soundhw.h"
22 #include "audio/audio.h"
23 #include "hw/pci/pci_device.h"
24 #include "hw/qdev-properties.h"
25 #include "migration/vmstate.h"
26 #include "qemu/module.h"
27 #include "sysemu/dma.h"
28 #include "qom/object.h"
32 #define SR_FIFOE 16 /* rwc */
33 #define SR_BCIS 8 /* rwc */
34 #define SR_LVBCI 4 /* rwc */
35 #define SR_CELV 2 /* ro */
36 #define SR_DCH 1 /* ro */
37 #define SR_VALID_MASK ((1 << 5) - 1)
38 #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
39 #define SR_RO_MASK (SR_DCH | SR_CELV)
40 #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
42 #define CR_IOCE 16 /* rw */
43 #define CR_FEIE 8 /* rw */
44 #define CR_LVBIE 4 /* rw */
45 #define CR_RR 2 /* rw */
46 #define CR_RPBM 1 /* rw */
47 #define CR_VALID_MASK ((1 << 5) - 1)
48 #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
50 #define GC_WR 4 /* rw */
51 #define GC_CR 2 /* rw */
52 #define GC_VALID_MASK ((1 << 6) - 1)
54 #define GS_MD3 (1 << 17) /* rw */
55 #define GS_AD3 (1 << 16) /* rw */
56 #define GS_RCS (1 << 15) /* rwc */
57 #define GS_B3S12 (1 << 14) /* ro */
58 #define GS_B2S12 (1 << 13) /* ro */
59 #define GS_B1S12 (1 << 12) /* ro */
60 #define GS_S1R1 (1 << 11) /* rwc */
61 #define GS_S0R1 (1 << 10) /* rwc */
62 #define GS_S1CR (1 << 9) /* ro */
63 #define GS_S0CR (1 << 8) /* ro */
64 #define GS_MINT (1 << 7) /* ro */
65 #define GS_POINT (1 << 6) /* ro */
66 #define GS_PIINT (1 << 5) /* ro */
67 #define GS_RSRVD ((1 << 4) | (1 << 3))
68 #define GS_MOINT (1 << 2) /* ro */
69 #define GS_MIINT (1 << 1) /* ro */
70 #define GS_GSCI 1 /* rwc */
71 #define GS_RO_MASK (GS_B3S12 | \
82 #define GS_VALID_MASK ((1 << 18) - 1)
83 #define GS_WCLEAR_MASK (GS_RCS | GS_S1R1 | GS_S0R1 | GS_GSCI)
85 #define BD_IOC (1 << 31)
86 #define BD_BUP (1 << 30)
88 #define TYPE_AC97 "AC97"
89 OBJECT_DECLARE_SIMPLE_TYPE(AC97LinkState
, AC97
)
108 typedef struct AC97BusMasterRegs
{
109 uint32_t bdbar
; /* rw 0 */
110 uint8_t civ
; /* ro 0 */
111 uint8_t lvi
; /* rw 0 */
112 uint16_t sr
; /* rw 1 */
113 uint16_t picb
; /* ro 0 */
114 uint8_t piv
; /* ro 0 */
115 uint8_t cr
; /* rw 0 */
116 unsigned int bd_valid
;
120 struct AC97LinkState
{
127 AC97BusMasterRegs bm_regs
[3];
128 uint8_t mixer_data
[256];
130 SWVoiceOut
*voice_po
;
133 uint8_t silence
[128];
136 MemoryRegion io_nabm
;
145 #define dolog(...) AUD_log("ac97", __VA_ARGS__)
150 #define MKREGS(prefix, start) \
152 prefix ## _BDBAR = start, \
153 prefix ## _CIV = start + 4, \
154 prefix ## _LVI = start + 5, \
155 prefix ## _SR = start + 6, \
156 prefix ## _PICB = start + 8, \
157 prefix ## _PIV = start + 10, \
158 prefix ## _CR = start + 11 \
168 MKREGS(PI
, PI_INDEX
* 16);
169 MKREGS(PO
, PO_INDEX
* 16);
170 MKREGS(MC
, MC_INDEX
* 16);
178 #define GET_BM(index) (((index) >> 4) & 3)
180 static void po_callback(void *opaque
, int free
);
181 static void pi_callback(void *opaque
, int avail
);
182 static void mc_callback(void *opaque
, int avail
);
184 static void fetch_bd(AC97LinkState
*s
, AC97BusMasterRegs
*r
)
188 pci_dma_read(&s
->dev
, r
->bdbar
+ r
->civ
* 8, b
, 8);
190 r
->bd
.addr
= le32_to_cpu(*(uint32_t *) &b
[0]) & ~3;
191 r
->bd
.ctl_len
= le32_to_cpu(*(uint32_t *) &b
[4]);
192 r
->picb
= r
->bd
.ctl_len
& 0xffff;
193 dolog("bd %2d addr=0x%x ctl=0x%06x len=0x%x(%d bytes)\n",
194 r
->civ
, r
->bd
.addr
, r
->bd
.ctl_len
>> 16,
195 r
->bd
.ctl_len
& 0xffff, (r
->bd
.ctl_len
& 0xffff) << 1);
198 static void update_sr(AC97LinkState
*s
, AC97BusMasterRegs
*r
, uint32_t new_sr
)
202 uint32_t new_mask
= new_sr
& SR_INT_MASK
;
203 uint32_t old_mask
= r
->sr
& SR_INT_MASK
;
204 uint32_t masks
[] = {GS_PIINT
, GS_POINT
, GS_MINT
};
206 if (new_mask
^ old_mask
) {
207 /** @todo is IRQ deasserted when only one of status bits is cleared? */
212 if ((new_mask
& SR_LVBCI
) && (r
->cr
& CR_LVBIE
)) {
216 if ((new_mask
& SR_BCIS
) && (r
->cr
& CR_IOCE
)) {
225 dolog("IOC%d LVB%d sr=0x%x event=%d level=%d\n",
226 r
->sr
& SR_BCIS
, r
->sr
& SR_LVBCI
, r
->sr
, event
, level
);
233 s
->glob_sta
|= masks
[r
- s
->bm_regs
];
234 dolog("set irq level=1\n");
235 pci_irq_assert(&s
->dev
);
237 s
->glob_sta
&= ~masks
[r
- s
->bm_regs
];
238 dolog("set irq level=0\n");
239 pci_irq_deassert(&s
->dev
);
243 static void voice_set_active(AC97LinkState
*s
, int bm_index
, int on
)
247 AUD_set_active_in(s
->voice_pi
, on
);
251 AUD_set_active_out(s
->voice_po
, on
);
255 AUD_set_active_in(s
->voice_mc
, on
);
259 AUD_log("ac97", "invalid bm_index(%d) in voice_set_active", bm_index
);
264 static void reset_bm_regs(AC97LinkState
*s
, AC97BusMasterRegs
*r
)
266 dolog("reset_bm_regs\n");
270 /** todo do we need to do that? */
271 update_sr(s
, r
, SR_DCH
);
274 r
->cr
= r
->cr
& CR_DONT_CLEAR_MASK
;
277 voice_set_active(s
, r
- s
->bm_regs
, 0);
278 memset(s
->silence
, 0, sizeof(s
->silence
));
281 static void mixer_store(AC97LinkState
*s
, uint32_t i
, uint16_t v
)
283 if (i
+ 2 > sizeof(s
->mixer_data
)) {
284 dolog("mixer_store: index %d out of bounds %zd\n",
285 i
, sizeof(s
->mixer_data
));
289 s
->mixer_data
[i
+ 0] = v
& 0xff;
290 s
->mixer_data
[i
+ 1] = v
>> 8;
293 static uint16_t mixer_load(AC97LinkState
*s
, uint32_t i
)
295 uint16_t val
= 0xffff;
297 if (i
+ 2 > sizeof(s
->mixer_data
)) {
298 dolog("mixer_load: index %d out of bounds %zd\n",
299 i
, sizeof(s
->mixer_data
));
301 val
= s
->mixer_data
[i
+ 0] | (s
->mixer_data
[i
+ 1] << 8);
307 static void open_voice(AC97LinkState
*s
, int index
, int freq
)
309 struct audsettings as
;
313 as
.fmt
= AUDIO_FORMAT_S16
;
317 s
->invalid_freq
[index
] = 0;
320 s
->voice_pi
= AUD_open_in(
331 s
->voice_po
= AUD_open_out(
342 s
->voice_mc
= AUD_open_in(
353 s
->invalid_freq
[index
] = freq
;
356 AUD_close_in(&s
->card
, s
->voice_pi
);
361 AUD_close_out(&s
->card
, s
->voice_po
);
366 AUD_close_in(&s
->card
, s
->voice_mc
);
373 static void reset_voices(AC97LinkState
*s
, uint8_t active
[LAST_INDEX
])
377 freq
= mixer_load(s
, AC97_PCM_LR_ADC_Rate
);
378 open_voice(s
, PI_INDEX
, freq
);
379 AUD_set_active_in(s
->voice_pi
, active
[PI_INDEX
]);
381 freq
= mixer_load(s
, AC97_PCM_Front_DAC_Rate
);
382 open_voice(s
, PO_INDEX
, freq
);
383 AUD_set_active_out(s
->voice_po
, active
[PO_INDEX
]);
385 freq
= mixer_load(s
, AC97_MIC_ADC_Rate
);
386 open_voice(s
, MC_INDEX
, freq
);
387 AUD_set_active_in(s
->voice_mc
, active
[MC_INDEX
]);
390 static void get_volume(uint16_t vol
, uint16_t mask
, int inverse
,
391 int *mute
, uint8_t *lvol
, uint8_t *rvol
)
393 *mute
= (vol
>> MUTE_SHIFT
) & 1;
394 *rvol
= (255 * (vol
& mask
)) / mask
;
395 *lvol
= (255 * ((vol
>> 8) & mask
)) / mask
;
403 static void update_combined_volume_out(AC97LinkState
*s
)
405 uint8_t lvol
, rvol
, plvol
, prvol
;
408 get_volume(mixer_load(s
, AC97_Master_Volume_Mute
), 0x3f, 1,
409 &mute
, &lvol
, &rvol
);
410 get_volume(mixer_load(s
, AC97_PCM_Out_Volume_Mute
), 0x1f, 1,
411 &pmute
, &plvol
, &prvol
);
414 lvol
= (lvol
* plvol
) / 255;
415 rvol
= (rvol
* prvol
) / 255;
417 AUD_set_volume_out(s
->voice_po
, mute
, lvol
, rvol
);
420 static void update_volume_in(AC97LinkState
*s
)
425 get_volume(mixer_load(s
, AC97_Record_Gain_Mute
), 0x0f, 0,
426 &mute
, &lvol
, &rvol
);
428 AUD_set_volume_in(s
->voice_pi
, mute
, lvol
, rvol
);
431 static void set_volume(AC97LinkState
*s
, int index
, uint32_t val
)
434 case AC97_Master_Volume_Mute
:
436 mixer_store(s
, index
, val
);
437 update_combined_volume_out(s
);
439 case AC97_PCM_Out_Volume_Mute
:
441 mixer_store(s
, index
, val
);
442 update_combined_volume_out(s
);
444 case AC97_Record_Gain_Mute
:
446 mixer_store(s
, index
, val
);
452 static void record_select(AC97LinkState
*s
, uint32_t val
)
454 uint8_t rs
= val
& REC_MASK
;
455 uint8_t ls
= (val
>> 8) & REC_MASK
;
456 mixer_store(s
, AC97_Record_Select
, rs
| (ls
<< 8));
459 static void mixer_reset(AC97LinkState
*s
)
461 uint8_t active
[LAST_INDEX
];
463 dolog("mixer_reset\n");
464 memset(s
->mixer_data
, 0, sizeof(s
->mixer_data
));
465 memset(active
, 0, sizeof(active
));
466 mixer_store(s
, AC97_Reset
, 0x0000); /* 6940 */
467 mixer_store(s
, AC97_Headphone_Volume_Mute
, 0x0000);
468 mixer_store(s
, AC97_Master_Volume_Mono_Mute
, 0x0000);
469 mixer_store(s
, AC97_Master_Tone_RL
, 0x0000);
470 mixer_store(s
, AC97_PC_BEEP_Volume_Mute
, 0x0000);
471 mixer_store(s
, AC97_Phone_Volume_Mute
, 0x0000);
472 mixer_store(s
, AC97_Mic_Volume_Mute
, 0x0000);
473 mixer_store(s
, AC97_Line_In_Volume_Mute
, 0x0000);
474 mixer_store(s
, AC97_CD_Volume_Mute
, 0x0000);
475 mixer_store(s
, AC97_Video_Volume_Mute
, 0x0000);
476 mixer_store(s
, AC97_Aux_Volume_Mute
, 0x0000);
477 mixer_store(s
, AC97_Record_Gain_Mic_Mute
, 0x0000);
478 mixer_store(s
, AC97_General_Purpose
, 0x0000);
479 mixer_store(s
, AC97_3D_Control
, 0x0000);
480 mixer_store(s
, AC97_Powerdown_Ctrl_Stat
, 0x000f);
483 * Sigmatel 9700 (STAC9700)
485 mixer_store(s
, AC97_Vendor_ID1
, 0x8384);
486 mixer_store(s
, AC97_Vendor_ID2
, 0x7600); /* 7608 */
488 mixer_store(s
, AC97_Extended_Audio_ID
, 0x0809);
489 mixer_store(s
, AC97_Extended_Audio_Ctrl_Stat
, 0x0009);
490 mixer_store(s
, AC97_PCM_Front_DAC_Rate
, 0xbb80);
491 mixer_store(s
, AC97_PCM_Surround_DAC_Rate
, 0xbb80);
492 mixer_store(s
, AC97_PCM_LFE_DAC_Rate
, 0xbb80);
493 mixer_store(s
, AC97_PCM_LR_ADC_Rate
, 0xbb80);
494 mixer_store(s
, AC97_MIC_ADC_Rate
, 0xbb80);
497 set_volume(s
, AC97_Master_Volume_Mute
, 0x8000);
498 set_volume(s
, AC97_PCM_Out_Volume_Mute
, 0x8808);
499 set_volume(s
, AC97_Record_Gain_Mute
, 0x8808);
501 reset_voices(s
, active
);
508 static uint32_t nam_readb(void *opaque
, uint32_t addr
)
510 AC97LinkState
*s
= opaque
;
511 dolog("U nam readb 0x%x\n", addr
);
516 static uint32_t nam_readw(void *opaque
, uint32_t addr
)
518 AC97LinkState
*s
= opaque
;
520 return mixer_load(s
, addr
);
523 static uint32_t nam_readl(void *opaque
, uint32_t addr
)
525 AC97LinkState
*s
= opaque
;
526 dolog("U nam readl 0x%x\n", addr
);
535 static void nam_writeb(void *opaque
, uint32_t addr
, uint32_t val
)
537 AC97LinkState
*s
= opaque
;
538 dolog("U nam writeb 0x%x <- 0x%x\n", addr
, val
);
542 static void nam_writew(void *opaque
, uint32_t addr
, uint32_t val
)
544 AC97LinkState
*s
= opaque
;
551 case AC97_Powerdown_Ctrl_Stat
:
553 val
|= mixer_load(s
, addr
) & 0xf;
554 mixer_store(s
, addr
, val
);
556 case AC97_PCM_Out_Volume_Mute
:
557 case AC97_Master_Volume_Mute
:
558 case AC97_Record_Gain_Mute
:
559 set_volume(s
, addr
, val
);
561 case AC97_Record_Select
:
562 record_select(s
, val
);
564 case AC97_Vendor_ID1
:
565 case AC97_Vendor_ID2
:
566 dolog("Attempt to write vendor ID to 0x%x\n", val
);
568 case AC97_Extended_Audio_ID
:
569 dolog("Attempt to write extended audio ID to 0x%x\n", val
);
571 case AC97_Extended_Audio_Ctrl_Stat
:
572 if (!(val
& EACS_VRA
)) {
573 mixer_store(s
, AC97_PCM_Front_DAC_Rate
, 0xbb80);
574 mixer_store(s
, AC97_PCM_LR_ADC_Rate
, 0xbb80);
575 open_voice(s
, PI_INDEX
, 48000);
576 open_voice(s
, PO_INDEX
, 48000);
578 if (!(val
& EACS_VRM
)) {
579 mixer_store(s
, AC97_MIC_ADC_Rate
, 0xbb80);
580 open_voice(s
, MC_INDEX
, 48000);
582 dolog("Setting extended audio control to 0x%x\n", val
);
583 mixer_store(s
, AC97_Extended_Audio_Ctrl_Stat
, val
);
585 case AC97_PCM_Front_DAC_Rate
:
586 if (mixer_load(s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRA
) {
587 mixer_store(s
, addr
, val
);
588 dolog("Set front DAC rate to %d\n", val
);
589 open_voice(s
, PO_INDEX
, val
);
591 dolog("Attempt to set front DAC rate to %d, but VRA is not set\n",
595 case AC97_MIC_ADC_Rate
:
596 if (mixer_load(s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRM
) {
597 mixer_store(s
, addr
, val
);
598 dolog("Set MIC ADC rate to %d\n", val
);
599 open_voice(s
, MC_INDEX
, val
);
601 dolog("Attempt to set MIC ADC rate to %d, but VRM is not set\n",
605 case AC97_PCM_LR_ADC_Rate
:
606 if (mixer_load(s
, AC97_Extended_Audio_Ctrl_Stat
) & EACS_VRA
) {
607 mixer_store(s
, addr
, val
);
608 dolog("Set front LR ADC rate to %d\n", val
);
609 open_voice(s
, PI_INDEX
, val
);
611 dolog("Attempt to set LR ADC rate to %d, but VRA is not set\n",
615 case AC97_Headphone_Volume_Mute
:
616 case AC97_Master_Volume_Mono_Mute
:
617 case AC97_Master_Tone_RL
:
618 case AC97_PC_BEEP_Volume_Mute
:
619 case AC97_Phone_Volume_Mute
:
620 case AC97_Mic_Volume_Mute
:
621 case AC97_Line_In_Volume_Mute
:
622 case AC97_CD_Volume_Mute
:
623 case AC97_Video_Volume_Mute
:
624 case AC97_Aux_Volume_Mute
:
625 case AC97_Record_Gain_Mic_Mute
:
626 case AC97_General_Purpose
:
627 case AC97_3D_Control
:
628 case AC97_Sigmatel_Analog
:
629 case AC97_Sigmatel_Dac2Invert
:
630 /* None of the features in these regs are emulated, so they are RO */
633 dolog("U nam writew 0x%x <- 0x%x\n", addr
, val
);
634 mixer_store(s
, addr
, val
);
639 static void nam_writel(void *opaque
, uint32_t addr
, uint32_t val
)
641 AC97LinkState
*s
= opaque
;
642 dolog("U nam writel 0x%x <- 0x%x\n", addr
, val
);
647 * Native audio bus master
650 static uint32_t nabm_readb(void *opaque
, uint32_t addr
)
652 AC97LinkState
*s
= opaque
;
653 AC97BusMasterRegs
*r
= NULL
;
658 dolog("CAS %d\n", s
->cas
);
665 r
= &s
->bm_regs
[GET_BM(addr
)];
667 dolog("CIV[%d] -> 0x%x\n", GET_BM(addr
), val
);
672 r
= &s
->bm_regs
[GET_BM(addr
)];
674 dolog("LVI[%d] -> 0x%x\n", GET_BM(addr
), val
);
679 r
= &s
->bm_regs
[GET_BM(addr
)];
681 dolog("PIV[%d] -> 0x%x\n", GET_BM(addr
), val
);
686 r
= &s
->bm_regs
[GET_BM(addr
)];
688 dolog("CR[%d] -> 0x%x\n", GET_BM(addr
), val
);
693 r
= &s
->bm_regs
[GET_BM(addr
)];
695 dolog("SRb[%d] -> 0x%x\n", GET_BM(addr
), val
);
698 dolog("U nabm readb 0x%x -> 0x%x\n", addr
, val
);
704 static uint32_t nabm_readw(void *opaque
, uint32_t addr
)
706 AC97LinkState
*s
= opaque
;
707 AC97BusMasterRegs
*r
= NULL
;
714 r
= &s
->bm_regs
[GET_BM(addr
)];
716 dolog("SR[%d] -> 0x%x\n", GET_BM(addr
), val
);
721 r
= &s
->bm_regs
[GET_BM(addr
)];
723 dolog("PICB[%d] -> 0x%x\n", GET_BM(addr
), val
);
726 dolog("U nabm readw 0x%x -> 0x%x\n", addr
, val
);
732 static uint32_t nabm_readl(void *opaque
, uint32_t addr
)
734 AC97LinkState
*s
= opaque
;
735 AC97BusMasterRegs
*r
= NULL
;
742 r
= &s
->bm_regs
[GET_BM(addr
)];
744 dolog("BMADDR[%d] -> 0x%x\n", GET_BM(addr
), val
);
749 r
= &s
->bm_regs
[GET_BM(addr
)];
750 val
= r
->civ
| (r
->lvi
<< 8) | (r
->sr
<< 16);
751 dolog("CIV LVI SR[%d] -> 0x%x, 0x%x, 0x%x\n", GET_BM(addr
),
752 r
->civ
, r
->lvi
, r
->sr
);
757 r
= &s
->bm_regs
[GET_BM(addr
)];
758 val
= r
->picb
| (r
->piv
<< 16) | (r
->cr
<< 24);
759 dolog("PICB PIV CR[%d] -> 0x%x 0x%x 0x%x 0x%x\n", GET_BM(addr
),
760 val
, r
->picb
, r
->piv
, r
->cr
);
764 dolog("glob_cnt -> 0x%x\n", val
);
767 val
= s
->glob_sta
| GS_S0CR
;
768 dolog("glob_sta -> 0x%x\n", val
);
771 dolog("U nabm readl 0x%x -> 0x%x\n", addr
, val
);
778 * Native audio bus master
781 static void nabm_writeb(void *opaque
, uint32_t addr
, uint32_t val
)
783 AC97LinkState
*s
= opaque
;
784 AC97BusMasterRegs
*r
= NULL
;
790 r
= &s
->bm_regs
[GET_BM(addr
)];
791 if ((r
->cr
& CR_RPBM
) && (r
->sr
& SR_DCH
)) {
792 r
->sr
&= ~(SR_DCH
| SR_CELV
);
794 r
->piv
= (r
->piv
+ 1) % 32;
798 dolog("LVI[%d] <- 0x%x\n", GET_BM(addr
), val
);
803 r
= &s
->bm_regs
[GET_BM(addr
)];
807 r
->cr
= val
& CR_VALID_MASK
;
808 if (!(r
->cr
& CR_RPBM
)) {
809 voice_set_active(s
, r
- s
->bm_regs
, 0);
813 r
->piv
= (r
->piv
+ 1) % 32;
816 voice_set_active(s
, r
- s
->bm_regs
, 1);
819 dolog("CR[%d] <- 0x%x (cr 0x%x)\n", GET_BM(addr
), val
, r
->cr
);
824 r
= &s
->bm_regs
[GET_BM(addr
)];
825 r
->sr
|= val
& ~(SR_RO_MASK
| SR_WCLEAR_MASK
);
826 update_sr(s
, r
, r
->sr
& ~(val
& SR_WCLEAR_MASK
));
827 dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr
), val
, r
->sr
);
830 dolog("U nabm writeb 0x%x <- 0x%x\n", addr
, val
);
835 static void nabm_writew(void *opaque
, uint32_t addr
, uint32_t val
)
837 AC97LinkState
*s
= opaque
;
838 AC97BusMasterRegs
*r
= NULL
;
844 r
= &s
->bm_regs
[GET_BM(addr
)];
845 r
->sr
|= val
& ~(SR_RO_MASK
| SR_WCLEAR_MASK
);
846 update_sr(s
, r
, r
->sr
& ~(val
& SR_WCLEAR_MASK
));
847 dolog("SR[%d] <- 0x%x (sr 0x%x)\n", GET_BM(addr
), val
, r
->sr
);
850 dolog("U nabm writew 0x%x <- 0x%x\n", addr
, val
);
855 static void nabm_writel(void *opaque
, uint32_t addr
, uint32_t val
)
857 AC97LinkState
*s
= opaque
;
858 AC97BusMasterRegs
*r
= NULL
;
864 r
= &s
->bm_regs
[GET_BM(addr
)];
866 dolog("BDBAR[%d] <- 0x%x (bdbar 0x%x)\n", GET_BM(addr
), val
, r
->bdbar
);
869 /* TODO: Handle WR or CR being set (warm/cold reset requests) */
870 if (!(val
& (GC_WR
| GC_CR
))) {
871 s
->glob_cnt
= val
& GC_VALID_MASK
;
873 dolog("glob_cnt <- 0x%x (glob_cnt 0x%x)\n", val
, s
->glob_cnt
);
876 s
->glob_sta
&= ~(val
& GS_WCLEAR_MASK
);
877 s
->glob_sta
|= (val
& ~(GS_WCLEAR_MASK
| GS_RO_MASK
)) & GS_VALID_MASK
;
878 dolog("glob_sta <- 0x%x (glob_sta 0x%x)\n", val
, s
->glob_sta
);
881 dolog("U nabm writel 0x%x <- 0x%x\n", addr
, val
);
886 static int write_audio(AC97LinkState
*s
, AC97BusMasterRegs
*r
,
889 uint8_t tmpbuf
[4096];
890 uint32_t addr
= r
->bd
.addr
;
891 uint32_t temp
= r
->picb
<< 1;
892 uint32_t written
= 0;
894 temp
= MIN(temp
, max
);
903 to_copy
= MIN(temp
, sizeof(tmpbuf
));
904 pci_dma_read(&s
->dev
, addr
, tmpbuf
, to_copy
);
905 copied
= AUD_write(s
->voice_po
, tmpbuf
, to_copy
);
906 dolog("write_audio max=%x to_copy=%x copied=%x\n",
907 max
, to_copy
, copied
);
922 s
->last_samp
= *(uint32_t *)&tmpbuf
[to_copy
- 4];
930 static void write_bup(AC97LinkState
*s
, int elapsed
)
932 dolog("write_bup\n");
933 if (!(s
->bup_flag
& BUP_SET
)) {
934 if (s
->bup_flag
& BUP_LAST
) {
936 uint8_t *p
= s
->silence
;
937 for (i
= 0; i
< sizeof(s
->silence
) / 4; i
++, p
+= 4) {
938 *(uint32_t *) p
= s
->last_samp
;
941 memset(s
->silence
, 0, sizeof(s
->silence
));
943 s
->bup_flag
|= BUP_SET
;
947 int temp
= MIN(elapsed
, sizeof(s
->silence
));
949 int copied
= AUD_write(s
->voice_po
, s
->silence
, temp
);
959 static int read_audio(AC97LinkState
*s
, AC97BusMasterRegs
*r
,
962 uint8_t tmpbuf
[4096];
963 uint32_t addr
= r
->bd
.addr
;
964 uint32_t temp
= r
->picb
<< 1;
967 SWVoiceIn
*voice
= (r
- s
->bm_regs
) == MC_INDEX
? s
->voice_mc
: s
->voice_pi
;
969 temp
= MIN(temp
, max
);
978 to_copy
= MIN(temp
, sizeof(tmpbuf
));
979 acquired
= AUD_read(voice
, tmpbuf
, to_copy
);
984 pci_dma_write(&s
->dev
, addr
, tmpbuf
, acquired
);
994 static void transfer_audio(AC97LinkState
*s
, int index
, int elapsed
)
996 AC97BusMasterRegs
*r
= &s
->bm_regs
[index
];
999 if (s
->invalid_freq
[index
]) {
1000 AUD_log("ac97", "attempt to use voice %d with invalid frequency %d\n",
1001 index
, s
->invalid_freq
[index
]);
1005 if (r
->sr
& SR_DCH
) {
1006 if (r
->cr
& CR_RPBM
) {
1009 write_bup(s
, elapsed
);
1016 while ((elapsed
>> 1) && !stop
) {
1020 dolog("invalid bd\n");
1025 dolog("fresh bd %d is empty 0x%x 0x%x\n",
1026 r
->civ
, r
->bd
.addr
, r
->bd
.ctl_len
);
1027 if (r
->civ
== r
->lvi
) {
1028 r
->sr
|= SR_DCH
; /* CELV? */
1034 r
->piv
= (r
->piv
+ 1) % 32;
1041 temp
= write_audio(s
, r
, elapsed
, &stop
);
1043 r
->picb
-= (temp
>> 1);
1048 temp
= read_audio(s
, r
, elapsed
, &stop
);
1050 r
->picb
-= (temp
>> 1);
1055 uint32_t new_sr
= r
->sr
& ~SR_CELV
;
1057 if (r
->bd
.ctl_len
& BD_IOC
) {
1061 if (r
->civ
== r
->lvi
) {
1062 dolog("Underrun civ (%d) == lvi (%d)\n", r
->civ
, r
->lvi
);
1064 new_sr
|= SR_LVBCI
| SR_DCH
| SR_CELV
;
1066 s
->bup_flag
= (r
->bd
.ctl_len
& BD_BUP
) ? BUP_LAST
: 0;
1069 r
->piv
= (r
->piv
+ 1) % 32;
1073 update_sr(s
, r
, new_sr
);
1078 static void pi_callback(void *opaque
, int avail
)
1080 transfer_audio(opaque
, PI_INDEX
, avail
);
1083 static void mc_callback(void *opaque
, int avail
)
1085 transfer_audio(opaque
, MC_INDEX
, avail
);
1088 static void po_callback(void *opaque
, int free
)
1090 transfer_audio(opaque
, PO_INDEX
, free
);
1093 static const VMStateDescription vmstate_ac97_bm_regs
= {
1094 .name
= "ac97_bm_regs",
1096 .minimum_version_id
= 1,
1097 .fields
= (VMStateField
[]) {
1098 VMSTATE_UINT32(bdbar
, AC97BusMasterRegs
),
1099 VMSTATE_UINT8(civ
, AC97BusMasterRegs
),
1100 VMSTATE_UINT8(lvi
, AC97BusMasterRegs
),
1101 VMSTATE_UINT16(sr
, AC97BusMasterRegs
),
1102 VMSTATE_UINT16(picb
, AC97BusMasterRegs
),
1103 VMSTATE_UINT8(piv
, AC97BusMasterRegs
),
1104 VMSTATE_UINT8(cr
, AC97BusMasterRegs
),
1105 VMSTATE_UINT32(bd_valid
, AC97BusMasterRegs
),
1106 VMSTATE_UINT32(bd
.addr
, AC97BusMasterRegs
),
1107 VMSTATE_UINT32(bd
.ctl_len
, AC97BusMasterRegs
),
1108 VMSTATE_END_OF_LIST()
1112 static int ac97_post_load(void *opaque
, int version_id
)
1114 uint8_t active
[LAST_INDEX
];
1115 AC97LinkState
*s
= opaque
;
1117 record_select(s
, mixer_load(s
, AC97_Record_Select
));
1118 set_volume(s
, AC97_Master_Volume_Mute
,
1119 mixer_load(s
, AC97_Master_Volume_Mute
));
1120 set_volume(s
, AC97_PCM_Out_Volume_Mute
,
1121 mixer_load(s
, AC97_PCM_Out_Volume_Mute
));
1122 set_volume(s
, AC97_Record_Gain_Mute
,
1123 mixer_load(s
, AC97_Record_Gain_Mute
));
1125 active
[PI_INDEX
] = !!(s
->bm_regs
[PI_INDEX
].cr
& CR_RPBM
);
1126 active
[PO_INDEX
] = !!(s
->bm_regs
[PO_INDEX
].cr
& CR_RPBM
);
1127 active
[MC_INDEX
] = !!(s
->bm_regs
[MC_INDEX
].cr
& CR_RPBM
);
1128 reset_voices(s
, active
);
1135 static bool is_version_2(void *opaque
, int version_id
)
1137 return version_id
== 2;
1140 static const VMStateDescription vmstate_ac97
= {
1143 .minimum_version_id
= 2,
1144 .post_load
= ac97_post_load
,
1145 .fields
= (VMStateField
[]) {
1146 VMSTATE_PCI_DEVICE(dev
, AC97LinkState
),
1147 VMSTATE_UINT32(glob_cnt
, AC97LinkState
),
1148 VMSTATE_UINT32(glob_sta
, AC97LinkState
),
1149 VMSTATE_UINT32(cas
, AC97LinkState
),
1150 VMSTATE_STRUCT_ARRAY(bm_regs
, AC97LinkState
, 3, 1,
1151 vmstate_ac97_bm_regs
, AC97BusMasterRegs
),
1152 VMSTATE_BUFFER(mixer_data
, AC97LinkState
),
1153 VMSTATE_UNUSED_TEST(is_version_2
, 3),
1154 VMSTATE_END_OF_LIST()
1158 static uint64_t nam_read(void *opaque
, hwaddr addr
, unsigned size
)
1160 if ((addr
/ size
) > 256) {
1166 return nam_readb(opaque
, addr
);
1168 return nam_readw(opaque
, addr
);
1170 return nam_readl(opaque
, addr
);
1176 static void nam_write(void *opaque
, hwaddr addr
, uint64_t val
,
1179 if ((addr
/ size
) > 256) {
1185 nam_writeb(opaque
, addr
, val
);
1188 nam_writew(opaque
, addr
, val
);
1191 nam_writel(opaque
, addr
, val
);
1196 static const MemoryRegionOps ac97_io_nam_ops
= {
1200 .min_access_size
= 1,
1201 .max_access_size
= 4,
1203 .endianness
= DEVICE_LITTLE_ENDIAN
,
1206 static uint64_t nabm_read(void *opaque
, hwaddr addr
, unsigned size
)
1208 if ((addr
/ size
) > 64) {
1214 return nabm_readb(opaque
, addr
);
1216 return nabm_readw(opaque
, addr
);
1218 return nabm_readl(opaque
, addr
);
1224 static void nabm_write(void *opaque
, hwaddr addr
, uint64_t val
,
1227 if ((addr
/ size
) > 64) {
1233 nabm_writeb(opaque
, addr
, val
);
1236 nabm_writew(opaque
, addr
, val
);
1239 nabm_writel(opaque
, addr
, val
);
1245 static const MemoryRegionOps ac97_io_nabm_ops
= {
1247 .write
= nabm_write
,
1249 .min_access_size
= 1,
1250 .max_access_size
= 4,
1252 .endianness
= DEVICE_LITTLE_ENDIAN
,
1255 static void ac97_on_reset(DeviceState
*dev
)
1257 AC97LinkState
*s
= AC97(dev
);
1259 reset_bm_regs(s
, &s
->bm_regs
[0]);
1260 reset_bm_regs(s
, &s
->bm_regs
[1]);
1261 reset_bm_regs(s
, &s
->bm_regs
[2]);
1264 * Reset the mixer too. The Windows XP driver seems to rely on
1265 * this. At least it wants to read the vendor id before it resets
1266 * the codec manually.
1271 static void ac97_realize(PCIDevice
*dev
, Error
**errp
)
1273 AC97LinkState
*s
= AC97(dev
);
1274 uint8_t *c
= s
->dev
.config
;
1276 /* TODO: no need to override */
1277 c
[PCI_COMMAND
] = 0x00; /* pcicmd pci command rw, ro */
1278 c
[PCI_COMMAND
+ 1] = 0x00;
1281 c
[PCI_STATUS
] = PCI_STATUS_FAST_BACK
; /* pcists pci status rwc, ro */
1282 c
[PCI_STATUS
+ 1] = PCI_STATUS_DEVSEL_MEDIUM
>> 8;
1284 c
[PCI_CLASS_PROG
] = 0x00; /* pi programming interface ro */
1286 /* TODO set when bar is registered. no need to override. */
1287 /* nabmar native audio mixer base address rw */
1288 c
[PCI_BASE_ADDRESS_0
] = PCI_BASE_ADDRESS_SPACE_IO
;
1289 c
[PCI_BASE_ADDRESS_0
+ 1] = 0x00;
1290 c
[PCI_BASE_ADDRESS_0
+ 2] = 0x00;
1291 c
[PCI_BASE_ADDRESS_0
+ 3] = 0x00;
1293 /* TODO set when bar is registered. no need to override. */
1294 /* nabmbar native audio bus mastering base address rw */
1295 c
[PCI_BASE_ADDRESS_0
+ 4] = PCI_BASE_ADDRESS_SPACE_IO
;
1296 c
[PCI_BASE_ADDRESS_0
+ 5] = 0x00;
1297 c
[PCI_BASE_ADDRESS_0
+ 6] = 0x00;
1298 c
[PCI_BASE_ADDRESS_0
+ 7] = 0x00;
1300 c
[PCI_INTERRUPT_LINE
] = 0x00; /* intr_ln interrupt line rw */
1301 c
[PCI_INTERRUPT_PIN
] = 0x01; /* intr_pn interrupt pin ro */
1303 memory_region_init_io(&s
->io_nam
, OBJECT(s
), &ac97_io_nam_ops
, s
,
1305 memory_region_init_io(&s
->io_nabm
, OBJECT(s
), &ac97_io_nabm_ops
, s
,
1307 pci_register_bar(&s
->dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &s
->io_nam
);
1308 pci_register_bar(&s
->dev
, 1, PCI_BASE_ADDRESS_SPACE_IO
, &s
->io_nabm
);
1309 AUD_register_card("ac97", &s
->card
);
1310 ac97_on_reset(DEVICE(s
));
1313 static void ac97_exit(PCIDevice
*dev
)
1315 AC97LinkState
*s
= AC97(dev
);
1317 AUD_close_in(&s
->card
, s
->voice_pi
);
1318 AUD_close_out(&s
->card
, s
->voice_po
);
1319 AUD_close_in(&s
->card
, s
->voice_mc
);
1320 AUD_remove_card(&s
->card
);
1323 static Property ac97_properties
[] = {
1324 DEFINE_AUDIO_PROPERTIES(AC97LinkState
, card
),
1325 DEFINE_PROP_END_OF_LIST(),
1328 static void ac97_class_init(ObjectClass
*klass
, void *data
)
1330 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1331 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1333 k
->realize
= ac97_realize
;
1334 k
->exit
= ac97_exit
;
1335 k
->vendor_id
= PCI_VENDOR_ID_INTEL
;
1336 k
->device_id
= PCI_DEVICE_ID_INTEL_82801AA_5
;
1338 k
->class_id
= PCI_CLASS_MULTIMEDIA_AUDIO
;
1339 set_bit(DEVICE_CATEGORY_SOUND
, dc
->categories
);
1340 dc
->desc
= "Intel 82801AA AC97 Audio";
1341 dc
->vmsd
= &vmstate_ac97
;
1342 device_class_set_props(dc
, ac97_properties
);
1343 dc
->reset
= ac97_on_reset
;
1346 static const TypeInfo ac97_info
= {
1348 .parent
= TYPE_PCI_DEVICE
,
1349 .instance_size
= sizeof(AC97LinkState
),
1350 .class_init
= ac97_class_init
,
1351 .interfaces
= (InterfaceInfo
[]) {
1352 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
1357 static void ac97_register_types(void)
1359 type_register_static(&ac97_info
);
1360 deprecated_register_soundhw("ac97", "Intel 82801AA AC97 Audio",
1364 type_init(ac97_register_types
)