2 * KVM-based ITS implementation for a GICv3-based system
4 * Copyright (c) 2015 Samsung Electronics Co., Ltd.
5 * Written by Pavel Fedin <p.fedin@samsung.com>
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu/module.h"
24 #include "hw/intc/arm_gicv3_its_common.h"
25 #include "hw/qdev-properties.h"
26 #include "sysemu/runstate.h"
27 #include "sysemu/kvm.h"
29 #include "migration/blocker.h"
30 #include "qom/object.h"
32 #define TYPE_KVM_ARM_ITS "arm-its-kvm"
33 typedef struct KVMARMITSClass KVMARMITSClass
;
34 /* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */
35 DECLARE_OBJ_CHECKERS(GICv3ITSState
, KVMARMITSClass
,
36 KVM_ARM_ITS
, TYPE_KVM_ARM_ITS
)
38 struct KVMARMITSClass
{
39 GICv3ITSCommonClass parent_class
;
40 ResettablePhases parent_phases
;
44 static int kvm_its_send_msi(GICv3ITSState
*s
, uint32_t value
, uint16_t devid
)
48 if (unlikely(!s
->translater_gpa_known
)) {
49 MemoryRegion
*mr
= &s
->iomem_its_translation
;
50 MemoryRegionSection mrs
;
52 mrs
= memory_region_find(mr
, 0, 1);
53 memory_region_unref(mrs
.mr
);
54 s
->gits_translater_gpa
= mrs
.offset_within_address_space
+ 0x40;
55 s
->translater_gpa_known
= true;
58 msi
.address_lo
= extract64(s
->gits_translater_gpa
, 0, 32);
59 msi
.address_hi
= extract64(s
->gits_translater_gpa
, 32, 32);
60 msi
.data
= le32_to_cpu(value
);
61 msi
.flags
= KVM_MSI_VALID_DEVID
;
63 memset(msi
.pad
, 0, sizeof(msi
.pad
));
65 return kvm_vm_ioctl(kvm_state
, KVM_SIGNAL_MSI
, &msi
);
69 * vm_change_state_handler - VM change state callback aiming at flushing
70 * ITS tables into guest RAM
72 * The tables get flushed to guest RAM whenever the VM gets stopped.
74 static void vm_change_state_handler(void *opaque
, bool running
,
77 GICv3ITSState
*s
= (GICv3ITSState
*)opaque
;
84 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
85 KVM_DEV_ARM_ITS_SAVE_TABLES
, NULL
, true, &err
);
87 error_report_err(err
);
91 static void kvm_arm_its_realize(DeviceState
*dev
, Error
**errp
)
93 GICv3ITSState
*s
= ARM_GICV3_ITS_COMMON(dev
);
95 s
->dev_fd
= kvm_create_device(kvm_state
, KVM_DEV_TYPE_ARM_VGIC_ITS
, false);
97 error_setg_errno(errp
, -s
->dev_fd
, "error creating in-kernel ITS");
101 /* explicit init of the ITS */
102 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
103 KVM_DEV_ARM_VGIC_CTRL_INIT
, NULL
, true, &error_abort
);
105 /* register the base address */
106 kvm_arm_register_device(&s
->iomem_its_cntrl
, -1, KVM_DEV_ARM_VGIC_GRP_ADDR
,
107 KVM_VGIC_ITS_ADDR_TYPE
, s
->dev_fd
, 0);
109 gicv3_add_its(s
->gicv3
, dev
);
111 gicv3_its_init_mmio(s
, NULL
, NULL
);
113 if (!kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
115 error_setg(&s
->migration_blocker
, "This operating system kernel "
116 "does not support vITS migration");
117 if (migrate_add_blocker(s
->migration_blocker
, errp
) < 0) {
118 error_free(s
->migration_blocker
);
122 qemu_add_vm_change_state_handler(vm_change_state_handler
, s
);
125 kvm_msi_use_devid
= true;
126 kvm_gsi_direct_mapping
= false;
127 kvm_msi_via_irqfd_allowed
= kvm_irqfds_enabled();
131 * kvm_arm_its_pre_save - handles the saving of ITS registers.
132 * ITS tables are flushed into guest RAM separately and earlier,
133 * through the VM change state handler, since at the moment pre_save()
134 * is called, the guest RAM has already been saved.
136 static void kvm_arm_its_pre_save(GICv3ITSState
*s
)
140 for (i
= 0; i
< 8; i
++) {
141 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
142 GITS_BASER
+ i
* 8, &s
->baser
[i
], false,
146 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
147 GITS_CTLR
, &s
->ctlr
, false, &error_abort
);
149 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
150 GITS_CBASER
, &s
->cbaser
, false, &error_abort
);
152 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
153 GITS_CREADR
, &s
->creadr
, false, &error_abort
);
155 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
156 GITS_CWRITER
, &s
->cwriter
, false, &error_abort
);
158 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
159 GITS_IIDR
, &s
->iidr
, false, &error_abort
);
163 * kvm_arm_its_post_load - Restore both the ITS registers and tables
165 static void kvm_arm_its_post_load(GICv3ITSState
*s
)
169 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
170 GITS_IIDR
, &s
->iidr
, true, &error_abort
);
173 * must be written before GITS_CREADR since GITS_CBASER write
174 * access resets GITS_CREADR.
176 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
177 GITS_CBASER
, &s
->cbaser
, true, &error_abort
);
179 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
180 GITS_CREADR
, &s
->creadr
, true, &error_abort
);
182 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
183 GITS_CWRITER
, &s
->cwriter
, true, &error_abort
);
186 for (i
= 0; i
< 8; i
++) {
187 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
188 GITS_BASER
+ i
* 8, &s
->baser
[i
], true,
192 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
193 KVM_DEV_ARM_ITS_RESTORE_TABLES
, NULL
, true,
196 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
197 GITS_CTLR
, &s
->ctlr
, true, &error_abort
);
200 static void kvm_arm_its_reset_hold(Object
*obj
)
202 GICv3ITSState
*s
= ARM_GICV3_ITS_COMMON(obj
);
203 KVMARMITSClass
*c
= KVM_ARM_ITS_GET_CLASS(s
);
206 if (c
->parent_phases
.hold
) {
207 c
->parent_phases
.hold(obj
);
210 if (kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
211 KVM_DEV_ARM_ITS_CTRL_RESET
)) {
212 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_CTRL
,
213 KVM_DEV_ARM_ITS_CTRL_RESET
, NULL
, true, &error_abort
);
217 warn_report("ITS KVM: full reset is not supported by the host kernel");
219 if (!kvm_device_check_attr(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
224 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
225 GITS_CTLR
, &s
->ctlr
, true, &error_abort
);
227 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
228 GITS_CBASER
, &s
->cbaser
, true, &error_abort
);
230 for (i
= 0; i
< 8; i
++) {
231 kvm_device_access(s
->dev_fd
, KVM_DEV_ARM_VGIC_GRP_ITS_REGS
,
232 GITS_BASER
+ i
* 8, &s
->baser
[i
], true,
237 static Property kvm_arm_its_props
[] = {
238 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState
, gicv3
, "kvm-arm-gicv3",
240 DEFINE_PROP_END_OF_LIST(),
243 static void kvm_arm_its_class_init(ObjectClass
*klass
, void *data
)
245 DeviceClass
*dc
= DEVICE_CLASS(klass
);
246 ResettableClass
*rc
= RESETTABLE_CLASS(klass
);
247 GICv3ITSCommonClass
*icc
= ARM_GICV3_ITS_COMMON_CLASS(klass
);
248 KVMARMITSClass
*ic
= KVM_ARM_ITS_CLASS(klass
);
250 dc
->realize
= kvm_arm_its_realize
;
251 device_class_set_props(dc
, kvm_arm_its_props
);
252 resettable_class_set_parent_phases(rc
, NULL
, kvm_arm_its_reset_hold
, NULL
,
254 icc
->send_msi
= kvm_its_send_msi
;
255 icc
->pre_save
= kvm_arm_its_pre_save
;
256 icc
->post_load
= kvm_arm_its_post_load
;
259 static const TypeInfo kvm_arm_its_info
= {
260 .name
= TYPE_KVM_ARM_ITS
,
261 .parent
= TYPE_ARM_GICV3_ITS_COMMON
,
262 .instance_size
= sizeof(GICv3ITSState
),
263 .class_init
= kvm_arm_its_class_init
,
264 .class_size
= sizeof(KVMARMITSClass
),
267 static void kvm_arm_its_register_types(void)
269 type_register_static(&kvm_arm_its_info
);
272 type_init(kvm_arm_its_register_types
)