target/i386/host-cpu.c

   1 /*
   2  * x86 host CPU functions, and "host" cpu type initialization
   3  *
   4  * Copyright 2021 SUSE LLC
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "cpu.h"
  12 #include "host-cpu.h"
  13 #include "qapi/error.h"
  14 #include "qemu/error-report.h"
  15 #include "sysemu/sysemu.h"
  16
  17 /* Note: Only safe for use on x86(-64) hosts */
  18 static uint32_t host_cpu_phys_bits(void)
  19 {
  20     uint32_t eax;
  21     uint32_t host_phys_bits;
  22
  23     host_cpuid(0x80000000, 0, &eax, NULL, NULL, NULL);
  24     if (eax >= 0x80000008) {
  25         host_cpuid(0x80000008, 0, &eax, NULL, NULL, NULL);
  26         /*
  27          * Note: According to AMD doc 25481 rev 2.34 they have a field
  28          * at 23:16 that can specify a maximum physical address bits for
  29          * the guest that can override this value; but I've not seen
  30          * anything with that set.
  31          */
  32         host_phys_bits = eax & 0xff;
  33     } else {
  34         /*
  35          * It's an odd 64 bit machine that doesn't have the leaf for
  36          * physical address bits; fall back to 36 that's most older
  37          * Intel.
  38          */
  39         host_phys_bits = 36;
  40     }
  41
  42     return host_phys_bits;
  43 }
  44
  45 static void host_cpu_enable_cpu_pm(X86CPU *cpu)
  46 {
  47     CPUX86State *env = &cpu->env;
  48
  49     host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
  50                &cpu->mwait.ecx, &cpu->mwait.edx);
  51     env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
  52 }
  53
  54 static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
  55 {
  56     uint32_t host_phys_bits = host_cpu_phys_bits();
  57     uint32_t phys_bits = cpu->phys_bits;
  58     static bool warned;
  59
  60     /*
  61      * Print a warning if the user set it to a value that's not the
  62      * host value.
  63      */
  64     if (phys_bits != host_phys_bits && phys_bits != 0 &&
  65         !warned) {
  66         warn_report("Host physical bits (%u)"
  67                     " does not match phys-bits property (%u)",
  68                     host_phys_bits, phys_bits);
  69         warned = true;
  70     }
  71
  72     if (cpu->host_phys_bits) {
  73         /* The user asked for us to use the host physical bits */
  74         phys_bits = host_phys_bits;
  75         if (cpu->host_phys_bits_limit &&
  76             phys_bits > cpu->host_phys_bits_limit) {
  77             phys_bits = cpu->host_phys_bits_limit;
  78         }
  79     }
  80
  81     return phys_bits;
  82 }
  83
  84 bool host_cpu_realizefn(CPUState *cs, Error **errp)
  85 {
  86     X86CPU *cpu = X86_CPU(cs);
  87     CPUX86State *env = &cpu->env;
  88
  89     if (cpu->max_features && enable_cpu_pm) {
  90         host_cpu_enable_cpu_pm(cpu);
  91     }
  92     if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
  93         uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);
  94
  95         if (phys_bits &&
  96             (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
  97              phys_bits < 32)) {
  98             error_setg(errp, "phys-bits should be between 32 and %u "
  99                        " (but is %u)",
 100                        TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
 101             return false;
 102         }
 103         cpu->phys_bits = phys_bits;
 104     }
 105     return true;
 106 }
 107
 108 #define CPUID_MODEL_ID_SZ 48
 109 /**
 110  * cpu_x86_fill_model_id:
 111  * Get CPUID model ID string from host CPU.
 112  *
 113  * @str should have at least CPUID_MODEL_ID_SZ bytes
 114  *
 115  * The function does NOT add a null terminator to the string
 116  * automatically.
 117  */
 118 static int host_cpu_fill_model_id(char *str)
 119 {
 120     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 121     int i;
 122
 123     for (i = 0; i < 3; i++) {
 124         host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
 125         memcpy(str + i * 16 +  0, &eax, 4);
 126         memcpy(str + i * 16 +  4, &ebx, 4);
 127         memcpy(str + i * 16 +  8, &ecx, 4);
 128         memcpy(str + i * 16 + 12, &edx, 4);
 129     }
 130     return 0;
 131 }
 132
 133 void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepping)
 134 {
 135     uint32_t eax, ebx, ecx, edx;
 136
 137     host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
 138     x86_cpu_vendor_words2str(vendor, ebx, edx, ecx);
 139
 140     host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
 141     if (family) {
 142         *family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
 143     }
 144     if (model) {
 145         *model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
 146     }
 147     if (stepping) {
 148         *stepping = eax & 0x0F;
 149     }
 150 }
 151
 152 void host_cpu_instance_init(X86CPU *cpu)
 153 {
 154     X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
 155
 156     if (xcc->model) {
 157         uint32_t ebx = 0, ecx = 0, edx = 0;
 158         char vendor[CPUID_VENDOR_SZ + 1];
 159
 160         host_cpuid(0, 0, NULL, &ebx, &ecx, &edx);
 161         x86_cpu_vendor_words2str(vendor, ebx, edx, ecx);
 162         object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
 163     }
 164 }
 165
 166 void host_cpu_max_instance_init(X86CPU *cpu)
 167 {
 168     char vendor[CPUID_VENDOR_SZ + 1] = { 0 };
 169     char model_id[CPUID_MODEL_ID_SZ + 1] = { 0 };
 170     int family, model, stepping;
 171
 172     /* Use max host physical address bits if -cpu max option is applied */
 173     object_property_set_bool(OBJECT(cpu), "host-phys-bits", true, &error_abort);
 174
 175     host_cpu_vendor_fms(vendor, &family, &model, &stepping);
 176     host_cpu_fill_model_id(model_id);
 177
 178     object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
 179     object_property_set_int(OBJECT(cpu), "family", family, &error_abort);
 180     object_property_set_int(OBJECT(cpu), "model", model, &error_abort);
 181     object_property_set_int(OBJECT(cpu), "stepping", stepping,
 182                             &error_abort);
 183     object_property_set_str(OBJECT(cpu), "model-id", model_id,
 184                             &error_abort);
 185 }
 186
 187 static void host_cpu_class_init(ObjectClass *oc, void *data)
 188 {
 189     X86CPUClass *xcc = X86_CPU_CLASS(oc);
 190
 191     xcc->host_cpuid_required = true;
 192     xcc->ordering = 8;
 193     xcc->model_description =
 194         g_strdup_printf("processor with all supported host features ");
 195 }
 196
 197 static const TypeInfo host_cpu_type_info = {
 198     .name = X86_CPU_TYPE_NAME("host"),
 199     .parent = X86_CPU_TYPE_NAME("max"),
 200     .class_init = host_cpu_class_init,
 201 };
 202
 203 static void host_cpu_type_init(void)
 204 {
 205     type_register_static(&host_cpu_type_info);
 206 }
 207
 208 type_init(host_cpu_type_init);