qapi: Improve specificity of type/member descriptions
[qemu/armbru.git] / target / i386 / tcg / misc_helper.c
blob5f7a3061ca59b38408347d377142c9a071417dd0
1 /*
2 * x86 misc helpers
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu/log.h"
22 #include "cpu.h"
23 #include "exec/helper-proto.h"
24 #include "exec/exec-all.h"
25 #include "helper-tcg.h"
28 * NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS
29 * after generating a call to a helper that uses this.
31 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask)
33 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
34 CC_OP = CC_OP_EFLAGS;
35 env->df = 1 - (2 * ((eflags >> 10) & 1));
36 env->eflags = (env->eflags & ~update_mask) |
37 (eflags & update_mask) | 0x2;
40 void helper_into(CPUX86State *env, int next_eip_addend)
42 int eflags;
44 eflags = cpu_cc_compute_all(env, CC_OP);
45 if (eflags & CC_O) {
46 raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
50 void helper_cpuid(CPUX86State *env)
52 uint32_t eax, ebx, ecx, edx;
54 cpu_svm_check_intercept_param(env, SVM_EXIT_CPUID, 0, GETPC());
56 cpu_x86_cpuid(env, (uint32_t)env->regs[R_EAX], (uint32_t)env->regs[R_ECX],
57 &eax, &ebx, &ecx, &edx);
58 env->regs[R_EAX] = eax;
59 env->regs[R_EBX] = ebx;
60 env->regs[R_ECX] = ecx;
61 env->regs[R_EDX] = edx;
64 void helper_rdtsc(CPUX86State *env)
66 uint64_t val;
68 if ((env->cr[4] & CR4_TSD_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
69 raise_exception_ra(env, EXCP0D_GPF, GETPC());
71 cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0, GETPC());
73 val = cpu_get_tsc(env) + env->tsc_offset;
74 env->regs[R_EAX] = (uint32_t)(val);
75 env->regs[R_EDX] = (uint32_t)(val >> 32);
78 void helper_rdtscp(CPUX86State *env)
80 helper_rdtsc(env);
81 env->regs[R_ECX] = (uint32_t)(env->tsc_aux);
84 G_NORETURN void helper_rdpmc(CPUX86State *env)
86 if (((env->cr[4] & CR4_PCE_MASK) == 0 ) &&
87 ((env->hflags & HF_CPL_MASK) != 0)) {
88 raise_exception_ra(env, EXCP0D_GPF, GETPC());
90 cpu_svm_check_intercept_param(env, SVM_EXIT_RDPMC, 0, GETPC());
92 /* currently unimplemented */
93 qemu_log_mask(LOG_UNIMP, "x86: unimplemented rdpmc\n");
94 raise_exception_err(env, EXCP06_ILLOP, 0);
97 G_NORETURN void do_pause(CPUX86State *env)
99 CPUState *cs = env_cpu(env);
101 /* Just let another CPU run. */
102 cs->exception_index = EXCP_INTERRUPT;
103 cpu_loop_exit(cs);
106 G_NORETURN void helper_pause(CPUX86State *env, int next_eip_addend)
108 cpu_svm_check_intercept_param(env, SVM_EXIT_PAUSE, 0, GETPC());
109 env->eip += next_eip_addend;
111 do_pause(env);
114 uint64_t helper_rdpkru(CPUX86State *env, uint32_t ecx)
116 if ((env->cr[4] & CR4_PKE_MASK) == 0) {
117 raise_exception_err_ra(env, EXCP06_ILLOP, 0, GETPC());
119 if (ecx != 0) {
120 raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC());
123 return env->pkru;
126 void helper_wrpkru(CPUX86State *env, uint32_t ecx, uint64_t val)
128 CPUState *cs = env_cpu(env);
130 if ((env->cr[4] & CR4_PKE_MASK) == 0) {
131 raise_exception_err_ra(env, EXCP06_ILLOP, 0, GETPC());
133 if (ecx != 0 || (val & 0xFFFFFFFF00000000ull)) {
134 raise_exception_err_ra(env, EXCP0D_GPF, 0, GETPC());
137 env->pkru = val;
138 tlb_flush(cs);