qapi: add missing colon-ending for section name
[qemu/armbru.git] / include / sysemu / dma.h
blobc228c66513605d6d8887c3b5b0498116cc1b5406
1 /*
2 * DMA helper functions
4 * Copyright (c) 2009 Red Hat
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
10 #ifndef DMA_H
11 #define DMA_H
13 #include "exec/memory.h"
14 #include "exec/address-spaces.h"
15 #include "hw/hw.h"
16 #include "block/block.h"
17 #include "block/accounting.h"
19 typedef struct ScatterGatherEntry ScatterGatherEntry;
21 typedef enum {
22 DMA_DIRECTION_TO_DEVICE = 0,
23 DMA_DIRECTION_FROM_DEVICE = 1,
24 } DMADirection;
26 struct QEMUSGList {
27 ScatterGatherEntry *sg;
28 int nsg;
29 int nalloc;
30 size_t size;
31 DeviceState *dev;
32 AddressSpace *as;
35 #ifndef CONFIG_USER_ONLY
38 * When an IOMMU is present, bus addresses become distinct from
39 * CPU/memory physical addresses and may be a different size. Because
40 * the IOVA size depends more on the bus than on the platform, we more
41 * or less have to treat these as 64-bit always to cover all (or at
42 * least most) cases.
44 typedef uint64_t dma_addr_t;
46 #define DMA_ADDR_BITS 64
47 #define DMA_ADDR_FMT "%" PRIx64
49 static inline void dma_barrier(AddressSpace *as, DMADirection dir)
52 * This is called before DMA read and write operations
53 * unless the _relaxed form is used and is responsible
54 * for providing some sane ordering of accesses vs
55 * concurrently running VCPUs.
57 * Users of map(), unmap() or lower level st/ld_*
58 * operations are responsible for providing their own
59 * ordering via barriers.
61 * This primitive implementation does a simple smp_mb()
62 * before each operation which provides pretty much full
63 * ordering.
65 * A smarter implementation can be devised if needed to
66 * use lighter barriers based on the direction of the
67 * transfer, the DMA context, etc...
69 smp_mb();
72 /* Checks that the given range of addresses is valid for DMA. This is
73 * useful for certain cases, but usually you should just use
74 * dma_memory_{read,write}() and check for errors */
75 static inline bool dma_memory_valid(AddressSpace *as,
76 dma_addr_t addr, dma_addr_t len,
77 DMADirection dir)
79 return address_space_access_valid(as, addr, len,
80 dir == DMA_DIRECTION_FROM_DEVICE);
83 static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
84 void *buf, dma_addr_t len,
85 DMADirection dir)
87 return (bool)address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
88 buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
91 static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
92 void *buf, dma_addr_t len)
94 return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
97 static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
98 const void *buf, dma_addr_t len)
100 return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
101 DMA_DIRECTION_FROM_DEVICE);
104 static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
105 void *buf, dma_addr_t len,
106 DMADirection dir)
108 dma_barrier(as, dir);
110 return dma_memory_rw_relaxed(as, addr, buf, len, dir);
113 static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
114 void *buf, dma_addr_t len)
116 return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
119 static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
120 const void *buf, dma_addr_t len)
122 return dma_memory_rw(as, addr, (void *)buf, len,
123 DMA_DIRECTION_FROM_DEVICE);
126 int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
128 static inline void *dma_memory_map(AddressSpace *as,
129 dma_addr_t addr, dma_addr_t *len,
130 DMADirection dir)
132 hwaddr xlen = *len;
133 void *p;
135 p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
136 *len = xlen;
137 return p;
140 static inline void dma_memory_unmap(AddressSpace *as,
141 void *buffer, dma_addr_t len,
142 DMADirection dir, dma_addr_t access_len)
144 address_space_unmap(as, buffer, (hwaddr)len,
145 dir == DMA_DIRECTION_FROM_DEVICE, access_len);
148 #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
149 static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \
150 dma_addr_t addr) \
152 uint##_bits##_t val; \
153 dma_memory_read(as, addr, &val, (_bits) / 8); \
154 return _end##_bits##_to_cpu(val); \
156 static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
157 dma_addr_t addr, \
158 uint##_bits##_t val) \
160 val = cpu_to_##_end##_bits(val); \
161 dma_memory_write(as, addr, &val, (_bits) / 8); \
164 static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
166 uint8_t val;
168 dma_memory_read(as, addr, &val, 1);
169 return val;
172 static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
174 dma_memory_write(as, addr, &val, 1);
177 DEFINE_LDST_DMA(uw, w, 16, le);
178 DEFINE_LDST_DMA(l, l, 32, le);
179 DEFINE_LDST_DMA(q, q, 64, le);
180 DEFINE_LDST_DMA(uw, w, 16, be);
181 DEFINE_LDST_DMA(l, l, 32, be);
182 DEFINE_LDST_DMA(q, q, 64, be);
184 #undef DEFINE_LDST_DMA
186 struct ScatterGatherEntry {
187 dma_addr_t base;
188 dma_addr_t len;
191 void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
192 AddressSpace *as);
193 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
194 void qemu_sglist_destroy(QEMUSGList *qsg);
195 #endif
197 typedef BlockAIOCB *DMAIOFunc(int64_t offset, QEMUIOVector *iov,
198 BlockCompletionFunc *cb, void *cb_opaque,
199 void *opaque);
201 BlockAIOCB *dma_blk_io(AioContext *ctx,
202 QEMUSGList *sg, uint64_t offset, uint32_t align,
203 DMAIOFunc *io_func, void *io_func_opaque,
204 BlockCompletionFunc *cb, void *opaque, DMADirection dir);
205 BlockAIOCB *dma_blk_read(BlockBackend *blk,
206 QEMUSGList *sg, uint64_t offset, uint32_t align,
207 BlockCompletionFunc *cb, void *opaque);
208 BlockAIOCB *dma_blk_write(BlockBackend *blk,
209 QEMUSGList *sg, uint64_t offset, uint32_t align,
210 BlockCompletionFunc *cb, void *opaque);
211 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);
212 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);
214 void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
215 QEMUSGList *sg, enum BlockAcctType type);
217 #endif