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sd/milkymist-memcard: Fix format string
[qemu/armbru.git] / hw / arm / spitz.c
blob7ac8254aa6475dcc2ad02cfeb25f51b4e77486a0
1 /*
2 * PXA270-based Clamshell PDA platforms.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 #include "qemu/osdep.h"
14 #include "qapi/error.h"
15 #include "hw/arm/pxa.h"
16 #include "hw/arm/boot.h"
17 #include "sysemu/runstate.h"
18 #include "sysemu/sysemu.h"
19 #include "hw/pcmcia.h"
20 #include "hw/qdev-properties.h"
21 #include "hw/i2c/i2c.h"
22 #include "hw/irq.h"
23 #include "hw/ssi/ssi.h"
24 #include "hw/block/flash.h"
25 #include "qemu/timer.h"
26 #include "qemu/log.h"
27 #include "hw/arm/sharpsl.h"
28 #include "ui/console.h"
29 #include "hw/audio/wm8750.h"
30 #include "audio/audio.h"
31 #include "hw/boards.h"
32 #include "hw/sysbus.h"
33 #include "hw/misc/max111x.h"
34 #include "migration/vmstate.h"
35 #include "exec/address-spaces.h"
36 #include "cpu.h"
37
38 enum spitz_model_e { spitz, akita, borzoi, terrier };
39
40 typedef struct {
41 MachineClass parent;
42 enum spitz_model_e model;
43 int arm_id;
44 } SpitzMachineClass;
45
46 typedef struct {
47 MachineState parent;
48 PXA2xxState *mpu;
49 DeviceState *mux;
50 DeviceState *lcdtg;
51 DeviceState *ads7846;
52 DeviceState *max1111;
53 DeviceState *scp0;
54 DeviceState *scp1;
55 DeviceState *misc_gpio;
56 } SpitzMachineState;
57
58 #define TYPE_SPITZ_MACHINE "spitz-common"
59 #define SPITZ_MACHINE(obj) \
60 OBJECT_CHECK(SpitzMachineState, obj, TYPE_SPITZ_MACHINE)
61 #define SPITZ_MACHINE_GET_CLASS(obj) \
62 OBJECT_GET_CLASS(SpitzMachineClass, obj, TYPE_SPITZ_MACHINE)
63 #define SPITZ_MACHINE_CLASS(klass) \
64 OBJECT_CLASS_CHECK(SpitzMachineClass, klass, TYPE_SPITZ_MACHINE)
65
66 #define zaurus_printf(format, ...) \
67 fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__)
68
69 /* Spitz Flash */
70 #define FLASH_BASE 0x0c000000
71 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
72 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
73 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
74 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
75 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
76 #define FLASH_FLASHIO 0x14 /* Flash I/O */
77 #define FLASH_FLASHCTL 0x18 /* Flash Control */
78
79 #define FLASHCTL_CE0 (1 << 0)
80 #define FLASHCTL_CLE (1 << 1)
81 #define FLASHCTL_ALE (1 << 2)
82 #define FLASHCTL_WP (1 << 3)
83 #define FLASHCTL_CE1 (1 << 4)
84 #define FLASHCTL_RYBY (1 << 5)
85 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
86
87 #define TYPE_SL_NAND "sl-nand"
88 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
89
90 typedef struct {
91 SysBusDevice parent_obj;
92
93 MemoryRegion iomem;
94 DeviceState *nand;
95 uint8_t ctl;
96 uint8_t manf_id;
97 uint8_t chip_id;
98 ECCState ecc;
99 } SLNANDState;
100
101 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
102 {
103 SLNANDState *s = (SLNANDState *) opaque;
104 int ryby;
105
106 switch (addr) {
107 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
108 case FLASH_ECCLPLB:
109 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
110 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
111
112 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
113 case FLASH_ECCLPUB:
114 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
115 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
116
117 case FLASH_ECCCP:
118 return s->ecc.cp;
119
120 case FLASH_ECCCNTR:
121 return s->ecc.count & 0xff;
122
123 case FLASH_FLASHCTL:
124 nand_getpins(s->nand, &ryby);
125 if (ryby)
126 return s->ctl | FLASHCTL_RYBY;
127 else
128 return s->ctl;
129
130 case FLASH_FLASHIO:
131 if (size == 4) {
132 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
133 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
134 }
135 return ecc_digest(&s->ecc, nand_getio(s->nand));
136
137 default:
138 qemu_log_mask(LOG_GUEST_ERROR,
139 "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n",
140 addr);
141 }
142 return 0;
143 }
144
145 static void sl_write(void *opaque, hwaddr addr,
146 uint64_t value, unsigned size)
147 {
148 SLNANDState *s = (SLNANDState *) opaque;
149
150 switch (addr) {
151 case FLASH_ECCCLRR:
152 /* Value is ignored. */
153 ecc_reset(&s->ecc);
154 break;
155
156 case FLASH_FLASHCTL:
157 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
158 nand_setpins(s->nand,
159 s->ctl & FLASHCTL_CLE,
160 s->ctl & FLASHCTL_ALE,
161 s->ctl & FLASHCTL_NCE,
162 s->ctl & FLASHCTL_WP,
163 0);
164 break;
165
166 case FLASH_FLASHIO:
167 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
168 break;
169
170 default:
171 qemu_log_mask(LOG_GUEST_ERROR,
172 "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n",
173 addr);
174 }
175 }
176
177 enum {
178 FLASH_128M,
179 FLASH_1024M,
180 };
181
182 static const MemoryRegionOps sl_ops = {
183 .read = sl_read,
184 .write = sl_write,
185 .endianness = DEVICE_NATIVE_ENDIAN,
186 };
187
188 static void sl_flash_register(PXA2xxState *cpu, int size)
189 {
190 DeviceState *dev;
191
192 dev = qdev_new(TYPE_SL_NAND);
193
194 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
195 if (size == FLASH_128M)
196 qdev_prop_set_uint8(dev, "chip_id", 0x73);
197 else if (size == FLASH_1024M)
198 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
199
200 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
201 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
202 }
203
204 static void sl_nand_init(Object *obj)
205 {
206 SLNANDState *s = SL_NAND(obj);
207 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
208
209 s->ctl = 0;
210
211 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
212 sysbus_init_mmio(dev, &s->iomem);
213 }
214
215 static void sl_nand_realize(DeviceState *dev, Error **errp)
216 {
217 SLNANDState *s = SL_NAND(dev);
218 DriveInfo *nand;
219
220 /* FIXME use a qdev drive property instead of drive_get() */
221 nand = drive_get(IF_MTD, 0, 0);
222 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
223 s->manf_id, s->chip_id);
224 }
225
226 /* Spitz Keyboard */
227
228 #define SPITZ_KEY_STROBE_NUM 11
229 #define SPITZ_KEY_SENSE_NUM 7
230
231 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
232 12, 17, 91, 34, 36, 38, 39
233 };
234
235 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
236 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
237 };
238
239 /* Eighth additional row maps the special keys */
240 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
241 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
242 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
243 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
244 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
245 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
246 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
247 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
248 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
249 };
250
251 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
252 #define SPITZ_GPIO_SYNC 16 /* Sync button */
253 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
254 #define SPITZ_GPIO_SWA 97 /* Lid */
255 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
256
257 /* The special buttons are mapped to unused keys */
258 static const int spitz_gpiomap[5] = {
259 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
260 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
261 };
262
263 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
264 #define SPITZ_KEYBOARD(obj) \
265 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
266
267 typedef struct {
268 SysBusDevice parent_obj;
269
270 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
271 qemu_irq gpiomap[5];
272 int keymap[0x80];
273 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
274 uint16_t strobe_state;
275 uint16_t sense_state;
276
277 uint16_t pre_map[0x100];
278 uint16_t modifiers;
279 uint16_t imodifiers;
280 uint8_t fifo[16];
281 int fifopos, fifolen;
282 QEMUTimer *kbdtimer;
283 } SpitzKeyboardState;
284
285 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
286 {
287 int i;
288 uint16_t strobe, sense = 0;
289 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
290 strobe = s->keyrow[i] & s->strobe_state;
291 if (strobe) {
292 sense |= 1 << i;
293 if (!(s->sense_state & (1 << i)))
294 qemu_irq_raise(s->sense[i]);
295 } else if (s->sense_state & (1 << i))
296 qemu_irq_lower(s->sense[i]);
297 }
298
299 s->sense_state = sense;
300 }
301
302 static void spitz_keyboard_strobe(void *opaque, int line, int level)
303 {
304 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
305
306 if (level)
307 s->strobe_state |= 1 << line;
308 else
309 s->strobe_state &= ~(1 << line);
310 spitz_keyboard_sense_update(s);
311 }
312
313 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
314 {
315 int spitz_keycode = s->keymap[keycode & 0x7f];
316 if (spitz_keycode == -1)
317 return;
318
319 /* Handle the additional keys */
320 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
321 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
322 return;
323 }
324
325 if (keycode & 0x80)
326 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
327 else
328 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
329
330 spitz_keyboard_sense_update(s);
331 }
332
333 #define SPITZ_MOD_SHIFT (1 << 7)
334 #define SPITZ_MOD_CTRL (1 << 8)
335 #define SPITZ_MOD_FN (1 << 9)
336
337 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
338
339 static void spitz_keyboard_handler(void *opaque, int keycode)
340 {
341 SpitzKeyboardState *s = opaque;
342 uint16_t code;
343 int mapcode;
344 switch (keycode) {
345 case 0x2a: /* Left Shift */
346 s->modifiers |= 1;
347 break;
348 case 0xaa:
349 s->modifiers &= ~1;
350 break;
351 case 0x36: /* Right Shift */
352 s->modifiers |= 2;
353 break;
354 case 0xb6:
355 s->modifiers &= ~2;
356 break;
357 case 0x1d: /* Control */
358 s->modifiers |= 4;
359 break;
360 case 0x9d:
361 s->modifiers &= ~4;
362 break;
363 case 0x38: /* Alt */
364 s->modifiers |= 8;
365 break;
366 case 0xb8:
367 s->modifiers &= ~8;
368 break;
369 }
370
371 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
372 (keycode | SPITZ_MOD_SHIFT) :
373 (keycode & ~SPITZ_MOD_SHIFT))];
374
375 if (code != mapcode) {
376 #if 0
377 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
378 QUEUE_KEY(0x2a | (keycode & 0x80));
379 }
380 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
381 QUEUE_KEY(0x1d | (keycode & 0x80));
382 }
383 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
384 QUEUE_KEY(0x38 | (keycode & 0x80));
385 }
386 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
387 QUEUE_KEY(0x2a | (~keycode & 0x80));
388 }
389 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
390 QUEUE_KEY(0x36 | (~keycode & 0x80));
391 }
392 #else
393 if (keycode & 0x80) {
394 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
395 QUEUE_KEY(0x2a | 0x80);
396 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
397 QUEUE_KEY(0x1d | 0x80);
398 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
399 QUEUE_KEY(0x38 | 0x80);
400 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
401 QUEUE_KEY(0x2a);
402 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
403 QUEUE_KEY(0x36);
404 s->imodifiers = 0;
405 } else {
406 if ((code & SPITZ_MOD_SHIFT) &&
407 !((s->modifiers | s->imodifiers) & 1)) {
408 QUEUE_KEY(0x2a);
409 s->imodifiers |= 1;
410 }
411 if ((code & SPITZ_MOD_CTRL) &&
412 !((s->modifiers | s->imodifiers) & 4)) {
413 QUEUE_KEY(0x1d);
414 s->imodifiers |= 4;
415 }
416 if ((code & SPITZ_MOD_FN) &&
417 !((s->modifiers | s->imodifiers) & 8)) {
418 QUEUE_KEY(0x38);
419 s->imodifiers |= 8;
420 }
421 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
422 !(s->imodifiers & 0x10)) {
423 QUEUE_KEY(0x2a | 0x80);
424 s->imodifiers |= 0x10;
425 }
426 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
427 !(s->imodifiers & 0x20)) {
428 QUEUE_KEY(0x36 | 0x80);
429 s->imodifiers |= 0x20;
430 }
431 }
432 #endif
433 }
434
435 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
436 }
437
438 static void spitz_keyboard_tick(void *opaque)
439 {
440 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
441
442 if (s->fifolen) {
443 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
444 s->fifolen --;
445 if (s->fifopos >= 16)
446 s->fifopos = 0;
447 }
448
449 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
450 NANOSECONDS_PER_SECOND / 32);
451 }
452
453 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
454 {
455 int i;
456 for (i = 0; i < 0x100; i ++)
457 s->pre_map[i] = i;
458 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
459 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
460 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
461 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
462 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
463 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
464 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */
465 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
466 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
467 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
468 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
469 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */
470 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */
471 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */
472 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */
473 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */
474 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */
475 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */
476 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */
477 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */
478 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */
479 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */
480 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */
481 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */
482 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */
483 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */
484 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */
485 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */
486 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */
487 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
488 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */
489 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */
490
491 s->modifiers = 0;
492 s->imodifiers = 0;
493 s->fifopos = 0;
494 s->fifolen = 0;
495 }
496
497 #undef SPITZ_MOD_SHIFT
498 #undef SPITZ_MOD_CTRL
499 #undef SPITZ_MOD_FN
500
501 static int spitz_keyboard_post_load(void *opaque, int version_id)
502 {
503 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
504
505 /* Release all pressed keys */
506 memset(s->keyrow, 0, sizeof(s->keyrow));
507 spitz_keyboard_sense_update(s);
508 s->modifiers = 0;
509 s->imodifiers = 0;
510 s->fifopos = 0;
511 s->fifolen = 0;
512
513 return 0;
514 }
515
516 static void spitz_keyboard_register(PXA2xxState *cpu)
517 {
518 int i;
519 DeviceState *dev;
520 SpitzKeyboardState *s;
521
522 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
523 s = SPITZ_KEYBOARD(dev);
524
525 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
526 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
527
528 for (i = 0; i < 5; i ++)
529 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
530
531 if (!graphic_rotate)
532 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
533
534 for (i = 0; i < 5; i++)
535 qemu_set_irq(s->gpiomap[i], 0);
536
537 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
538 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
539 qdev_get_gpio_in(dev, i));
540
541 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
542
543 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
544 }
545
546 static void spitz_keyboard_init(Object *obj)
547 {
548 DeviceState *dev = DEVICE(obj);
549 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
550 int i, j;
551
552 for (i = 0; i < 0x80; i ++)
553 s->keymap[i] = -1;
554 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
555 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
556 if (spitz_keymap[i][j] != -1)
557 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
558
559 spitz_keyboard_pre_map(s);
560
561 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
562 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
563 }
564
565 static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
566 {
567 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
568 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
569 }
570
571 /* LCD backlight controller */
572
573 #define LCDTG_RESCTL 0x00
574 #define LCDTG_PHACTRL 0x01
575 #define LCDTG_DUTYCTRL 0x02
576 #define LCDTG_POWERREG0 0x03
577 #define LCDTG_POWERREG1 0x04
578 #define LCDTG_GPOR3 0x05
579 #define LCDTG_PICTRL 0x06
580 #define LCDTG_POLCTRL 0x07
581
582 #define TYPE_SPITZ_LCDTG "spitz-lcdtg"
583 #define SPITZ_LCDTG(obj) OBJECT_CHECK(SpitzLCDTG, (obj), TYPE_SPITZ_LCDTG)
584
585 typedef struct {
586 SSISlave ssidev;
587 uint32_t bl_intensity;
588 uint32_t bl_power;
589 } SpitzLCDTG;
590
591 static void spitz_bl_update(SpitzLCDTG *s)
592 {
593 if (s->bl_power && s->bl_intensity)
594 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
595 else
596 zaurus_printf("LCD Backlight now off\n");
597 }
598
599 static inline void spitz_bl_bit5(void *opaque, int line, int level)
600 {
601 SpitzLCDTG *s = opaque;
602 int prev = s->bl_intensity;
603
604 if (level)
605 s->bl_intensity &= ~0x20;
606 else
607 s->bl_intensity |= 0x20;
608
609 if (s->bl_power && prev != s->bl_intensity)
610 spitz_bl_update(s);
611 }
612
613 static inline void spitz_bl_power(void *opaque, int line, int level)
614 {
615 SpitzLCDTG *s = opaque;
616 s->bl_power = !!level;
617 spitz_bl_update(s);
618 }
619
620 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
621 {
622 SpitzLCDTG *s = SPITZ_LCDTG(dev);
623 int addr;
624 addr = value >> 5;
625 value &= 0x1f;
626
627 switch (addr) {
628 case LCDTG_RESCTL:
629 if (value)
630 zaurus_printf("LCD in QVGA mode\n");
631 else
632 zaurus_printf("LCD in VGA mode\n");
633 break;
634
635 case LCDTG_DUTYCTRL:
636 s->bl_intensity &= ~0x1f;
637 s->bl_intensity |= value;
638 if (s->bl_power)
639 spitz_bl_update(s);
640 break;
641
642 case LCDTG_POWERREG0:
643 /* Set common voltage to M62332FP */
644 break;
645 }
646 return 0;
647 }
648
649 static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
650 {
651 SpitzLCDTG *s = SPITZ_LCDTG(ssi);
652 DeviceState *dev = DEVICE(s);
653
654 s->bl_power = 0;
655 s->bl_intensity = 0x20;
656
657 qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1);
658 qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1);
659 }
660
661 /* SSP devices */
662
663 #define CORGI_SSP_PORT 2
664
665 #define SPITZ_GPIO_LCDCON_CS 53
666 #define SPITZ_GPIO_ADS7846_CS 14
667 #define SPITZ_GPIO_MAX1111_CS 20
668 #define SPITZ_GPIO_TP_INT 11
669
670 #define TYPE_CORGI_SSP "corgi-ssp"
671 #define CORGI_SSP(obj) OBJECT_CHECK(CorgiSSPState, (obj), TYPE_CORGI_SSP)
672
673 /* "Demux" the signal based on current chipselect */
674 typedef struct {
675 SSISlave ssidev;
676 SSIBus *bus[3];
677 uint32_t enable[3];
678 } CorgiSSPState;
679
680 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
681 {
682 CorgiSSPState *s = CORGI_SSP(dev);
683 int i;
684
685 for (i = 0; i < 3; i++) {
686 if (s->enable[i]) {
687 return ssi_transfer(s->bus[i], value);
688 }
689 }
690 return 0;
691 }
692
693 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
694 {
695 CorgiSSPState *s = (CorgiSSPState *)opaque;
696 assert(line >= 0 && line < 3);
697 s->enable[line] = !level;
698 }
699
700 #define MAX1111_BATT_VOLT 1
701 #define MAX1111_BATT_TEMP 2
702 #define MAX1111_ACIN_VOLT 3
703
704 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
705 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
706 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
707
708 static void corgi_ssp_realize(SSISlave *d, Error **errp)
709 {
710 DeviceState *dev = DEVICE(d);
711 CorgiSSPState *s = CORGI_SSP(d);
712
713 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
714 s->bus[0] = ssi_create_bus(dev, "ssi0");
715 s->bus[1] = ssi_create_bus(dev, "ssi1");
716 s->bus[2] = ssi_create_bus(dev, "ssi2");
717 }
718
719 static void spitz_ssp_attach(SpitzMachineState *sms)
720 {
721 void *bus;
722
723 sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1],
724 TYPE_CORGI_SSP);
725
726 bus = qdev_get_child_bus(sms->mux, "ssi0");
727 sms->lcdtg = ssi_create_slave(bus, TYPE_SPITZ_LCDTG);
728
729 bus = qdev_get_child_bus(sms->mux, "ssi1");
730 sms->ads7846 = ssi_create_slave(bus, "ads7846");
731 qdev_connect_gpio_out(sms->ads7846, 0,
732 qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT));
733
734 bus = qdev_get_child_bus(sms->mux, "ssi2");
735 sms->max1111 = qdev_new(TYPE_MAX_1111);
736 qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */,
737 SPITZ_BATTERY_VOLT);
738 qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0);
739 qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */,
740 SPITZ_CHARGEON_ACIN);
741 ssi_realize_and_unref(sms->max1111, bus, &error_fatal);
742
743 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS,
744 qdev_get_gpio_in(sms->mux, 0));
745 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS,
746 qdev_get_gpio_in(sms->mux, 1));
747 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS,
748 qdev_get_gpio_in(sms->mux, 2));
749 }
750
751 /* CF Microdrive */
752
753 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
754 {
755 PCMCIACardState *md;
756 DriveInfo *dinfo;
757
758 dinfo = drive_get(IF_IDE, 0, 0);
759 if (!dinfo || dinfo->media_cd)
760 return;
761 md = dscm1xxxx_init(dinfo);
762 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
763 }
764
765 /* Wm8750 and Max7310 on I2C */
766
767 #define AKITA_MAX_ADDR 0x18
768 #define SPITZ_WM_ADDRL 0x1b
769 #define SPITZ_WM_ADDRH 0x1a
770
771 #define SPITZ_GPIO_WM 5
772
773 static void spitz_wm8750_addr(void *opaque, int line, int level)
774 {
775 I2CSlave *wm = (I2CSlave *) opaque;
776 if (level)
777 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
778 else
779 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
780 }
781
782 static void spitz_i2c_setup(PXA2xxState *cpu)
783 {
784 /* Attach the CPU on one end of our I2C bus. */
785 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
786
787 DeviceState *wm;
788
789 /* Attach a WM8750 to the bus */
790 wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0));
791
792 spitz_wm8750_addr(wm, 0, 0);
793 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
794 qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
795 /* .. and to the sound interface. */
796 cpu->i2s->opaque = wm;
797 cpu->i2s->codec_out = wm8750_dac_dat;
798 cpu->i2s->codec_in = wm8750_adc_dat;
799 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
800 }
801
802 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
803 {
804 /* Attach a Max7310 to Akita I2C bus. */
805 i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
806 AKITA_MAX_ADDR);
807 }
808
809 /* Other peripherals */
810
811 /*
812 * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards.
813 *
814 * QEMU interface:
815 * + named GPIO inputs "green-led", "orange-led", "charging", "discharging":
816 * these currently just print messages that the line has been signalled
817 * + named GPIO input "adc-temp-on": set to cause the battery-temperature
818 * value to be passed to the max111x ADC
819 * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
820 */
821 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
822 #define SPITZ_MISC_GPIO(obj) \
823 OBJECT_CHECK(SpitzMiscGPIOState, (obj), TYPE_SPITZ_MISC_GPIO)
824
825 typedef struct SpitzMiscGPIOState {
826 SysBusDevice parent_obj;
827
828 qemu_irq adc_value;
829 } SpitzMiscGPIOState;
830
831 static void spitz_misc_charging(void *opaque, int n, int level)
832 {
833 zaurus_printf("Charging %s.\n", level ? "off" : "on");
834 }
835
836 static void spitz_misc_discharging(void *opaque, int n, int level)
837 {
838 zaurus_printf("Discharging %s.\n", level ? "off" : "on");
839 }
840
841 static void spitz_misc_green_led(void *opaque, int n, int level)
842 {
843 zaurus_printf("Green LED %s.\n", level ? "off" : "on");
844 }
845
846 static void spitz_misc_orange_led(void *opaque, int n, int level)
847 {
848 zaurus_printf("Orange LED %s.\n", level ? "off" : "on");
849 }
850
851 static void spitz_misc_adc_temp(void *opaque, int n, int level)
852 {
853 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque);
854 int batt_temp = level ? SPITZ_BATTERY_TEMP : 0;
855
856 qemu_set_irq(s->adc_value, batt_temp);
857 }
858
859 static void spitz_misc_gpio_init(Object *obj)
860 {
861 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj);
862 DeviceState *dev = DEVICE(obj);
863
864 qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1);
865 qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1);
866 qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1);
867 qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1);
868 qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1);
869
870 qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1);
871 }
872
873 #define SPITZ_SCP_LED_GREEN 1
874 #define SPITZ_SCP_JK_B 2
875 #define SPITZ_SCP_CHRG_ON 3
876 #define SPITZ_SCP_MUTE_L 4
877 #define SPITZ_SCP_MUTE_R 5
878 #define SPITZ_SCP_CF_POWER 6
879 #define SPITZ_SCP_LED_ORANGE 7
880 #define SPITZ_SCP_JK_A 8
881 #define SPITZ_SCP_ADC_TEMP_ON 9
882 #define SPITZ_SCP2_IR_ON 1
883 #define SPITZ_SCP2_AKIN_PULLUP 2
884 #define SPITZ_SCP2_BACKLIGHT_CONT 7
885 #define SPITZ_SCP2_BACKLIGHT_ON 8
886 #define SPITZ_SCP2_MIC_BIAS 9
887
888 static void spitz_scoop_gpio_setup(SpitzMachineState *sms)
889 {
890 DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL);
891
892 sms->misc_gpio = miscdev;
893
894 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON,
895 qdev_get_gpio_in_named(miscdev, "charging", 0));
896 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B,
897 qdev_get_gpio_in_named(miscdev, "discharging", 0));
898 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN,
899 qdev_get_gpio_in_named(miscdev, "green-led", 0));
900 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE,
901 qdev_get_gpio_in_named(miscdev, "orange-led", 0));
902 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON,
903 qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0));
904 qdev_connect_gpio_out_named(miscdev, "adc-temp", 0,
905 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP));
906
907 if (sms->scp1) {
908 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT,
909 qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0));
910 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON,
911 qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0));
912 }
913 }
914
915 #define SPITZ_GPIO_HSYNC 22
916 #define SPITZ_GPIO_SD_DETECT 9
917 #define SPITZ_GPIO_SD_WP 81
918 #define SPITZ_GPIO_ON_RESET 89
919 #define SPITZ_GPIO_BAT_COVER 90
920 #define SPITZ_GPIO_CF1_IRQ 105
921 #define SPITZ_GPIO_CF1_CD 94
922 #define SPITZ_GPIO_CF2_IRQ 106
923 #define SPITZ_GPIO_CF2_CD 93
924
925 static int spitz_hsync;
926
927 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
928 {
929 PXA2xxState *cpu = (PXA2xxState *) opaque;
930 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
931 spitz_hsync ^= 1;
932 }
933
934 static void spitz_reset(void *opaque, int line, int level)
935 {
936 if (level) {
937 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
938 }
939 }
940
941 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
942 {
943 qemu_irq lcd_hsync;
944 qemu_irq reset;
945
946 /*
947 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
948 * read to satisfy broken guests that poll-wait for hsync.
949 * Simulating a real hsync event would be less practical and
950 * wouldn't guarantee that a guest ever exits the loop.
951 */
952 spitz_hsync = 0;
953 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
954 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
955 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
956
957 /* MMC/SD host */
958 pxa2xx_mmci_handlers(cpu->mmc,
959 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
960 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
961
962 /* Battery lock always closed */
963 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
964
965 /* Handle reset */
966 reset = qemu_allocate_irq(spitz_reset, cpu, 0);
967 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
968
969 /* PCMCIA signals: card's IRQ and Card-Detect */
970 if (slots >= 1)
971 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
972 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
973 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
974 if (slots >= 2)
975 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
976 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
977 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
978 }
979
980 /* Board init. */
981 #define SPITZ_RAM 0x04000000
982 #define SPITZ_ROM 0x00800000
983
984 static struct arm_boot_info spitz_binfo = {
985 .loader_start = PXA2XX_SDRAM_BASE,
986 .ram_size = 0x04000000,
987 };
988
989 static void spitz_common_init(MachineState *machine)
990 {
991 SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine);
992 SpitzMachineState *sms = SPITZ_MACHINE(machine);
993 enum spitz_model_e model = smc->model;
994 PXA2xxState *mpu;
995 MemoryRegion *address_space_mem = get_system_memory();
996 MemoryRegion *rom = g_new(MemoryRegion, 1);
997
998 /* Setup CPU & memory */
999 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
1000 machine->cpu_type);
1001 sms->mpu = mpu;
1002
1003 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
1004
1005 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
1006 memory_region_add_subregion(address_space_mem, 0, rom);
1007
1008 /* Setup peripherals */
1009 spitz_keyboard_register(mpu);
1010
1011 spitz_ssp_attach(sms);
1012
1013 sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
1014 if (model != akita) {
1015 sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
1016 } else {
1017 sms->scp1 = NULL;
1018 }
1019
1020 spitz_scoop_gpio_setup(sms);
1021
1022 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
1023
1024 spitz_i2c_setup(mpu);
1025
1026 if (model == akita)
1027 spitz_akita_i2c_setup(mpu);
1028
1029 if (model == terrier)
1030 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
1031 spitz_microdrive_attach(mpu, 1);
1032 else if (model != akita)
1033 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
1034 spitz_microdrive_attach(mpu, 0);
1035
1036 spitz_binfo.board_id = smc->arm_id;
1037 arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
1038 sl_bootparam_write(SL_PXA_PARAM_BASE);
1039 }
1040
1041 static void spitz_common_class_init(ObjectClass *oc, void *data)
1042 {
1043 MachineClass *mc = MACHINE_CLASS(oc);
1044
1045 mc->block_default_type = IF_IDE;
1046 mc->ignore_memory_transaction_failures = true;
1047 mc->init = spitz_common_init;
1048 }
1049
1050 static const TypeInfo spitz_common_info = {
1051 .name = TYPE_SPITZ_MACHINE,
1052 .parent = TYPE_MACHINE,
1053 .abstract = true,
1054 .instance_size = sizeof(SpitzMachineState),
1055 .class_size = sizeof(SpitzMachineClass),
1056 .class_init = spitz_common_class_init,
1057 };
1058
1059 static void akitapda_class_init(ObjectClass *oc, void *data)
1060 {
1061 MachineClass *mc = MACHINE_CLASS(oc);
1062 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1063
1064 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
1065 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1066 smc->model = akita;
1067 smc->arm_id = 0x2e8;
1068 }
1069
1070 static const TypeInfo akitapda_type = {
1071 .name = MACHINE_TYPE_NAME("akita"),
1072 .parent = TYPE_SPITZ_MACHINE,
1073 .class_init = akitapda_class_init,
1074 };
1075
1076 static void spitzpda_class_init(ObjectClass *oc, void *data)
1077 {
1078 MachineClass *mc = MACHINE_CLASS(oc);
1079 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1080
1081 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1082 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1083 smc->model = spitz;
1084 smc->arm_id = 0x2c9;
1085 }
1086
1087 static const TypeInfo spitzpda_type = {
1088 .name = MACHINE_TYPE_NAME("spitz"),
1089 .parent = TYPE_SPITZ_MACHINE,
1090 .class_init = spitzpda_class_init,
1091 };
1092
1093 static void borzoipda_class_init(ObjectClass *oc, void *data)
1094 {
1095 MachineClass *mc = MACHINE_CLASS(oc);
1096 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1097
1098 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1099 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1100 smc->model = borzoi;
1101 smc->arm_id = 0x33f;
1102 }
1103
1104 static const TypeInfo borzoipda_type = {
1105 .name = MACHINE_TYPE_NAME("borzoi"),
1106 .parent = TYPE_SPITZ_MACHINE,
1107 .class_init = borzoipda_class_init,
1108 };
1109
1110 static void terrierpda_class_init(ObjectClass *oc, void *data)
1111 {
1112 MachineClass *mc = MACHINE_CLASS(oc);
1113 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1114
1115 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1116 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1117 smc->model = terrier;
1118 smc->arm_id = 0x33f;
1119 }
1120
1121 static const TypeInfo terrierpda_type = {
1122 .name = MACHINE_TYPE_NAME("terrier"),
1123 .parent = TYPE_SPITZ_MACHINE,
1124 .class_init = terrierpda_class_init,
1125 };
1126
1127 static void spitz_machine_init(void)
1128 {
1129 type_register_static(&spitz_common_info);
1130 type_register_static(&akitapda_type);
1131 type_register_static(&spitzpda_type);
1132 type_register_static(&borzoipda_type);
1133 type_register_static(&terrierpda_type);
1134 }
1135
1136 type_init(spitz_machine_init)
1137
1138 static bool is_version_0(void *opaque, int version_id)
1139 {
1140 return version_id == 0;
1141 }
1142
1143 static VMStateDescription vmstate_sl_nand_info = {
1144 .name = "sl-nand",
1145 .version_id = 0,
1146 .minimum_version_id = 0,
1147 .fields = (VMStateField[]) {
1148 VMSTATE_UINT8(ctl, SLNANDState),
1149 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1150 VMSTATE_END_OF_LIST(),
1151 },
1152 };
1153
1154 static Property sl_nand_properties[] = {
1155 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1156 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1157 DEFINE_PROP_END_OF_LIST(),
1158 };
1159
1160 static void sl_nand_class_init(ObjectClass *klass, void *data)
1161 {
1162 DeviceClass *dc = DEVICE_CLASS(klass);
1163
1164 dc->vmsd = &vmstate_sl_nand_info;
1165 device_class_set_props(dc, sl_nand_properties);
1166 dc->realize = sl_nand_realize;
1167 /* Reason: init() method uses drive_get() */
1168 dc->user_creatable = false;
1169 }
1170
1171 static const TypeInfo sl_nand_info = {
1172 .name = TYPE_SL_NAND,
1173 .parent = TYPE_SYS_BUS_DEVICE,
1174 .instance_size = sizeof(SLNANDState),
1175 .instance_init = sl_nand_init,
1176 .class_init = sl_nand_class_init,
1177 };
1178
1179 static VMStateDescription vmstate_spitz_kbd = {
1180 .name = "spitz-keyboard",
1181 .version_id = 1,
1182 .minimum_version_id = 0,
1183 .post_load = spitz_keyboard_post_load,
1184 .fields = (VMStateField[]) {
1185 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1186 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1187 VMSTATE_UNUSED_TEST(is_version_0, 5),
1188 VMSTATE_END_OF_LIST(),
1189 },
1190 };
1191
1192 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1193 {
1194 DeviceClass *dc = DEVICE_CLASS(klass);
1195
1196 dc->vmsd = &vmstate_spitz_kbd;
1197 dc->realize = spitz_keyboard_realize;
1198 }
1199
1200 static const TypeInfo spitz_keyboard_info = {
1201 .name = TYPE_SPITZ_KEYBOARD,
1202 .parent = TYPE_SYS_BUS_DEVICE,
1203 .instance_size = sizeof(SpitzKeyboardState),
1204 .instance_init = spitz_keyboard_init,
1205 .class_init = spitz_keyboard_class_init,
1206 };
1207
1208 static const VMStateDescription vmstate_corgi_ssp_regs = {
1209 .name = "corgi-ssp",
1210 .version_id = 2,
1211 .minimum_version_id = 2,
1212 .fields = (VMStateField[]) {
1213 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1214 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1215 VMSTATE_END_OF_LIST(),
1216 }
1217 };
1218
1219 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1220 {
1221 DeviceClass *dc = DEVICE_CLASS(klass);
1222 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1223
1224 k->realize = corgi_ssp_realize;
1225 k->transfer = corgi_ssp_transfer;
1226 dc->vmsd = &vmstate_corgi_ssp_regs;
1227 }
1228
1229 static const TypeInfo corgi_ssp_info = {
1230 .name = TYPE_CORGI_SSP,
1231 .parent = TYPE_SSI_SLAVE,
1232 .instance_size = sizeof(CorgiSSPState),
1233 .class_init = corgi_ssp_class_init,
1234 };
1235
1236 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1237 .name = "spitz-lcdtg",
1238 .version_id = 1,
1239 .minimum_version_id = 1,
1240 .fields = (VMStateField[]) {
1241 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1242 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1243 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1244 VMSTATE_END_OF_LIST(),
1245 }
1246 };
1247
1248 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1249 {
1250 DeviceClass *dc = DEVICE_CLASS(klass);
1251 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1252
1253 k->realize = spitz_lcdtg_realize;
1254 k->transfer = spitz_lcdtg_transfer;
1255 dc->vmsd = &vmstate_spitz_lcdtg_regs;
1256 }
1257
1258 static const TypeInfo spitz_lcdtg_info = {
1259 .name = TYPE_SPITZ_LCDTG,
1260 .parent = TYPE_SSI_SLAVE,
1261 .instance_size = sizeof(SpitzLCDTG),
1262 .class_init = spitz_lcdtg_class_init,
1263 };
1264
1265 static const TypeInfo spitz_misc_gpio_info = {
1266 .name = TYPE_SPITZ_MISC_GPIO,
1267 .parent = TYPE_SYS_BUS_DEVICE,
1268 .instance_size = sizeof(SpitzMiscGPIOState),
1269 .instance_init = spitz_misc_gpio_init,
1270 /*
1271 * No class_init required: device has no internal state so does not
1272 * need to set up reset or vmstate, and does not have a realize method.
1273 */
1274 };
1275
1276 static void spitz_register_types(void)
1277 {
1278 type_register_static(&corgi_ssp_info);
1279 type_register_static(&spitz_lcdtg_info);
1280 type_register_static(&spitz_keyboard_info);
1281 type_register_static(&sl_nand_info);
1282 type_register_static(&spitz_misc_gpio_info);
1283 }
1284
1285 type_init(spitz_register_types)
armbru's QEMU hackery