1 #ifndef QEMU_HW_MILKYMIST_HW_H
2 #define QEMU_HW_MILKYMIST_HW_H
4 #include "hw/qdev-core.h"
6 #include "qapi/error.h"
8 static inline DeviceState
*milkymist_uart_create(hwaddr base
,
14 dev
= qdev_new("milkymist-uart");
15 qdev_prop_set_chr(dev
, "chardev", chr
);
16 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
17 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
18 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, irq
);
23 static inline DeviceState
*milkymist_hpdmc_create(hwaddr base
)
27 dev
= qdev_new("milkymist-hpdmc");
28 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
29 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
34 static inline DeviceState
*milkymist_memcard_create(hwaddr base
)
38 dev
= qdev_new("milkymist-memcard");
39 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
40 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
45 static inline DeviceState
*milkymist_vgafb_create(hwaddr base
,
46 uint32_t fb_offset
, uint32_t fb_mask
)
50 dev
= qdev_new("milkymist-vgafb");
51 qdev_prop_set_uint32(dev
, "fb_offset", fb_offset
);
52 qdev_prop_set_uint32(dev
, "fb_mask", fb_mask
);
53 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
54 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
59 static inline DeviceState
*milkymist_sysctl_create(hwaddr base
,
60 qemu_irq gpio_irq
, qemu_irq timer0_irq
, qemu_irq timer1_irq
,
61 uint32_t freq_hz
, uint32_t system_id
, uint32_t capabilities
,
62 uint32_t gpio_strappings
)
66 dev
= qdev_new("milkymist-sysctl");
67 qdev_prop_set_uint32(dev
, "frequency", freq_hz
);
68 qdev_prop_set_uint32(dev
, "systemid", system_id
);
69 qdev_prop_set_uint32(dev
, "capabilities", capabilities
);
70 qdev_prop_set_uint32(dev
, "gpio_strappings", gpio_strappings
);
71 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
72 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
73 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, gpio_irq
);
74 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 1, timer0_irq
);
75 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 2, timer1_irq
);
80 static inline DeviceState
*milkymist_pfpu_create(hwaddr base
,
85 dev
= qdev_new("milkymist-pfpu");
86 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
87 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
88 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, irq
);
92 static inline DeviceState
*milkymist_ac97_create(hwaddr base
,
93 qemu_irq crrequest_irq
, qemu_irq crreply_irq
, qemu_irq dmar_irq
,
98 dev
= qdev_new("milkymist-ac97");
99 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
100 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
101 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, crrequest_irq
);
102 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 1, crreply_irq
);
103 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 2, dmar_irq
);
104 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 3, dmaw_irq
);
109 static inline DeviceState
*milkymist_minimac2_create(hwaddr base
,
110 hwaddr buffers_base
, qemu_irq rx_irq
, qemu_irq tx_irq
)
114 qemu_check_nic_model(&nd_table
[0], "minimac2");
115 dev
= qdev_new("milkymist-minimac2");
116 qdev_set_nic_properties(dev
, &nd_table
[0]);
117 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
118 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
119 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 1, buffers_base
);
120 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, rx_irq
);
121 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 1, tx_irq
);
126 static inline DeviceState
*milkymist_softusb_create(hwaddr base
,
127 qemu_irq irq
, uint32_t pmem_base
, uint32_t pmem_size
,
128 uint32_t dmem_base
, uint32_t dmem_size
)
132 dev
= qdev_new("milkymist-softusb");
133 qdev_prop_set_uint32(dev
, "pmem_size", pmem_size
);
134 qdev_prop_set_uint32(dev
, "dmem_size", dmem_size
);
135 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
136 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, base
);
137 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 1, pmem_base
);
138 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 2, dmem_base
);
139 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, irq
);
144 #endif /* QEMU_HW_MILKYMIST_HW_H */