linux-user/aarch64/cpu_loop.c

   1 /*
   2  *  qemu user cpu loop
   3  *
   4  *  Copyright (c) 2003-2008 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu.h"
  22 #include "cpu_loop-common.h"
  23
  24 #define get_user_code_u32(x, gaddr, env)                \
  25     ({ abi_long __r = get_user_u32((x), (gaddr));       \
  26         if (!__r && bswap_code(arm_sctlr_b(env))) {     \
  27             (x) = bswap32(x);                           \
  28         }                                               \
  29         __r;                                            \
  30     })
  31
  32 #define get_user_code_u16(x, gaddr, env)                \
  33     ({ abi_long __r = get_user_u16((x), (gaddr));       \
  34         if (!__r && bswap_code(arm_sctlr_b(env))) {     \
  35             (x) = bswap16(x);                           \
  36         }                                               \
  37         __r;                                            \
  38     })
  39
  40 #define get_user_data_u32(x, gaddr, env)                \
  41     ({ abi_long __r = get_user_u32((x), (gaddr));       \
  42         if (!__r && arm_cpu_bswap_data(env)) {          \
  43             (x) = bswap32(x);                           \
  44         }                                               \
  45         __r;                                            \
  46     })
  47
  48 #define get_user_data_u16(x, gaddr, env)                \
  49     ({ abi_long __r = get_user_u16((x), (gaddr));       \
  50         if (!__r && arm_cpu_bswap_data(env)) {          \
  51             (x) = bswap16(x);                           \
  52         }                                               \
  53         __r;                                            \
  54     })
  55
  56 #define put_user_data_u32(x, gaddr, env)                \
  57     ({ typeof(x) __x = (x);                             \
  58         if (arm_cpu_bswap_data(env)) {                  \
  59             __x = bswap32(__x);                         \
  60         }                                               \
  61         put_user_u32(__x, (gaddr));                     \
  62     })
  63
  64 #define put_user_data_u16(x, gaddr, env)                \
  65     ({ typeof(x) __x = (x);                             \
  66         if (arm_cpu_bswap_data(env)) {                  \
  67             __x = bswap16(__x);                         \
  68         }                                               \
  69         put_user_u16(__x, (gaddr));                     \
  70     })
  71
  72 /* AArch64 main loop */
  73 void cpu_loop(CPUARMState *env)
  74 {
  75     CPUState *cs = CPU(arm_env_get_cpu(env));
  76     int trapnr, sig;
  77     abi_long ret;
  78     target_siginfo_t info;
  79
  80     for (;;) {
  81         cpu_exec_start(cs);
  82         trapnr = cpu_exec(cs);
  83         cpu_exec_end(cs);
  84         process_queued_cpu_work(cs);
  85
  86         switch (trapnr) {
  87         case EXCP_SWI:
  88             ret = do_syscall(env,
  89                              env->xregs[8],
  90                              env->xregs[0],
  91                              env->xregs[1],
  92                              env->xregs[2],
  93                              env->xregs[3],
  94                              env->xregs[4],
  95                              env->xregs[5],
  96                              0, 0);
  97             if (ret == -TARGET_ERESTARTSYS) {
  98                 env->pc -= 4;
  99             } else if (ret != -TARGET_QEMU_ESIGRETURN) {
 100                 env->xregs[0] = ret;
 101             }
 102             break;
 103         case EXCP_INTERRUPT:
 104             /* just indicate that signals should be handled asap */
 105             break;
 106         case EXCP_UDEF:
 107             info.si_signo = TARGET_SIGILL;
 108             info.si_errno = 0;
 109             info.si_code = TARGET_ILL_ILLOPN;
 110             info._sifields._sigfault._addr = env->pc;
 111             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
 112             break;
 113         case EXCP_PREFETCH_ABORT:
 114         case EXCP_DATA_ABORT:
 115             info.si_signo = TARGET_SIGSEGV;
 116             info.si_errno = 0;
 117             /* XXX: check env->error_code */
 118             info.si_code = TARGET_SEGV_MAPERR;
 119             info._sifields._sigfault._addr = env->exception.vaddress;
 120             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
 121             break;
 122         case EXCP_DEBUG:
 123         case EXCP_BKPT:
 124             sig = gdb_handlesig(cs, TARGET_SIGTRAP);
 125             if (sig) {
 126                 info.si_signo = sig;
 127                 info.si_errno = 0;
 128                 info.si_code = TARGET_TRAP_BRKPT;
 129                 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
 130             }
 131             break;
 132         case EXCP_SEMIHOST:
 133             env->xregs[0] = do_arm_semihosting(env);
 134             break;
 135         case EXCP_YIELD:
 136             /* nothing to do here for user-mode, just resume guest code */
 137             break;
 138         case EXCP_ATOMIC:
 139             cpu_exec_step_atomic(cs);
 140             break;
 141         default:
 142             EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
 143             abort();
 144         }
 145         process_pending_signals(env);
 146         /* Exception return on AArch64 always clears the exclusive monitor,
 147          * so any return to running guest code implies this.
 148          */
 149         env->exclusive_addr = -1;
 150     }
 151 }
 152
 153 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
 154 {
 155     CPUState *cpu = ENV_GET_CPU(env);
 156     TaskState *ts = cpu->opaque;
 157     struct image_info *info = ts->info;
 158     int i;
 159
 160     if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
 161         fprintf(stderr,
 162                 "The selected ARM CPU does not support 64 bit mode\n");
 163         exit(EXIT_FAILURE);
 164     }
 165
 166     for (i = 0; i < 31; i++) {
 167         env->xregs[i] = regs->regs[i];
 168     }
 169     env->pc = regs->pc;
 170     env->xregs[31] = regs->sp;
 171 #ifdef TARGET_WORDS_BIGENDIAN
 172     env->cp15.sctlr_el[1] |= SCTLR_E0E;
 173     for (i = 1; i < 4; ++i) {
 174         env->cp15.sctlr_el[i] |= SCTLR_EE;
 175     }
 176 #endif
 177
 178     ts->stack_base = info->start_stack;
 179     ts->heap_base = info->brk;
 180     /* This will be filled in on the first SYS_HEAPINFO call.  */
 181     ts->heap_limit = 0;
 182 }