include/hw/arm/bcm2838_peripherals.h

   1 /*
   2  * BCM2838 peripherals emulation
   3  *
   4  * Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
   5  *
   6  * SPDX-License-Identifier: GPL-2.0-or-later
   7  */
   8
   9 #ifndef BCM2838_PERIPHERALS_H
  10 #define BCM2838_PERIPHERALS_H
  11
  12 #include "hw/arm/bcm2835_peripherals.h"
  13 #include "hw/sd/sdhci.h"
  14 #include "hw/gpio/bcm2838_gpio.h"
  15
  16 /* SPI */
  17 #define GIC_SPI_INTERRUPT_MBOX         33
  18 #define GIC_SPI_INTERRUPT_MPHI         40
  19 #define GIC_SPI_INTERRUPT_DWC2         73
  20 #define GIC_SPI_INTERRUPT_DMA_0        80
  21 #define GIC_SPI_INTERRUPT_DMA_6        86
  22 #define GIC_SPI_INTERRUPT_DMA_7_8      87
  23 #define GIC_SPI_INTERRUPT_DMA_9_10     88
  24 #define GIC_SPI_INTERRUPT_AUX_UART1    93
  25 #define GIC_SPI_INTERRUPT_SDHOST       120
  26 #define GIC_SPI_INTERRUPT_UART0        121
  27 #define GIC_SPI_INTERRUPT_RNG200       125
  28 #define GIC_SPI_INTERRUPT_EMMC_EMMC2   126
  29 #define GIC_SPI_INTERRUPT_PCI_INT_A    143
  30 #define GIC_SPI_INTERRUPT_GENET_A      157
  31 #define GIC_SPI_INTERRUPT_GENET_B      158
  32
  33
  34 /* GPU (legacy) DMA interrupts */
  35 #define GPU_INTERRUPT_DMA0      16
  36 #define GPU_INTERRUPT_DMA1      17
  37 #define GPU_INTERRUPT_DMA2      18
  38 #define GPU_INTERRUPT_DMA3      19
  39 #define GPU_INTERRUPT_DMA4      20
  40 #define GPU_INTERRUPT_DMA5      21
  41 #define GPU_INTERRUPT_DMA6      22
  42 #define GPU_INTERRUPT_DMA7_8    23
  43 #define GPU_INTERRUPT_DMA9_10   24
  44 #define GPU_INTERRUPT_DMA11     25
  45 #define GPU_INTERRUPT_DMA12     26
  46 #define GPU_INTERRUPT_DMA13     27
  47 #define GPU_INTERRUPT_DMA14     28
  48 #define GPU_INTERRUPT_DMA15     31
  49
  50 #define BCM2838_MPHI_OFFSET     0xb200
  51 #define BCM2838_MPHI_SIZE       0x200
  52
  53 #define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
  54 OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
  55                     BCM2838_PERIPHERALS)
  56
  57 struct BCM2838PeripheralState {
  58     /*< private >*/
  59     BCMSocPeripheralBaseState parent_obj;
  60
  61     /*< public >*/
  62     MemoryRegion peri_low_mr;
  63     MemoryRegion peri_low_mr_alias;
  64     MemoryRegion mphi_mr_alias;
  65
  66     SDHCIState emmc2;
  67     BCM2838GpioState gpio;
  68
  69     OrIRQState mmc_irq_orgate;
  70     OrIRQState dma_7_8_irq_orgate;
  71     OrIRQState dma_9_10_irq_orgate;
  72
  73     UnimplementedDeviceState asb;
  74     UnimplementedDeviceState clkisp;
  75 };
  76
  77 struct BCM2838PeripheralClass {
  78     /*< private >*/
  79     BCMSocPeripheralBaseClass parent_class;
  80     /*< public >*/
  81     uint64_t peri_low_size; /* Peripheral lower range size */
  82 };
  83
  84 #endif /* BCM2838_PERIPHERALS_H */