Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / arm / stm32f405_soc.h
blob2eeada64ded879ca139724a85af40ccf9a531ff5
1 /*
2 * STM32F405 SoC
4 * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #ifndef HW_ARM_STM32F405_SOC_H
26 #define HW_ARM_STM32F405_SOC_H
28 #include "hw/misc/stm32_rcc.h"
29 #include "hw/misc/stm32f4xx_syscfg.h"
30 #include "hw/timer/stm32f2xx_timer.h"
31 #include "hw/char/stm32f2xx_usart.h"
32 #include "hw/adc/stm32f2xx_adc.h"
33 #include "hw/misc/stm32f4xx_exti.h"
34 #include "hw/or-irq.h"
35 #include "hw/ssi/stm32f2xx_spi.h"
36 #include "hw/arm/armv7m.h"
37 #include "qom/object.h"
39 #define TYPE_STM32F405_SOC "stm32f405-soc"
40 OBJECT_DECLARE_SIMPLE_TYPE(STM32F405State, STM32F405_SOC)
42 #define STM_NUM_USARTS 7
43 #define STM_NUM_TIMERS 4
44 #define STM_NUM_ADCS 6
45 #define STM_NUM_SPIS 6
47 #define FLASH_BASE_ADDRESS 0x08000000
48 #define FLASH_SIZE (1024 * 1024)
49 #define SRAM_BASE_ADDRESS 0x20000000
50 #define SRAM_SIZE (128 * 1024)
51 #define CCM_BASE_ADDRESS 0x10000000
52 #define CCM_SIZE (64 * 1024)
54 struct STM32F405State {
55 SysBusDevice parent_obj;
57 ARMv7MState armv7m;
59 STM32RccState rcc;
60 STM32F4xxSyscfgState syscfg;
61 STM32F4xxExtiState exti;
62 STM32F2XXUsartState usart[STM_NUM_USARTS];
63 STM32F2XXTimerState timer[STM_NUM_TIMERS];
64 OrIRQState adc_irqs;
65 STM32F2XXADCState adc[STM_NUM_ADCS];
66 STM32F2XXSPIState spi[STM_NUM_SPIS];
68 MemoryRegion ccm;
69 MemoryRegion sram;
70 MemoryRegion flash;
71 MemoryRegion flash_alias;
73 Clock *sysclk;
74 Clock *refclk;
77 #endif