target/ppc/mmu-book3s-v3.h

   1 /*
   2  *  PowerPC ISAV3 BookS emulation generic mmu definitions for qemu.
   3  *
   4  *  Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef PPC_MMU_BOOK3S_V3_H
  21 #define PPC_MMU_BOOK3S_V3_H
  22
  23 #ifndef CONFIG_USER_ONLY
  24
  25 /*
  26  * Partition table definitions
  27  */
  28 #define PTCR_PATB               0x0FFFFFFFFFFFF000ULL /* Partition Table Base */
  29 #define PTCR_PATS               0x000000000000001FULL /* Partition Table Size */
  30
  31 /* Partition Table Entry Fields */
  32 #define PATE0_HR 0x8000000000000000
  33
  34 /*
  35  * WARNING: This field doesn't actually exist in the final version of
  36  * the architecture and is unused by hardware. However, qemu uses it
  37  * as an indication of a radix guest in the pseudo-PATB entry that it
  38  * maintains for SPAPR guests and in the migration stream, so we need
  39  * to keep it around
  40  */
  41 #define PATE1_GR 0x8000000000000000
  42
  43 /* Process Table Entry */
  44 struct prtb_entry {
  45     uint64_t prtbe0, prtbe1;
  46 };
  47
  48 #ifdef TARGET_PPC64
  49
  50 /*
  51  * tlbie[l] helper flags
  52  *
  53  * RIC, PRS, R and local are passed as flags in the last argument.
  54  */
  55 #define TLBIE_F_RIC_SHIFT       0
  56 #define TLBIE_F_PRS_SHIFT       2
  57 #define TLBIE_F_R_SHIFT         3
  58 #define TLBIE_F_LOCAL_SHIFT     4
  59
  60 #define TLBIE_F_RIC_MASK        (3 << TLBIE_F_RIC_SHIFT)
  61 #define TLBIE_F_PRS             (1 << TLBIE_F_PRS_SHIFT)
  62 #define TLBIE_F_R               (1 << TLBIE_F_R_SHIFT)
  63 #define TLBIE_F_LOCAL           (1 << TLBIE_F_LOCAL_SHIFT)
  64
  65 static inline bool ppc64_use_proc_tbl(PowerPCCPU *cpu)
  66 {
  67     return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT);
  68 }
  69
  70 bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid,
  71                        ppc_v3_pate_t *entry);
  72
  73 /*
  74  * The LPCR:HR bit is a shortcut that avoids having to
  75  * dig out the partition table in the fast path. This is
  76  * also how the HW uses it.
  77  */
  78 static inline bool ppc64_v3_radix(PowerPCCPU *cpu)
  79 {
  80     return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR);
  81 }
  82
  83 #endif /* TARGET_PPC64 */
  84
  85 #endif /* CONFIG_USER_ONLY */
  86
  87 #endif /* PPC_MMU_BOOK3S_V3_H */