1 /* SPDX-License-Identifier: MIT */
3 * Define Arm target-specific operand constraints.
4 * Copyright (c) 2021 Linaro
8 * Define constraint letters for register sets:
9 * REGS(letter, register_mask)
11 REGS('e', ALL_GENERAL_REGS
& 0x5555) /* even regs */
12 REGS('r', ALL_GENERAL_REGS
)
13 REGS('q', ALL_QLDST_REGS
)
14 REGS('Q', ALL_QLDST_REGS
& 0x5555) /* even qldst */
15 REGS('w', ALL_VECTOR_REGS
)
18 * Define constraint letters for constants:
19 * CONST(letter, TCG_CT_CONST_* bit set)
21 CONST('I', TCG_CT_CONST_ARM
)
22 CONST('K', TCG_CT_CONST_INV
)
23 CONST('N', TCG_CT_CONST_NEG
)
24 CONST('O', TCG_CT_CONST_ORRI
)
25 CONST('V', TCG_CT_CONST_ANDI
)
26 CONST('Z', TCG_CT_CONST_ZERO
)