Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / tcg / mips / tcg-target-reg-bits.h
blob56fe0a725e9dd04221c8007420afbfdc5bf1cdcf
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define target-specific register size
4 * Copyright (c) 2008-2009 Arnaud Patard <arnaud.patard@rtp-net.org>
5 */
7 #ifndef TCG_TARGET_REG_BITS_H
8 #define TCG_TARGET_REG_BITS_H
10 #if _MIPS_SIM == _ABIO32
11 # define TCG_TARGET_REG_BITS 32
12 #elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
13 # define TCG_TARGET_REG_BITS 64
14 #else
15 # error "Unknown ABI"
16 #endif
18 #endif