2 * Aspeed i2c bus interface to reading and writing to i2c device registers
4 * Copyright (c) 2023 IBM Corporation
7 * Stefan Berger <stefanb@linux.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
12 #ifndef QTEST_ASPEED_H
13 #define QTEST_ASPEED_H
17 #define AST2600_ASPEED_I2C_BASE_ADDR 0x1e78a000
19 /* Implements only AST2600 I2C controller */
21 static inline uint32_t ast2600_i2c_calc_bus_addr(uint8_t bus_num
)
23 return AST2600_ASPEED_I2C_BASE_ADDR
+ 0x80 + bus_num
* 0x80;
26 uint8_t aspeed_i2c_readb(QTestState
*s
,
27 uint32_t baseaddr
, uint8_t slave_addr
, uint8_t reg
);
28 uint16_t aspeed_i2c_readw(QTestState
*s
,
29 uint32_t baseaddr
, uint8_t slave_addr
, uint8_t reg
);
30 uint32_t aspeed_i2c_readl(QTestState
*s
,
31 uint32_t baseaddr
, uint8_t slave_addr
, uint8_t reg
);
32 void aspeed_i2c_writeb(QTestState
*s
, uint32_t baseaddr
, uint8_t slave_addr
,
33 uint8_t reg
, uint8_t v
);
34 void aspeed_i2c_writew(QTestState
*s
, uint32_t baseaddr
, uint8_t slave_addr
,
35 uint8_t reg
, uint16_t v
);
36 void aspeed_i2c_writel(QTestState
*s
, uint32_t baseaddr
, uint8_t slave_addr
,
37 uint8_t reg
, uint32_t v
);