include/hw/arm/armv7m.h

   1 /*
   2  * ARMv7M CPU object
   3  *
   4  * Copyright (c) 2017 Linaro Ltd
   5  * Written by Peter Maydell <peter.maydell@linaro.org>
   6  *
   7  * This code is licensed under the GPL version 2 or later.
   8  */
   9
  10 #ifndef HW_ARM_ARMV7M_H
  11 #define HW_ARM_ARMV7M_H
  12
  13 #include "hw/sysbus.h"
  14 #include "hw/intc/armv7m_nvic.h"
  15 #include "target/arm/idau.h"
  16
  17 #define TYPE_BITBAND "ARM,bitband-memory"
  18 #define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND)
  19
  20 typedef struct {
  21     /*< private >*/
  22     SysBusDevice parent_obj;
  23     /*< public >*/
  24
  25     AddressSpace source_as;
  26     MemoryRegion iomem;
  27     uint32_t base;
  28     MemoryRegion *source_memory;
  29 } BitBandState;
  30
  31 #define TYPE_ARMV7M "armv7m"
  32 #define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M)
  33
  34 #define ARMV7M_NUM_BITBANDS 2
  35
  36 /* ARMv7M container object.
  37  * + Unnamed GPIO input lines: external IRQ lines for the NVIC
  38  * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ
  39  * + Property "cpu-type": CPU type to instantiate
  40  * + Property "num-irq": number of external IRQ lines
  41  * + Property "memory": MemoryRegion defining the physical address space
  42  *   that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
  43  *   devices will be automatically layered on top of this view.)
  44  * + Property "idau": IDAU interface (forwarded to CPU object)
  45  * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
  46  * + Property "vfp": enable VFP (forwarded to CPU object)
  47  * + Property "dsp": enable DSP (forwarded to CPU object)
  48  * + Property "enable-bitband": expose bitbanded IO
  49  */
  50 typedef struct ARMv7MState {
  51     /*< private >*/
  52     SysBusDevice parent_obj;
  53     /*< public >*/
  54     NVICState nvic;
  55     BitBandState bitband[ARMV7M_NUM_BITBANDS];
  56     ARMCPU *cpu;
  57
  58     /* MemoryRegion we pass to the CPU, with our devices layered on
  59      * top of the ones the board provides in board_memory.
  60      */
  61     MemoryRegion container;
  62
  63     /* Properties */
  64     char *cpu_type;
  65     /* MemoryRegion the board provides to us (with its devices, RAM, etc) */
  66     MemoryRegion *board_memory;
  67     Object *idau;
  68     uint32_t init_svtor;
  69     bool enable_bitband;
  70     bool start_powered_off;
  71     bool vfp;
  72     bool dsp;
  73 } ARMv7MState;
  74
  75 #endif